task_wdt_isr causes illegal instruction during OTA partition erase

[dac456]

I've tested this both in my own code as well as the OTA example. The crash seems to occur when calling esp_partition_erase_range inside of esp_ota_begin.

I (1664) ota: Starting OTA example...
Guru Meditation Error of type IllegalInstruction occurred on core 0. Exception was unhandled.
Register dump:
PC : 0x400d1dae PS : 0x00050031 A0 : 0x00040021 A1 : 0x3ffb0c70
A2 : 0x00000000 A3 : 0x3ffb0cb0 A4 : 0x4008152d A5 : 0x3ffb2494
A6 : 0x00000000 A7 : 0x00000000 A8 : 0x08000000 A9 : 0x40084e0c
A10 : 0x3ff42000 A11 : 0x3ff42000 A12 : 0x00000000 A13 : 0x08000000
A14 : 0x00000003 A15 : 0x00000001 SAR : 0x00000014 EXCCAUSE: 0x00000000
EXCVADDR: 0x00000000 LBEG : 0x4000c46c LEND : 0x4000c477 LCOUNT : 0x00000000
Backtrace: 0x400d1dae:0x3ffb0c70 0x00040021:0x00000000

GDB reports:

(gdb) info line *0x400d1dae
Line 55 of "/Users/dcook/Development/esp-idf/components/esp32/./task_wdt.c" starts at address 0x400d1dac <task_wdt_isr>
and ends at 0x400d1daf <task_wdt_isr+3>.

Adding the IRAM_ATTR flag to task_wdt_isr fixes the issue for me, and the docs state:

If the interrupt handler is not placed into IRAM, there is a possibility that interrupt will happen at the time when caches are disabled, which will cause an illegal instruction exception.

So this appears to be a bug.

[igrr]

We have a fix for this in the pipeline. Actually the bug here is not due to the lack of IRAM_ATTR on the ISR handler. Because esp_intr_alloc is called without IRAM flag, task WDT interrupt should be disabled automatically whenever flash cache is disabled. However there was a bug in the function which disabled interrupts... Adding IRAM_ATTR is a reasonable workaround, but the actual fix is (surprise!) just one character.