ESP32-S3: Strapping pins undocumented pull-up resistors (IDFGH-8243)

[yannishuber]

Answers checklist.

• I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
• I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
• I have searched the issue tracker for a similar issue and not found a similar issue.

General issue report

Concerned Hardware

ESP32-S3-DevKitC-1 v1.0 (D4N32R8V)

Problem Description

The strapping pins GPIO0 and GPIO45 are pulled up by external resistors.

In the datasheet (Section 2.5), GPIO 0 and GPIO 45 are documented to be both during and after reset in the configuration E1, WPU1 and IE1, WPD1 respectively. However, when measuring GPIO 45 after reset, we get 3.3V. This can be explained by the R1 resistor documented in the WROOM2 datasheet (Page 23) which seems to be there even though it is labeled as "NC". When measuring the resistance between the 3.3V pin and GPIO 45 we can confirm that the 10KΩ resistor is there.

Because of that, the internal pull-down resistor is not enough to pull the line low when the GPIO is configured as input with pull-down. Even with the pull-down enabled, the line only drops to about 2.5V. We observed the same issue with GPIO 0. GPIO 0 is supposed to be pulled-up after reset so there is no problem there, however, if using the pin as input with pull-down, we only drop the voltage to about 2.7V.

The other strapping pins (GPIO 3 and GPIO 46) do not have the same issue.

Expected Behavior

Configuring pins GPIO 45 and GPIO 0 as inputs with pull-down resistors should measure 0V on both lines.

Actual Behavior

GPIO 45 and GPIO 0 have the wrong levels on input (~2.5V and ~2.7V)

[esp-momo]

Hi @yannishuber

For GPIO45: Would you please check which version of the ESP32-S3-WROOM-2 does your development board integrate? This pullup is populated in previous versions. If it is older versions, then your analysis is correct.

For GPIO0: Please kindly check the ESP32-S3-DevKitC-1 schematic in ESP32-S3-DevKitC-1 User guide. You can find that GPIO0 is connected to a transistor and this will give a strong pull up (see the screenshot below). That’s why the voltage only dropped to about 2.7V.

To solve this issue, you may try just setting the GPIO levels, but not enabling the internal pull up and pull down when configuring GPIO.

If you need further technical or sales support, you may also consider contact us at Technical Inquires or Sales Questions.

[yannishuber]

Hello @esp-momo, thank you for your reply. How can I find out the version of the WROOM module I am using? The only information I found is the print on the chip that says ESP32-S3-WROOM2.

Thank you for pointing out the strong pull-up on GPIO 0, that makes more sense now.

In our use case, we use GPIO45 as an input/output pin connected to a bidirectional level translator which detects the direction using the level difference. So when GPIO45 is used as an input pin, the strong pull up disrupts the level translator. We can solve the issue by using another pin, however, I think the datasheet should be updated to describe this behavior instead of saying that the pin is input enabled and pulled-low after reset, which is clearly not the case.

[esp-momo]

Hi @yannishuber

Regarding the module version, I am sorry that I got some misinformation earlier. After a double check, I found out that the current version of ESP32-S3-WROOM-2 modules on market do have this pull-up resistor on GPIO45. And we are just planning to release a new version of ESP32-S3-WROOM-2 module without this resistor on GPIO45.

Sorry for the trouble. We will update the module schematic for ESP32-S3-WROOM-2 datasheet by removing the NC label for the resistor on GPIO45.

[yannishuber]

All right, @esp-momo thank you for looking into this!