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ESP32S3 + JLink not working (OCD-581) #234

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higaski opened this issue Jul 5, 2022 · 9 comments
Closed

ESP32S3 + JLink not working (OCD-581) #234

higaski opened this issue Jul 5, 2022 · 9 comments
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Resolution: Won't Do Status: Done Type: Bug

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@higaski
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higaski commented Jul 5, 2022

Development Kit

ESP32-S3-DevKitC-1

Module or chip used

ESP32-S3-WROOM1

Debug Adapter

J-Link EDU

OpenOCD version

v0.11.0-esp32-20220411

Operating System

Linux

Using an IDE ?

no

OpenOCD command line

openocd -c "adapter speed 1000" -s share/openocd/scripts -f interface/jlink.cfg -f target/esp32s3.cfg

JTAG Clock Speed

1000 kHz

ESP-IDF version

ESP-IDF v5.0-dev-3654-gc2ccc383da

Problem Description

  1. Connect ESP32-S3-DevKitC-1 to JLink
  2. Make sure fuses are set correctly (either set DIS_USB_JTAG or JTAG_SEL_ENABLE)
  3. Run OpenOCD

Debug Logs

Open On-Chip Debugger  v0.11.0-esp32-20220411 (2022-04-11-08:47)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
User : 3 1 options.c:63 configuration_output_handler(): debug_level: 3
User : 4 1 options.c:63 configuration_output_handler(): 
Debug: 5 1 options.c:244 add_default_dirs(): bindir=/builds/idf/openocd-esp32/_build/../openocd-esp32/bin
Debug: 6 1 options.c:245 add_default_dirs(): pkgdatadir=/builds/idf/openocd-esp32/_build/../openocd-esp32/share/openocd
Debug: 7 1 options.c:246 add_default_dirs(): exepath=/home/vinci/.espressif/tools/openocd-esp32/v0.11.0-esp32-20220411/openocd-esp32/bin
Debug: 8 1 options.c:247 add_default_dirs(): bin2data=../share/openocd
Debug: 9 1 configuration.c:44 add_script_search_dir(): adding /home/vinci/.config/openocd
Debug: 10 1 configuration.c:44 add_script_search_dir(): adding /home/vinci/.openocd
Debug: 11 1 configuration.c:44 add_script_search_dir(): adding /home/vinci/.espressif/tools/openocd-esp32/v0.11.0-esp32-20220411/openocd-esp32/bin/../share/openocd/site
Debug: 12 1 configuration.c:44 add_script_search_dir(): adding /home/vinci/.espressif/tools/openocd-esp32/v0.11.0-esp32-20220411/openocd-esp32/bin/../share/openocd/scripts
Debug: 13 1 command.c:166 script_debug(): command - adapter speed 1000
Debug: 14 1 adapter.c:180 adapter_config_khz(): handle adapter khz
Debug: 15 1 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 16 1 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value
User : 17 1 options.c:63 configuration_output_handler(): adapter speed: 1000 kHz
User : 18 1 options.c:63 configuration_output_handler(): 
Debug: 19 1 command.c:166 script_debug(): command - ocd_find interface/jlink.cfg
Debug: 20 1 configuration.c:99 find_file(): found share/openocd/scripts/interface/jlink.cfg
Debug: 21 1 command.c:166 script_debug(): command - adapter driver jlink
Debug: 22 1 command.c:166 script_debug(): command - ocd_find target/esp32s3.cfg
Debug: 23 1 configuration.c:99 find_file(): found share/openocd/scripts/target/esp32s3.cfg
Debug: 24 1 command.c:166 script_debug(): command - transport select jtag
Debug: 25 1 command.c:166 script_debug(): command - ocd_find bitsbytes.tcl
Debug: 26 1 configuration.c:99 find_file(): found share/openocd/scripts/bitsbytes.tcl
Debug: 27 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 28 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 29 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 30 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 31 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 32 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 33 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 34 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 35 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 36 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 37 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 38 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 39 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 40 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 41 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 42 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 43 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 44 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 45 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 46 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 47 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 48 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 49 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 50 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 51 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 52 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 53 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 54 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 55 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 56 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 57 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 58 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 59 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 60 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 61 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 62 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 63 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 64 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 65 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 66 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 67 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 68 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 69 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 70 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 71 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 72 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 73 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 74 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 75 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 76 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 77 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 78 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 79 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 80 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 81 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 82 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 83 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 84 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 85 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 86 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 87 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 88 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 89 1 command.c:166 script_debug(): command - expr 1 << $x
Debug: 90 1 command.c:166 script_debug(): command - expr $x + 1
Debug: 91 1 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 92 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 93 1 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 94 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 95 1 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 96 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 97 1 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 98 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 99 1 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 100 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 101 1 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 102 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 103 1 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 104 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 105 1 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 106 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 107 1 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 108 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 109 1 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 110 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 111 1 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 112 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 113 1 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 114 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 115 1 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 116 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 117 1 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 118 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 119 1 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 120 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 121 1 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 122 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 123 1 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 124 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 125 1 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 126 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 127 1 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 128 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 129 1 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 130 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 131 1 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 132 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 133 1 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 134 1 command.c:166 script_debug(): command - expr $x * 2
Debug: 135 2 command.c:166 script_debug(): command - ocd_find memory.tcl
Debug: 136 2 configuration.c:99 find_file(): found share/openocd/scripts/memory.tcl
Debug: 137 2 command.c:166 script_debug(): command - expr $RWX_R_ONLY + $RWX_W_ONLY
Debug: 138 2 command.c:166 script_debug(): command - expr $RWX_R_ONLY + $RWX_X_ONLY
Debug: 139 2 command.c:166 script_debug(): command - expr $RWX_R_ONLY + $RWX_W_ONLY + $RWX_X_ONLY
Debug: 140 2 command.c:166 script_debug(): command - expr $ACCESS_WIDTH_8 + $ACCESS_WIDTH_16 + $ACCESS_WIDTH_32
Debug: 141 2 command.c:166 script_debug(): command - ocd_find mmr_helpers.tcl
Debug: 142 2 configuration.c:99 find_file(): found share/openocd/scripts/mmr_helpers.tcl
Debug: 143 2 command.c:166 script_debug(): command - ocd_find target/esp_common.cfg
Debug: 144 2 configuration.c:99 find_file(): found share/openocd/scripts/target/esp_common.cfg
Debug: 145 2 command.c:166 script_debug(): command - add_help_text program_esp write an image to flash, address is only required for binary images. verify, reset, exit, compress, restore_clock are optional
Debug: 146 2 command.c:166 script_debug(): command - add_usage_text program_esp <filename> [address] [verify] [reset] [exit] [compress] [restore_clock]
Debug: 147 2 command.c:166 script_debug(): command - add_help_text program_esp_bins write all the images at address specified in flasher_args.json generated while building idf project
Debug: 148 2 command.c:166 script_debug(): command - add_usage_text program_esp_bins <build_dir> flasher_args.json [verify] [reset] [exit] [compress] [restore_clock]
Debug: 149 2 command.c:166 script_debug(): command - add_help_text esp_get_mac Print MAC address of the chip. Use a `format` argument to return formatted MAC value
Debug: 150 2 command.c:166 script_debug(): command - add_usage_text esp_get_mac [format]
Debug: 151 2 command.c:166 script_debug(): command - jtag newtap esp32s3 cpu0 -irlen 5 -expected-id 0x120034e5
Debug: 152 2 tcl.c:569 jim_newtap_cmd(): Creating New Tap, Chip: esp32s3, Tap: cpu0, Dotted: esp32s3.cpu0, 4 params
Debug: 153 2 tcl.c:593 jim_newtap_cmd(): Processing option: -irlen
Debug: 154 2 tcl.c:593 jim_newtap_cmd(): Processing option: -expected-id
Debug: 155 2 core.c:1472 jtag_tap_init(): Created Tap: esp32s3.cpu0 @ abs position 0, irlen 5, capture: 0x1 mask: 0x3
Debug: 156 2 command.c:166 script_debug(): command - jtag newtap esp32s3 cpu1 -irlen 5 -expected-id 0x120034e5
Debug: 157 2 tcl.c:569 jim_newtap_cmd(): Creating New Tap, Chip: esp32s3, Tap: cpu1, Dotted: esp32s3.cpu1, 4 params
Debug: 158 2 tcl.c:593 jim_newtap_cmd(): Processing option: -irlen
Debug: 159 2 tcl.c:593 jim_newtap_cmd(): Processing option: -expected-id
Debug: 160 2 core.c:1472 jtag_tap_init(): Created Tap: esp32s3.cpu1 @ abs position 1, irlen 5, capture: 0x1 mask: 0x3
Debug: 161 2 command.c:166 script_debug(): command - target create esp32s3.cpu0 esp32s3 -endian little -chain-position esp32s3.cpu0 -coreid 0 -rtos FreeRTOS
Debug: 162 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 163 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 164 2 FreeRTOS.c:1337 freertos_create(): freertos_create
Debug: 165 2 command.c:300 register_command(): command 'esp' is already registered
Debug: 166 2 command.c:300 register_command(): command 'esp32s3.cpu0 esp' is already registered
Debug: 167 2 command.c:166 script_debug(): command - esp32s3.cpu0 configure -work-area-phys 0x403B0000 -work-area-virt 0x403B0000 -work-area-size 0x3400 -work-area-backup 1
Debug: 168 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 169 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 170 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 171 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 172 2 command.c:166 script_debug(): command - esp32s3.cpu0 configure -alt-work-area-phys 0x3FCE0000 -alt-work-area-virt 0x3FCE0000 -alt-work-area-size 0x10000 -alt-work-area-backup 1
Debug: 173 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 174 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 175 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 176 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 177 2 command.c:166 script_debug(): command - flash bank esp32s3.cpu0.flash esp32s3 0x0 0 0 0 esp32s3.cpu0
Debug: 178 2 command.c:300 register_command(): command 'esp' is already registered
Debug: 179 2 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 180 2 command.c:166 script_debug(): command - flash bank esp32s3.cpu0.irom esp32s3 0x0 0 0 0 esp32s3.cpu0
Debug: 181 2 command.c:300 register_command(): command 'esp' is already registered
Debug: 182 2 command.c:300 register_command(): command 'esp appimage_offset' is already registered
Debug: 183 2 command.c:300 register_command(): command 'esp compression' is already registered
Debug: 184 2 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 185 2 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 186 2 command.c:300 register_command(): command 'esp32s3' is already registered
Debug: 187 2 command.c:300 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 188 2 command.c:300 register_command(): command 'esp32s3 compression' is already registered
Debug: 189 2 command.c:300 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 190 2 command.c:300 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 191 2 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 192 2 command.c:166 script_debug(): command - flash bank esp32s3.cpu0.drom esp32s3 0x0 0 0 0 esp32s3.cpu0
Debug: 193 2 command.c:300 register_command(): command 'esp' is already registered
Debug: 194 2 command.c:300 register_command(): command 'esp appimage_offset' is already registered
Debug: 195 2 command.c:300 register_command(): command 'esp compression' is already registered
Debug: 196 2 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 197 2 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 198 2 command.c:300 register_command(): command 'esp32s3' is already registered
Debug: 199 2 command.c:300 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 200 2 command.c:300 register_command(): command 'esp32s3 compression' is already registered
Debug: 201 2 command.c:300 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 202 2 command.c:300 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 203 2 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 204 2 command.c:166 script_debug(): command - target create esp32s3.cpu1 esp32s3 -endian little -chain-position esp32s3.cpu1 -coreid 1 -rtos FreeRTOS
Debug: 205 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 206 2 target.c:2236 target_free_all_working_areas_restore(): freeing all working areas
Debug: 207 2 FreeRTOS.c:1337 freertos_create(): freertos_create
Debug: 208 2 command.c:300 register_command(): command 'xtensa' is already registered
Debug: 209 2 command.c:300 register_command(): command 'xtensa set_permissive' is already registered
Debug: 210 2 command.c:300 register_command(): command 'xtensa maskisr' is already registered
Debug: 211 2 command.c:300 register_command(): command 'xtensa smpbreak' is already registered
Debug: 212 2 command.c:300 register_command(): command 'xtensa perfmon_enable' is already registered
Debug: 213 2 command.c:300 register_command(): command 'xtensa perfmon_dump' is already registered
Debug: 214 2 command.c:300 register_command(): command 'xtensa tracestart' is already registered
Debug: 215 2 command.c:300 register_command(): command 'xtensa tracestop' is already registered
Debug: 216 2 command.c:300 register_command(): command 'xtensa tracedump' is already registered
Debug: 217 2 command.c:300 register_command(): command 'esp' is already registered
Debug: 218 2 command.c:300 register_command(): command 'esp semihost_basedir' is already registered
Debug: 219 2 command.c:300 register_command(): command 'esp' is already registered
Debug: 220 2 command.c:300 register_command(): command 'esp apptrace' is already registered
Debug: 221 2 command.c:300 register_command(): command 'esp sysview' is already registered
Debug: 222 2 command.c:300 register_command(): command 'esp sysview_mcore' is already registered
Debug: 223 2 command.c:300 register_command(): command 'esp gcov' is already registered
Debug: 224 2 command.c:300 register_command(): command 'esp32' is already registered
Debug: 225 2 command.c:300 register_command(): command 'esp32 smp' is already registered
Debug: 226 2 command.c:300 register_command(): command 'esp32 smp_gdb' is already registered
Debug: 227 2 command.c:300 register_command(): command 'arm' is already registered
Debug: 228 2 command.c:300 register_command(): command 'arm semihosting' is already registered
Debug: 229 2 command.c:300 register_command(): command 'arm semihosting_redirect' is already registered
Debug: 230 2 command.c:300 register_command(): command 'arm semihosting_cmdline' is already registered
Debug: 231 2 command.c:300 register_command(): command 'arm semihosting_fileio' is already registered
Debug: 232 2 command.c:300 register_command(): command 'arm semihosting_resexit' is already registered
Debug: 233 2 command.c:300 register_command(): command 'arm semihosting_read_user_param' is already registered
Debug: 234 2 command.c:300 register_command(): command 'arm semihosting_basedir' is already registered
Debug: 235 2 command.c:300 register_command(): command 'esp32s3.cpu1 esp' is already registered
Debug: 236 2 command.c:166 script_debug(): command - flash bank esp32s3.cpu1.flash esp32s3 0x0 0 0 0 esp32s3.cpu1
Debug: 237 2 command.c:300 register_command(): command 'esp' is already registered
Debug: 238 2 command.c:300 register_command(): command 'esp appimage_offset' is already registered
Debug: 239 2 command.c:300 register_command(): command 'esp compression' is already registered
Debug: 240 2 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 241 2 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 242 2 command.c:300 register_command(): command 'esp32s3' is already registered
Debug: 243 2 command.c:300 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 244 2 command.c:300 register_command(): command 'esp32s3 compression' is already registered
Debug: 245 2 command.c:300 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 246 2 command.c:300 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 247 2 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 248 2 command.c:166 script_debug(): command - flash bank esp32s3.cpu1.irom esp32s3 0x0 0 0 0 esp32s3.cpu1
Debug: 249 2 command.c:300 register_command(): command 'esp' is already registered
Debug: 250 2 command.c:300 register_command(): command 'esp appimage_offset' is already registered
Debug: 251 2 command.c:300 register_command(): command 'esp compression' is already registered
Debug: 252 2 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 253 2 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 254 2 command.c:300 register_command(): command 'esp32s3' is already registered
Debug: 255 2 command.c:300 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 256 2 command.c:300 register_command(): command 'esp32s3 compression' is already registered
Debug: 257 2 command.c:300 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 258 2 command.c:300 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 259 2 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 260 2 command.c:166 script_debug(): command - flash bank esp32s3.cpu1.drom esp32s3 0x0 0 0 0 esp32s3.cpu1
Debug: 261 2 command.c:300 register_command(): command 'esp' is already registered
Debug: 262 2 command.c:300 register_command(): command 'esp appimage_offset' is already registered
Debug: 263 2 command.c:300 register_command(): command 'esp compression' is already registered
Debug: 264 2 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 265 2 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 266 2 command.c:300 register_command(): command 'esp32s3' is already registered
Debug: 267 2 command.c:300 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 268 2 command.c:300 register_command(): command 'esp32s3 compression' is already registered
Debug: 269 2 command.c:300 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 270 2 command.c:300 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 271 2 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 272 2 command.c:166 script_debug(): command - target smp esp32s3.cpu0 esp32s3.cpu1
Debug: 273 2 target.c:6548 jim_target_smp(): 3
Debug: 274 2 target.c:6565 jim_target_smp(): esp32s3.cpu0 
Debug: 275 2 target.c:6565 jim_target_smp(): esp32s3.cpu1 
Debug: 276 2 command.c:166 script_debug(): command - esp32s3.cpu0 xtensa maskisr on
Debug: 277 2 command.c:166 script_debug(): command - esp32s3.cpu0 xtensa smpbreak BreakIn BreakOut
Debug: 278 2 xtensa.c:744 xtensa_smpbreak_set(): esp32s3.cpu0: set smpbreak=30000, state=1
Debug: 279 2 xtensa.c:744 xtensa_smpbreak_set(): esp32s3.cpu1: set smpbreak=30000, state=1
Debug: 280 2 command.c:166 script_debug(): command - esp32s3.cpu0 configure -event examine-end 
    # Need to enable to set 'semihosting_basedir'
    arm semihosting enable
    arm semihosting_resexit enable
    if { [info exists _SEMIHOST_BASEDIR] } {
        if { $_SEMIHOST_BASEDIR != "" } {
            arm semihosting_basedir $_SEMIHOST_BASEDIR
        }
    }

Debug: 281 2 command.c:166 script_debug(): command - esp32s3.cpu1 configure -event examine-end 
		# Need to enable to set 'semihosting_basedir'
		arm semihosting enable
		arm semihosting_resexit enable
		if { [info exists _SEMIHOST_BASEDIR] } {
			if { $_SEMIHOST_BASEDIR != "" } {
				arm semihosting_basedir $_SEMIHOST_BASEDIR
			}
		}
	
Debug: 282 2 command.c:166 script_debug(): command - esp32s3.cpu0 configure -event gdb-attach 
	$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
	# necessary to auto-probe flash bank when GDB is connected
	halt
	if { [esp32s3_memprot_is_enabled] } {
		# 'reset halt' to disable memory protection and allow flasher to work correctly
		echo "Memory protection is enabled. Reset target to disable it..."
		reset halt
    }

Debug: 283 2 command.c:166 script_debug(): command - esp32s3.cpu1 configure -event gdb-attach 
		$_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
		# necessary to auto-probe flash bank when GDB is connected
		halt
		if { [esp32s3_memprot_is_enabled] } {
			# 'reset halt' to disable memory protection and allow flasher to work correctly
			echo "Memory protection is enabled. Reset target to disable it..."
			reset halt
		}
	
Info : 284 2 server.c:303 add_service(): Listening on port 6666 for tcl connections
Info : 285 2 server.c:303 add_service(): Listening on port 4444 for telnet connections
Debug: 286 2 command.c:166 script_debug(): command - init
Debug: 287 2 command.c:166 script_debug(): command - target init
Debug: 288 2 command.c:166 script_debug(): command - target names
Debug: 289 2 command.c:166 script_debug(): command - esp32s3.cpu0 cget -event gdb-flash-erase-start
Debug: 290 2 command.c:166 script_debug(): command - esp32s3.cpu0 configure -event gdb-flash-erase-start reset init
Debug: 291 2 command.c:166 script_debug(): command - esp32s3.cpu0 cget -event gdb-flash-write-end
Debug: 292 2 command.c:166 script_debug(): command - esp32s3.cpu0 configure -event gdb-flash-write-end reset halt
Debug: 293 2 command.c:166 script_debug(): command - esp32s3.cpu0 cget -event gdb-attach
Debug: 294 2 command.c:166 script_debug(): command - esp32s3.cpu1 cget -event gdb-flash-erase-start
Debug: 295 2 command.c:166 script_debug(): command - esp32s3.cpu1 configure -event gdb-flash-erase-start reset init
Debug: 296 2 command.c:166 script_debug(): command - esp32s3.cpu1 cget -event gdb-flash-write-end
Debug: 297 2 command.c:166 script_debug(): command - esp32s3.cpu1 configure -event gdb-flash-write-end reset halt
Debug: 298 2 command.c:166 script_debug(): command - esp32s3.cpu1 cget -event gdb-attach
Debug: 299 2 target.c:1669 handle_target_init_command(): Initializing targets...
Debug: 300 2 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'litbase' (152) does not exist
Debug: 301 2 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'ptevaddr' (153) does not exist
Debug: 302 2 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'rasid' (154) does not exist
Debug: 303 2 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'itlbcfg' (155) does not exist
Debug: 304 2 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'dtlbcfg' (156) does not exist
Debug: 305 2 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'mepc' (157) does not exist
Debug: 306 2 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'meps' (158) does not exist
Debug: 307 2 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'mesave' (159) does not exist
Debug: 308 2 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'mesr' (160) does not exist
Debug: 309 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'mecr' (161) does not exist
Debug: 310 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'mevaddr' (162) does not exist
Debug: 311 3 semihosting_common.c:120 semihosting_common_init():  
Debug: 312 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'litbase' (152) does not exist
Debug: 313 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'ptevaddr' (153) does not exist
Debug: 314 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'rasid' (154) does not exist
Debug: 315 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'itlbcfg' (155) does not exist
Debug: 316 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'dtlbcfg' (156) does not exist
Debug: 317 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'mepc' (157) does not exist
Debug: 318 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'meps' (158) does not exist
Debug: 319 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'mesave' (159) does not exist
Debug: 320 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'mesr' (160) does not exist
Debug: 321 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'mecr' (161) does not exist
Debug: 322 3 xtensa.c:2382 xtensa_build_reg_cache(): Special reg 'mevaddr' (162) does not exist
Debug: 323 3 semihosting_common.c:120 semihosting_common_init():  
Debug: 324 3 jlink.c:647 jlink_init(): Using libjaylink 0.2.0-git-f73ad5e (compiled with 0.2.0-git-f73ad5e)
Debug: 325 360 jlink.c:525 jaylink_log_handler(): Found device (VID:PID = 1366:0101, bus:address = 005:003).
Debug: 326 360 jlink.c:525 jaylink_log_handler(): Device: USB address = 0.
Debug: 327 360 jlink.c:525 jaylink_log_handler(): Device: Serial number = 260112255.
Debug: 328 360 jlink.c:525 jaylink_log_handler(): Allocating new device instance.
Debug: 329 360 jlink.c:525 jaylink_log_handler(): Found 1 USB device(s).
Debug: 330 360 jlink.c:525 jaylink_log_handler(): Trying to open device (bus:address = 005:003).
Debug: 331 360 jlink.c:525 jaylink_log_handler(): Using endpoint 81 (IN) and 01 (OUT).
Debug: 332 360 jlink.c:525 jaylink_log_handler(): Device opened successfully.
Info : 340 360 jlink.c:718 jlink_init(): J-Link V10 compiled Nov  2 2021 12:14:50
Info : 353 361 jlink.c:759 jlink_init(): Hardware version: 10.10
Info : 362 362 jlink.c:801 jlink_init(): VTarget = 3.303 V
Debug: 368 362 jlink.c:525 jaylink_log_handler(): Last read operation left 16 bytes in the buffer.
Debug: 378 362 jlink.c:953 jlink_reset(): TRST: 0, SRST: 0
Debug: 398 366 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 399 366 adapter.c:148 adapter_khz_to_speed(): have adapter set up
Debug: 406 366 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 407 366 adapter.c:148 adapter_khz_to_speed(): have adapter set up
Info : 408 366 adapter.c:108 adapter_init(): clock speed 1000 kHz
Debug: 409 366 openocd.c:143 handle_init_command(): Debug Adapter init complete
Debug: 410 366 command.c:166 script_debug(): command - transport init
Debug: 411 366 transport.c:230 handle_transport_init(): handle_transport_init
Debug: 412 366 jlink.c:953 jlink_reset(): TRST: 0, SRST: 0
Debug: 417 367 core.c:824 jtag_add_reset(): SRST line released
Debug: 418 367 core.c:849 jtag_add_reset(): TRST line released
Debug: 419 367 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 420 367 command.c:166 script_debug(): command - jtag arp_init
Debug: 421 367 core.c:1503 jtag_init_inner(): Init JTAG chain
Debug: 422 367 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 432 367 core.c:1228 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 433 367 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset
Error: 443 368 core.c:1117 jtag_examine_chain_check(): JTAG scan chain interrogation failed: all ones
Error: 444 368 core.c:1118 jtag_examine_chain_check(): Check JTAG interface, timings, target power, etc.
Error: 445 368 core.c:1548 jtag_init_inner(): Trying to use configured scan chain anyway...
Debug: 446 368 core.c:1358 jtag_validate_ircapture(): IR capture validation scan
Error: 456 368 core.c:1410 jtag_validate_ircapture(): esp32s3.cpu0: IR capture error; saw 0x1f not 0x01
Debug: 457 368 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset
Warn : 467 369 core.c:1571 jtag_init_inner(): Bypassing JTAG setup events due to errors
Debug: 468 369 command.c:166 script_debug(): command - dap init
Debug: 469 369 arm_dap.c:107 dap_init_all(): Initializing all DAPs ...
Debug: 470 369 openocd.c:160 handle_init_command(): Examining targets...
Debug: 471 369 target.c:1857 target_call_event_callbacks(): target event 19 (examine-start) for core esp32s3.cpu0
Debug: 472 369 esp32s3.c:593 esp32s3_handle_target_event(): 19
Debug: 473 369 esp_xtensa_smp.c:609 esp_xtensa_smp_handle_target_event(): 19
Debug: 474 369 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 19
Debug: 475 369 xtensa.c:2450 xtensa_handle_target_event(): 19
Debug: 476 369 xtensa.c:685 xtensa_examine(): xtensa_examine coreid=0
Debug: 495 370 xtensa.c:695 xtensa_examine(): OCD_ID = 00000000
Debug: 496 370 target.c:1857 target_call_event_callbacks(): target event 20 (examine-fail) for core esp32s3.cpu0
Debug: 497 370 esp32s3.c:593 esp32s3_handle_target_event(): 20
Debug: 498 370 esp_xtensa_smp.c:609 esp_xtensa_smp_handle_target_event(): 20
Debug: 499 370 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 20
Debug: 500 370 xtensa.c:2450 xtensa_handle_target_event(): 20
Warn : 501 370 target.c:814 target_examine(): target esp32s3.cpu0 examination failed
Debug: 502 370 target.c:1857 target_call_event_callbacks(): target event 19 (examine-start) for core esp32s3.cpu1
Debug: 503 370 esp32s3.c:593 esp32s3_handle_target_event(): 19
Debug: 504 370 esp_xtensa_smp.c:609 esp_xtensa_smp_handle_target_event(): 19
Debug: 505 370 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 19
Debug: 506 370 xtensa.c:2450 xtensa_handle_target_event(): 19
Debug: 507 370 xtensa.c:685 xtensa_examine(): xtensa_examine coreid=1
Debug: 526 370 xtensa.c:695 xtensa_examine(): OCD_ID = 00000000
Debug: 527 370 target.c:1857 target_call_event_callbacks(): target event 20 (examine-fail) for core esp32s3.cpu1
Debug: 528 370 esp32s3.c:593 esp32s3_handle_target_event(): 20
Debug: 529 370 esp_xtensa_smp.c:609 esp_xtensa_smp_handle_target_event(): 20
Debug: 530 370 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 20
Debug: 531 370 xtensa.c:2450 xtensa_handle_target_event(): 20
Warn : 532 370 target.c:814 target_examine(): target esp32s3.cpu1 examination failed
Debug: 533 370 openocd.c:162 handle_init_command(): target examination failed
Debug: 534 370 command.c:166 script_debug(): command - flash init
Debug: 535 370 tcl.c:1386 handle_flash_init_command(): Initializing flash devices...
Debug: 536 370 command.c:166 script_debug(): command - nand init
Debug: 537 370 tcl.c:498 handle_nand_init_command(): Initializing NAND devices...
Debug: 538 370 command.c:166 script_debug(): command - pld init
Debug: 539 370 pld.c:205 handle_pld_init_command(): Initializing PLDs...
Debug: 540 370 command.c:166 script_debug(): command - tpiu init
Info : 541 370 gdb_server.c:3742 gdb_target_start(): starting gdb server for esp32s3.cpu0 on 3333
Info : 542 370 server.c:303 add_service(): Listening on port 3333 for gdb connections

Expected behavior

It is currently not possible to connect to an ESP32-S3 using OpenOCD v0.11.0-esp32-20220411 and JLink V7.66e.

For whatever reason OpenOCD always errors out ->

Error: 443 368 core.c:1117 jtag_examine_chain_check(): JTAG scan chain interrogation failed: all ones
Error: 444 368 core.c:1118 jtag_examine_chain_check(): Check JTAG interface, timings, target power, etc.
Error: 445 368 core.c:1548 jtag_init_inner(): Trying to use configured scan chain anyway...
Debug: 446 368 core.c:1358 jtag_validate_ircapture(): IR capture validation scan
Error: 456 368 core.c:1410 jtag_validate_ircapture(): esp32s3.cpu0: IR capture error; saw 0x1f not 0x01

I found suggestions before that this can be bad wiring or connections. This is defiantly not the case. I've also tried to debug a DevKitM which doesn't work either.

I've even tried to set different fuses on the two dev kits I own. On the DevKitC board I've only burned the JTAG_SEL_ENABLE fuse which seems to work as documented. On this board I can at least still use the internal USB-JTAG when pulling GPIO3 high. On the DevKitM board I've burned DIS_USB_JTAG and DIS_USB_SERIAL_JTAG.

Screenshots

No response
@github-actions github-actions bot changed the title ESP32S3 + JLink not working ESP32S3 + JLink not working (OCD-581) Jul 5, 2022
@erhankur
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erhankur commented Jul 6, 2022

@higaski Currently I don't have my jlink with me and can not try your configuration.

Did you try debugging hello_world example with both boards?
I assume, jtag pins are empty and you don't configure them from your application.
Can you please send your jlink - devkit pin connections.

@higaski
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higaski commented Jul 7, 2022

I did try debugging the hello_world example (removed the reset though) with both boards yes.

What exactly do you mean which "configure them"? What else besides setting fuses is there? As far as I know the JTAG pins don't require any special initialization in software?

My pin connections are as follows

ARM 2x5 debug connector ESP32-S3-DevKitC/M
VTref 1 3V3 any
TMS 2 MTMS 42
GND 3 G any
TCK 4 MTCK 39
TDO 6 MTDO 40
TDI 8 MTDI 41

@erhankur
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erhankur commented Jul 7, 2022

I meant, if the jtag pins configured as GPIO, there will be an issue during the OpenOCD communication. But since you tried with the hello_world app, this is not the case. Your connection also looks good.
Do you power the devkit from the jlink? Just to be sure, did you enable the Jlink power out functionality. I remember by default it is disabled.

I will give a try with Jlink EDU and turn back.

@higaski
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higaski commented Jul 7, 2022

I power both modules through the UART connector. To be honest, I didn't even know the JLink EDU can output power... 😆

@erhankur
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Ok. Here is my test outputs. I don't see an issue with my Jlink-EDU(20 pin)

I tried with the latest OpenOCD release and idf 5.0 hello_world example. JTAG_SEL_ENABLE is true in my ESP32S3-DevkitC and nothing connected to the GPIO3.

IO42 - TMS - JLINK7
IO41 - TDI - JLINK5
IO40 - TDO - JLINK13
IO39 - TCK - JLINK9
ANY 3V3 - VTREF
ANY GND - ANY GND

For the next thing to do, maybe you can connect a logic analyzer and see what is going on with the jtag pins.

$OOCD_DIR/src/openocd -s $OOCD_DIR/tcl -f interface/jlink.cfg -f target/esp32s3.cfg -c "adapter speed 1000" -d3
Open On-Chip Debugger  v0.11.0-esp32-20220706 (2022-07-18-15:04)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
User : 3 2 options.c:63 configuration_output_handler(): debug_level: 3
User : 4 2 options.c:63 configuration_output_handler():
Debug: 5 2 options.c:244 add_default_dirs(): bindir=/usr/local/bin
Debug: 6 2 options.c:245 add_default_dirs(): pkgdatadir=/usr/local/share/openocd
Debug: 7 2 options.c:246 add_default_dirs(): exepath=/Users/erhan/dev/openocd-esp32/src
Debug: 8 2 options.c:247 add_default_dirs(): bin2data=../share/openocd
Debug: 9 2 configuration.c:44 add_script_search_dir(): adding /Users/erhan/Library/Preferences/org.openocd
Debug: 10 2 configuration.c:44 add_script_search_dir(): adding /Users/erhan/.config/openocd
Debug: 11 2 configuration.c:44 add_script_search_dir(): adding /Users/erhan/.openocd
Debug: 12 2 configuration.c:44 add_script_search_dir(): adding /Users/erhan/dev/openocd-esp32/src/../share/openocd/site
Debug: 13 2 configuration.c:44 add_script_search_dir(): adding /Users/erhan/dev/openocd-esp32/src/../share/openocd/scripts
Debug: 14 2 command.c:166 script_debug(): command - ocd_find interface/jlink.cfg
Debug: 15 2 configuration.c:99 find_file(): found /Users/erhan/dev/openocd-esp32/tcl/interface/jlink.cfg
Debug: 16 2 command.c:166 script_debug(): command - adapter driver jlink
Debug: 17 3 command.c:166 script_debug(): command - ocd_find target/esp32s3.cfg
Debug: 18 3 configuration.c:99 find_file(): found /Users/erhan/dev/openocd-esp32/tcl/target/esp32s3.cfg
Debug: 19 3 command.c:166 script_debug(): command - transport select jtag
Debug: 20 3 command.c:166 script_debug(): command - ocd_find bitsbytes.tcl
Debug: 21 3 configuration.c:99 find_file(): found /Users/erhan/dev/openocd-esp32/tcl/bitsbytes.tcl
Debug: 22 3 command.c:166 script_debug(): command - expr 1 << $x
Debug: 23 3 command.c:166 script_debug(): command - expr $x + 1
Debug: 24 3 command.c:166 script_debug(): command - expr 1 << $x
Debug: 25 3 command.c:166 script_debug(): command - expr $x + 1
Debug: 26 3 command.c:166 script_debug(): command - expr 1 << $x
Debug: 27 3 command.c:166 script_debug(): command - expr $x + 1
Debug: 28 3 command.c:166 script_debug(): command - expr 1 << $x
Debug: 29 3 command.c:166 script_debug(): command - expr $x + 1
Debug: 30 3 command.c:166 script_debug(): command - expr 1 << $x
Debug: 31 3 command.c:166 script_debug(): command - expr $x + 1
Debug: 32 3 command.c:166 script_debug(): command - expr 1 << $x
Debug: 33 3 command.c:166 script_debug(): command - expr $x + 1
Debug: 34 12 command.c:166 script_debug(): command - expr 1 << $x
Debug: 35 12 command.c:166 script_debug(): command - expr $x + 1
Debug: 36 12 command.c:166 script_debug(): command - expr 1 << $x
Debug: 37 12 command.c:166 script_debug(): command - expr $x + 1
Debug: 38 12 command.c:166 script_debug(): command - expr 1 << $x
Debug: 39 12 command.c:166 script_debug(): command - expr $x + 1
Debug: 40 12 command.c:166 script_debug(): command - expr 1 << $x
Debug: 41 12 command.c:166 script_debug(): command - expr $x + 1
Debug: 42 12 command.c:166 script_debug(): command - expr 1 << $x
Debug: 43 12 command.c:166 script_debug(): command - expr $x + 1
Debug: 44 12 command.c:166 script_debug(): command - expr 1 << $x
Debug: 45 12 command.c:166 script_debug(): command - expr $x + 1
Debug: 46 12 command.c:166 script_debug(): command - expr 1 << $x
Debug: 47 12 command.c:166 script_debug(): command - expr $x + 1
Debug: 48 12 command.c:166 script_debug(): command - expr 1 << $x
Debug: 49 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 50 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 51 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 52 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 53 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 54 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 55 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 56 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 57 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 58 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 59 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 60 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 61 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 62 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 63 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 64 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 65 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 66 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 67 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 68 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 69 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 70 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 71 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 72 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 73 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 74 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 75 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 76 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 77 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 78 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 79 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 80 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 81 13 command.c:166 script_debug(): command - expr $x + 1
Debug: 82 13 command.c:166 script_debug(): command - expr 1 << $x
Debug: 83 19 command.c:166 script_debug(): command - expr $x + 1
Debug: 84 19 command.c:166 script_debug(): command - expr 1 << $x
Debug: 85 19 command.c:166 script_debug(): command - expr $x + 1
Debug: 86 19 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 87 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 88 19 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 89 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 90 19 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 91 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 92 19 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 93 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 94 19 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 95 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 96 19 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 97 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 98 19 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 99 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 100 19 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 101 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 102 19 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 103 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 104 19 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 105 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 106 19 command.c:166 script_debug(): command - expr 1024 * $x
Debug: 107 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 108 19 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 109 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 110 19 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 111 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 112 19 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 113 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 114 19 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 115 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 116 19 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 117 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 118 19 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 119 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 120 19 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 121 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 122 19 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 123 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 124 19 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 125 19 command.c:166 script_debug(): command - expr $x * 2
Debug: 126 19 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 127 21 command.c:166 script_debug(): command - expr $x * 2
Debug: 128 21 command.c:166 script_debug(): command - expr 1024 * 1024 * $x
Debug: 129 21 command.c:166 script_debug(): command - expr $x * 2
Debug: 130 21 command.c:166 script_debug(): command - ocd_find memory.tcl
Debug: 131 21 configuration.c:99 find_file(): found /Users/erhan/dev/openocd-esp32/tcl/memory.tcl
Debug: 132 21 command.c:166 script_debug(): command - expr $RWX_R_ONLY + $RWX_W_ONLY
Debug: 133 21 command.c:166 script_debug(): command - expr $RWX_R_ONLY + $RWX_X_ONLY
Debug: 134 21 command.c:166 script_debug(): command - expr $RWX_R_ONLY + $RWX_W_ONLY + $RWX_X_ONLY
Debug: 135 21 command.c:166 script_debug(): command - expr $ACCESS_WIDTH_8 + $ACCESS_WIDTH_16 + $ACCESS_WIDTH_32
Debug: 136 21 command.c:166 script_debug(): command - ocd_find mmr_helpers.tcl
Debug: 137 21 configuration.c:99 find_file(): found /Users/erhan/dev/openocd-esp32/tcl/mmr_helpers.tcl
Debug: 138 21 command.c:166 script_debug(): command - ocd_find target/esp_common.cfg
Debug: 139 21 configuration.c:99 find_file(): found /Users/erhan/dev/openocd-esp32/tcl/target/esp_common.cfg
Debug: 140 21 command.c:166 script_debug(): command - add_help_text program_esp write an image to flash, address is only required for binary images. verify, reset, exit, compress, restore_clock are optional
Debug: 141 21 command.c:166 script_debug(): command - add_usage_text program_esp <filename> [address] [verify] [reset] [exit] [compress] [no_clock_boost] [restore_clock]
Debug: 142 21 command.c:166 script_debug(): command - add_help_text program_esp_bins write all the images at address specified in flasher_args.json generated while building idf project
Debug: 143 21 command.c:166 script_debug(): command - add_usage_text program_esp_bins <build_dir> flasher_args.json [verify] [reset] [exit] [compress] [no_clock_boost] [restore_clock]
Debug: 144 21 command.c:166 script_debug(): command - add_help_text esp_get_mac Print MAC address of the chip. Use a `format` argument to return formatted MAC value
Debug: 145 21 command.c:166 script_debug(): command - add_usage_text esp_get_mac [format]
Debug: 146 21 command.c:166 script_debug(): command - jtag newtap esp32s3 cpu0 -irlen 5 -expected-id 0x120034e5
Debug: 147 22 tcl.c:569 jim_newtap_cmd(): Creating New Tap, Chip: esp32s3, Tap: cpu0, Dotted: esp32s3.cpu0, 4 params
Debug: 148 22 tcl.c:593 jim_newtap_cmd(): Processing option: -irlen
Debug: 149 22 tcl.c:593 jim_newtap_cmd(): Processing option: -expected-id
Debug: 150 22 core.c:1472 jtag_tap_init(): Created Tap: esp32s3.cpu0 @ abs position 0, irlen 5, capture: 0x1 mask: 0x3
Debug: 151 22 command.c:166 script_debug(): command - jtag newtap esp32s3 cpu1 -irlen 5 -expected-id 0x120034e5
Debug: 152 22 tcl.c:569 jim_newtap_cmd(): Creating New Tap, Chip: esp32s3, Tap: cpu1, Dotted: esp32s3.cpu1, 4 params
Debug: 153 22 tcl.c:593 jim_newtap_cmd(): Processing option: -irlen
Debug: 154 22 tcl.c:593 jim_newtap_cmd(): Processing option: -expected-id
Debug: 155 22 core.c:1472 jtag_tap_init(): Created Tap: esp32s3.cpu1 @ abs position 1, irlen 5, capture: 0x1 mask: 0x3
Debug: 156 22 command.c:166 script_debug(): command - target create esp32s3.cpu0 esp32s3 -endian little -chain-position esp32s3.cpu0 -coreid 0 -rtos FreeRTOS
Debug: 157 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 158 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 159 22 FreeRTOS.c:1387 freertos_create(): freertos_create
Debug: 160 22 command.c:300 register_command(): command 'esp' is already registered
Debug: 161 22 command.c:300 register_command(): command 'esp32s3.cpu0 esp' is already registered
Debug: 162 22 command.c:166 script_debug(): command - esp32s3.cpu0 configure -work-area-phys 0x403B0000 -work-area-virt 0x403B0000 -work-area-size 0x3400 -work-area-backup 1
Debug: 163 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 164 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 165 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 166 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 167 22 command.c:166 script_debug(): command - esp32s3.cpu0 configure -alt-work-area-phys 0x3FCE0000 -alt-work-area-virt 0x3FCE0000 -alt-work-area-size 0x10000 -alt-work-area-backup 1
Debug: 168 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 169 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 170 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 171 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 172 22 command.c:166 script_debug(): command - flash bank esp32s3.cpu0.flash esp32s3 0x0 0 0 0 esp32s3.cpu0
Debug: 173 22 command.c:300 register_command(): command 'esp' is already registered
Debug: 174 22 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 175 22 command.c:166 script_debug(): command - flash bank esp32s3.cpu0.irom esp32s3 0x0 0 0 0 esp32s3.cpu0
Debug: 176 22 command.c:300 register_command(): command 'esp' is already registered
Debug: 177 22 command.c:300 register_command(): command 'esp appimage_offset' is already registered
Debug: 178 22 command.c:300 register_command(): command 'esp compression' is already registered
Debug: 179 22 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 180 22 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 181 22 command.c:300 register_command(): command 'esp32s3' is already registered
Debug: 182 22 command.c:300 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 183 22 command.c:300 register_command(): command 'esp32s3 compression' is already registered
Debug: 184 22 command.c:300 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 185 22 command.c:300 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 186 22 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 187 22 command.c:166 script_debug(): command - flash bank esp32s3.cpu0.drom esp32s3 0x0 0 0 0 esp32s3.cpu0
Debug: 188 22 command.c:300 register_command(): command 'esp' is already registered
Debug: 189 22 command.c:300 register_command(): command 'esp appimage_offset' is already registered
Debug: 190 22 command.c:300 register_command(): command 'esp compression' is already registered
Debug: 191 22 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 192 22 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 193 22 command.c:300 register_command(): command 'esp32s3' is already registered
Debug: 194 22 command.c:300 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 195 22 command.c:300 register_command(): command 'esp32s3 compression' is already registered
Debug: 196 22 command.c:300 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 197 22 command.c:300 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 198 22 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 199 22 command.c:166 script_debug(): command - target create esp32s3.cpu1 esp32s3 -endian little -chain-position esp32s3.cpu1 -coreid 1 -rtos FreeRTOS
Debug: 200 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 201 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas
Debug: 202 22 FreeRTOS.c:1387 freertos_create(): freertos_create
Debug: 203 22 command.c:300 register_command(): command 'xtensa' is already registered
Debug: 204 22 command.c:300 register_command(): command 'xtensa set_permissive' is already registered
Debug: 205 22 command.c:300 register_command(): command 'xtensa maskisr' is already registered
Debug: 206 22 command.c:300 register_command(): command 'xtensa smpbreak' is already registered
Debug: 207 22 command.c:300 register_command(): command 'xtensa perfmon_enable' is already registered
Debug: 208 22 command.c:300 register_command(): command 'xtensa perfmon_dump' is already registered
Debug: 209 22 command.c:300 register_command(): command 'xtensa tracestart' is already registered
Debug: 210 22 command.c:300 register_command(): command 'xtensa tracestop' is already registered
Debug: 211 22 command.c:300 register_command(): command 'xtensa tracedump' is already registered
Debug: 212 22 command.c:300 register_command(): command 'esp' is already registered
Debug: 213 22 command.c:300 register_command(): command 'esp semihost_basedir' is already registered
Debug: 214 22 command.c:300 register_command(): command 'esp' is already registered
Debug: 215 22 command.c:300 register_command(): command 'esp apptrace' is already registered
Debug: 216 22 command.c:300 register_command(): command 'esp sysview' is already registered
Debug: 217 23 command.c:300 register_command(): command 'esp sysview_mcore' is already registered
Debug: 218 23 command.c:300 register_command(): command 'esp gcov' is already registered
Debug: 219 23 command.c:300 register_command(): command 'esp32' is already registered
Debug: 220 23 command.c:300 register_command(): command 'esp32 smp' is already registered
Debug: 221 23 command.c:300 register_command(): command 'esp32 smp_gdb' is already registered
Debug: 222 23 command.c:300 register_command(): command 'arm' is already registered
Debug: 223 23 command.c:300 register_command(): command 'arm semihosting' is already registered
Debug: 224 23 command.c:300 register_command(): command 'arm semihosting_redirect' is already registered
Debug: 225 23 command.c:300 register_command(): command 'arm semihosting_cmdline' is already registered
Debug: 226 23 command.c:300 register_command(): command 'arm semihosting_fileio' is already registered
Debug: 227 23 command.c:300 register_command(): command 'arm semihosting_resexit' is already registered
Debug: 228 23 command.c:300 register_command(): command 'arm semihosting_read_user_param' is already registered
Debug: 229 23 command.c:300 register_command(): command 'arm semihosting_basedir' is already registered
Debug: 230 23 command.c:300 register_command(): command 'esp32s3.cpu1 esp' is already registered
Debug: 231 23 command.c:166 script_debug(): command - flash bank esp32s3.cpu1.flash esp32s3 0x0 0 0 0 esp32s3.cpu1
Debug: 232 23 command.c:300 register_command(): command 'esp' is already registered
Debug: 233 23 command.c:300 register_command(): command 'esp appimage_offset' is already registered
Debug: 234 23 command.c:300 register_command(): command 'esp compression' is already registered
Debug: 235 23 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 236 23 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 237 23 command.c:300 register_command(): command 'esp32s3' is already registered
Debug: 238 23 command.c:300 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 239 23 command.c:300 register_command(): command 'esp32s3 compression' is already registered
Debug: 240 23 command.c:300 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 241 23 command.c:300 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 242 23 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 243 23 command.c:166 script_debug(): command - flash bank esp32s3.cpu1.irom esp32s3 0x0 0 0 0 esp32s3.cpu1
Debug: 244 23 command.c:300 register_command(): command 'esp' is already registered
Debug: 245 23 command.c:300 register_command(): command 'esp appimage_offset' is already registered
Debug: 246 23 command.c:300 register_command(): command 'esp compression' is already registered
Debug: 247 23 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 248 23 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 249 23 command.c:300 register_command(): command 'esp32s3' is already registered
Debug: 250 23 command.c:300 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 251 23 command.c:300 register_command(): command 'esp32s3 compression' is already registered
Debug: 252 23 command.c:300 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 253 23 command.c:300 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 254 23 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 255 23 command.c:166 script_debug(): command - flash bank esp32s3.cpu1.drom esp32s3 0x0 0 0 0 esp32s3.cpu1
Debug: 256 23 command.c:300 register_command(): command 'esp' is already registered
Debug: 257 23 command.c:300 register_command(): command 'esp appimage_offset' is already registered
Debug: 258 23 command.c:300 register_command(): command 'esp compression' is already registered
Debug: 259 23 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 260 23 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 261 23 command.c:300 register_command(): command 'esp32s3' is already registered
Debug: 262 23 command.c:300 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 263 23 command.c:300 register_command(): command 'esp32s3 compression' is already registered
Debug: 264 23 command.c:300 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 265 23 command.c:300 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 266 23 tcl.c:1316 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 267 23 command.c:166 script_debug(): command - target smp esp32s3.cpu0 esp32s3.cpu1
Debug: 268 23 target.c:6562 jim_target_smp(): 3
Debug: 269 23 target.c:6579 jim_target_smp(): esp32s3.cpu0
Debug: 270 23 target.c:6579 jim_target_smp(): esp32s3.cpu1
Debug: 271 23 command.c:166 script_debug(): command - esp32s3.cpu0 xtensa maskisr on
Debug: 272 23 command.c:166 script_debug(): command - esp32s3.cpu0 xtensa smpbreak BreakIn BreakOut
Debug: 273 23 xtensa.c:792 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=30000, state=1
Debug: 274 23 xtensa.c:792 xtensa_smpbreak_set(): [esp32s3.cpu1] set smpbreak=30000, state=1
Debug: 275 23 command.c:166 script_debug(): command - esp32s3.cpu0 configure -event examine-end
	# Need to enable to set 'semihosting_basedir'
	arm semihosting enable
	arm semihosting_resexit enable
	if { [info exists _SEMIHOST_BASEDIR] } {
		if { $_SEMIHOST_BASEDIR != "" } {
			arm semihosting_basedir $_SEMIHOST_BASEDIR
		}
	}

Debug: 276 23 command.c:166 script_debug(): command - esp32s3.cpu1 configure -event examine-end
		# Need to enable to set 'semihosting_basedir'
		arm semihosting enable
		arm semihosting_resexit enable
		if { [info exists _SEMIHOST_BASEDIR] } {
			if { $_SEMIHOST_BASEDIR != "" } {
				arm semihosting_basedir $_SEMIHOST_BASEDIR
			}
		}

Debug: 277 23 command.c:166 script_debug(): command - esp32s3.cpu0 configure -event gdb-attach
	$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
	# necessary to auto-probe flash bank when GDB is connected and generate proper memory map
	halt 1000
	if { [esp32s3_memprot_is_enabled] } {
		# 'reset halt' to disable memory protection and allow flasher to work correctly
		echo "Memory protection is enabled. Reset target to disable it..."
		reset halt
	}

Debug: 278 24 command.c:166 script_debug(): command - esp32s3.cpu0 configure -event reset-assert-post  soft_reset_halt
Debug: 279 24 command.c:166 script_debug(): command - esp32s3.cpu1 configure -event gdb-attach
		$_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
		# necessary to auto-probe flash bank when GDB is connected
		halt 1000
		if { [esp32s3_memprot_is_enabled] } {
			# 'reset halt' to disable memory protection and allow flasher to work correctly
			echo "Memory protection is enabled. Reset target to disable it..."
			reset halt
		}

Debug: 280 24 command.c:166 script_debug(): command - esp32s3.cpu1 configure -event reset-assert-post  soft_reset_halt
Debug: 281 24 command.c:166 script_debug(): command - adapter speed 1000
Debug: 282 24 adapter.c:180 adapter_config_khz(): handle adapter khz
Debug: 283 24 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 284 24 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value
User : 285 24 options.c:63 configuration_output_handler(): adapter speed: 1000 kHz
User : 286 24 options.c:63 configuration_output_handler():
Info : 287 24 server.c:303 add_service(): Listening on port 6666 for tcl connections
Info : 288 24 server.c:303 add_service(): Listening on port 4444 for telnet connections
Debug: 289 24 command.c:166 script_debug(): command - init
Debug: 290 24 command.c:166 script_debug(): command - target init
Debug: 291 24 command.c:166 script_debug(): command - target names
Debug: 292 24 command.c:166 script_debug(): command - esp32s3.cpu0 cget -event gdb-flash-erase-start
Debug: 293 24 command.c:166 script_debug(): command - esp32s3.cpu0 configure -event gdb-flash-erase-start reset init
Debug: 294 24 command.c:166 script_debug(): command - esp32s3.cpu0 cget -event gdb-flash-write-end
Debug: 295 24 command.c:166 script_debug(): command - esp32s3.cpu0 configure -event gdb-flash-write-end reset halt
Debug: 296 24 command.c:166 script_debug(): command - esp32s3.cpu0 cget -event gdb-attach
Debug: 297 24 command.c:166 script_debug(): command - esp32s3.cpu1 cget -event gdb-flash-erase-start
Debug: 298 24 command.c:166 script_debug(): command - esp32s3.cpu1 configure -event gdb-flash-erase-start reset init
Debug: 299 24 command.c:166 script_debug(): command - esp32s3.cpu1 cget -event gdb-flash-write-end
Debug: 300 24 command.c:166 script_debug(): command - esp32s3.cpu1 configure -event gdb-flash-write-end reset halt
Debug: 301 24 command.c:166 script_debug(): command - esp32s3.cpu1 cget -event gdb-attach
Debug: 302 24 target.c:1672 handle_target_init_command(): Initializing targets...
Debug: 303 24 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'litbase' (152) does not exist
Debug: 304 24 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'ptevaddr' (153) does not exist
Debug: 305 24 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'rasid' (154) does not exist
Debug: 306 24 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'itlbcfg' (155) does not exist
Debug: 307 24 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'dtlbcfg' (156) does not exist
Debug: 308 24 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mepc' (157) does not exist
Debug: 309 24 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'meps' (158) does not exist
Debug: 310 24 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mesave' (159) does not exist
Debug: 311 24 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mesr' (160) does not exist
Debug: 312 24 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mecr' (161) does not exist
Debug: 313 24 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mevaddr' (162) does not exist
Debug: 314 25 semihosting_common.c:118 semihosting_common_init():
Debug: 315 25 semihosting_common.c:118 semihosting_common_init():
Debug: 316 25 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'litbase' (152) does not exist
Debug: 317 25 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'ptevaddr' (153) does not exist
Debug: 318 25 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'rasid' (154) does not exist
Debug: 319 25 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'itlbcfg' (155) does not exist
Debug: 320 25 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'dtlbcfg' (156) does not exist
Debug: 321 25 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mepc' (157) does not exist
Debug: 322 25 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'meps' (158) does not exist
Debug: 323 25 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mesave' (159) does not exist
Debug: 324 25 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mesr' (160) does not exist
Debug: 325 25 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mecr' (161) does not exist
Debug: 326 25 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mevaddr' (162) does not exist
Debug: 327 26 semihosting_common.c:118 semihosting_common_init():
Debug: 328 26 semihosting_common.c:118 semihosting_common_init():
Debug: 329 26 jlink.c:647 jlink_init(): Using libjaylink 0.2.0-git-f73ad5e (compiled with 0.2.0-git-f73ad5e)
Debug: 330 45 jlink.c:525 jaylink_log_handler(): Found device (VID:PID = 1366:0101, bus:address = 020:035).
Debug: 331 45 jlink.c:525 jaylink_log_handler(): Device: USB address = 0.
Debug: 332 45 jlink.c:525 jaylink_log_handler(): Device: Serial number = 260106593.
Debug: 333 45 jlink.c:525 jaylink_log_handler(): Allocating new device instance.
Debug: 334 45 jlink.c:525 jaylink_log_handler(): Found 1 USB device(s).
Debug: 335 45 jlink.c:525 jaylink_log_handler(): Trying to open device (bus:address = 020:035).
Debug: 336 45 jlink.c:525 jaylink_log_handler(): Using endpoint 81 (IN) and 01 (OUT).
Debug: 337 46 jlink.c:525 jaylink_log_handler(): Device opened successfully.
Info : 345 46 jlink.c:718 jlink_init(): J-Link V10 compiled Feb  4 2021 12:58:41
Info : 358 47 jlink.c:759 jlink_init(): Hardware version: 10.10
Info : 367 47 jlink.c:801 jlink_init(): VTarget = 3.322 V
Debug: 373 48 jlink.c:525 jaylink_log_handler(): Last read operation left 16 bytes in the buffer.
Debug: 383 48 jlink.c:953 jlink_reset(): TRST: 0, SRST: 0
Debug: 403 53 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 404 53 adapter.c:148 adapter_khz_to_speed(): have adapter set up
Debug: 411 53 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 412 53 adapter.c:148 adapter_khz_to_speed(): have adapter set up
Info : 413 53 adapter.c:108 adapter_init(): clock speed 1000 kHz
Debug: 414 53 openocd.c:143 handle_init_command(): Debug Adapter init complete
Debug: 415 53 command.c:166 script_debug(): command - transport init
Debug: 416 53 transport.c:230 handle_transport_init(): handle_transport_init
Debug: 417 53 jlink.c:953 jlink_reset(): TRST: 0, SRST: 0
Debug: 422 53 core.c:824 jtag_add_reset(): SRST line released
Debug: 423 53 core.c:849 jtag_add_reset(): TRST line released
Debug: 424 53 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 425 53 command.c:166 script_debug(): command - jtag arp_init
Debug: 426 53 core.c:1503 jtag_init_inner(): Init JTAG chain
Debug: 427 53 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 437 54 core.c:1228 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 438 54 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 448 55 core.c:1127 jtag_examine_chain_display(): JTAG tap: esp32s3.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : 449 55 core.c:1127 jtag_examine_chain_display(): JTAG tap: esp32s3.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Debug: 450 55 core.c:1358 jtag_validate_ircapture(): IR capture validation scan
Debug: 460 55 core.c:1416 jtag_validate_ircapture(): esp32s3.cpu0: IR capture 0x01
Debug: 461 55 core.c:1416 jtag_validate_ircapture(): esp32s3.cpu1: IR capture 0x01
Debug: 462 55 command.c:166 script_debug(): command - dap init
Debug: 463 55 arm_dap.c:109 dap_init_all(): Initializing all DAPs ...
Debug: 464 55 openocd.c:160 handle_init_command(): Examining targets...
Debug: 465 55 target.c:1860 target_call_event_callbacks(): target event 19 (examine-start) for core esp32s3.cpu0
Debug: 466 55 esp32s3.c:561 esp32s3_handle_target_event(): 19
Debug: 467 55 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 19
Debug: 468 55 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 19
Debug: 469 55 xtensa.c:2392 xtensa_handle_target_event(): 19
Debug: 470 55 xtensa.c:737 xtensa_examine(): coreid = 0
Debug: 489 56 xtensa.c:749 xtensa_examine(): OCD_ID = 0b339fd2
Debug: 490 56 target.c:1860 target_call_event_callbacks(): target event 21 (examine-end) for core esp32s3.cpu0
Debug: 491 56 target.c:5153 target_handle_event(): target(0): esp32s3.cpu0 (esp32s3) event: 21 (examine-end) action:
	# Need to enable to set 'semihosting_basedir'
	arm semihosting enable
	arm semihosting_resexit enable
	if { [info exists _SEMIHOST_BASEDIR] } {
		if { $_SEMIHOST_BASEDIR != "" } {
			arm semihosting_basedir $_SEMIHOST_BASEDIR
		}
	}

Debug: 492 56 command.c:166 script_debug(): command - arm semihosting enable
Debug: 529 58 esp_xtensa_smp.c:176 esp_xtensa_smp_poll(): [esp32s3.cpu0] Check for unexamined cores after reset
Debug: 530 58 target.c:1860 target_call_event_callbacks(): target event 19 (examine-start) for core esp32s3.cpu1
Debug: 531 58 esp32s3.c:561 esp32s3_handle_target_event(): 19
Debug: 532 58 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 19
Debug: 533 58 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 19
Debug: 534 58 xtensa.c:2392 xtensa_handle_target_event(): 19
Debug: 535 58 xtensa.c:737 xtensa_examine(): coreid = 1
Debug: 554 58 xtensa.c:749 xtensa_examine(): OCD_ID = 0b339fd2
Debug: 555 58 target.c:1860 target_call_event_callbacks(): target event 21 (examine-end) for core esp32s3.cpu1
Debug: 556 58 target.c:5153 target_handle_event(): target(1): esp32s3.cpu1 (esp32s3) event: 21 (examine-end) action:
		# Need to enable to set 'semihosting_basedir'
		arm semihosting enable
		arm semihosting_resexit enable
		if { [info exists _SEMIHOST_BASEDIR] } {
			if { $_SEMIHOST_BASEDIR != "" } {
				arm semihosting_basedir $_SEMIHOST_BASEDIR
			}
		}

Debug: 557 58 command.c:166 script_debug(): command - arm semihosting enable
Debug: 558 58 esp_xtensa_semihosting.c:49 esp_xtensa_semihosting_setup(): [esp32s3.cpu1] semihosting enable=1
Debug: 559 58 command.c:166 script_debug(): command - arm semihosting_resexit enable
Debug: 560 58 command.c:166 script_debug(): command - arm semihosting_basedir .
Debug: 561 58 esp32s3.c:561 esp32s3_handle_target_event(): 21
Debug: 562 58 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 21
Debug: 563 58 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 21
Debug: 564 58 xtensa.c:2392 xtensa_handle_target_event(): 21
Debug: 565 58 xtensa.c:776 xtensa_smpbreak_write(): [esp32s3.cpu1] write smpbreak set=0x30000 clear=0x600000
Debug: 611 60 esp_xtensa_smp.c:176 esp_xtensa_smp_poll(): [esp32s3.cpu1] Check for unexamined cores after reset
Debug: 612 60 esp_xtensa_semihosting.c:49 esp_xtensa_semihosting_setup(): [esp32s3.cpu0] semihosting enable=1
Debug: 613 60 command.c:166 script_debug(): command - arm semihosting_resexit enable
Debug: 686 64 command.c:166 script_debug(): command - arm semihosting_basedir .
Debug: 759 68 esp32s3.c:561 esp32s3_handle_target_event(): 21
Debug: 760 68 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 21
Debug: 761 68 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 21
Debug: 762 68 xtensa.c:2392 xtensa_handle_target_event(): 21
Debug: 763 68 xtensa.c:776 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x30000 clear=0x600000
Debug: 773 69 target.c:1860 target_call_event_callbacks(): target event 19 (examine-start) for core esp32s3.cpu1
Debug: 774 69 esp32s3.c:561 esp32s3_handle_target_event(): 19
Debug: 775 69 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 19
Debug: 776 69 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 19
Debug: 777 69 xtensa.c:2392 xtensa_handle_target_event(): 19
Debug: 778 69 xtensa.c:737 xtensa_examine(): coreid = 1
Debug: 797 70 xtensa.c:749 xtensa_examine(): OCD_ID = 0b339fd2
Debug: 798 70 target.c:1860 target_call_event_callbacks(): target event 21 (examine-end) for core esp32s3.cpu1
Debug: 799 70 target.c:5153 target_handle_event(): target(1): esp32s3.cpu1 (esp32s3) event: 21 (examine-end) action:
		# Need to enable to set 'semihosting_basedir'
		arm semihosting enable
		arm semihosting_resexit enable
		if { [info exists _SEMIHOST_BASEDIR] } {
			if { $_SEMIHOST_BASEDIR != "" } {
				arm semihosting_basedir $_SEMIHOST_BASEDIR
			}
		}

Debug: 800 70 command.c:166 script_debug(): command - arm semihosting enable
Debug: 873 74 esp_xtensa_semihosting.c:49 esp_xtensa_semihosting_setup(): [esp32s3.cpu1] semihosting enable=1
Debug: 874 74 command.c:166 script_debug(): command - arm semihosting_resexit enable
Debug: 947 78 command.c:166 script_debug(): command - arm semihosting_basedir .
Debug: 1020 81 esp32s3.c:561 esp32s3_handle_target_event(): 21
Debug: 1021 81 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 21
Debug: 1022 81 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 21
Debug: 1023 81 xtensa.c:2392 xtensa_handle_target_event(): 21
Debug: 1024 81 xtensa.c:776 xtensa_smpbreak_write(): [esp32s3.cpu1] write smpbreak set=0x30000 clear=0x600000
Debug: 1034 81 command.c:166 script_debug(): command - flash init
Debug: 1107 84 tcl.c:1386 handle_flash_init_command(): Initializing flash devices...
Debug: 1108 84 command.c:166 script_debug(): command - nand init
Debug: 1181 87 tcl.c:498 handle_nand_init_command(): Initializing NAND devices...
Debug: 1182 87 command.c:166 script_debug(): command - pld init
Debug: 1255 90 pld.c:205 handle_pld_init_command(): Initializing PLDs...
Debug: 1256 90 command.c:166 script_debug(): command - tpiu init
Info : 1329 93 gdb_server.c:3796 gdb_target_start(): starting gdb server for esp32s3.cpu0 on 3333
Info : 1330 89 server.c:303 add_service(): Listening on port 3333 for gdb connections`


espefuse.py -p /dev/tty.usbserial-1430 summary
Connecting....
Detecting chip type... ESP32-S3
espefuse.py v4.1

=== Run "summary" command ===
EFUSE_NAME (Block) Description  = [Meaningful Value] [Readable/Writeable] (Hex Value)
----------------------------------------------------------------------------------------
Config fuses:
DIS_ICACHE (BLOCK0)                                Disables ICache                                    = False R/W (0b0)
DIS_DCACHE (BLOCK0)                                Disables DCache                                    = False R/W (0b0)
DIS_DOWNLOAD_ICACHE (BLOCK0)                       Disables Icache when SoC is in Download mode       = False R/W (0b0)
DIS_DOWNLOAD_DCACHE (BLOCK0)                       Disables Dcache when SoC is in Download mode       = False R/W (0b0)
DIS_FORCE_DOWNLOAD (BLOCK0)                        Disables forcing chip into Download mode           = False R/W (0b0)
DIS_CAN (BLOCK0)                                   Disables the TWAI Controller hardware              = False R/W (0b0)
DIS_APP_CPU (BLOCK0)                               Disables APP CPU                                   = False R/W (0b0)
FLASH_TPUW (BLOCK0)                                Configures flash startup delay after SoC power-up, = 0 R/W (0x0)
                                                    unit is (ms/2). When the value is 15, delay is 7.
                                                   5 ms
DIS_DIRECT_BOOT (BLOCK0)                           Disables direct boot mode                          = False R/W (0b0)
DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0)             Disables USB-Serial-JTAG ROM printing              = False R/W (0b0)
FLASH_ECC_MODE (BLOCK0)                            Configures the ECC mode for SPI flash
   = 16-byte to 18-byte mode R/W (0b0)
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0)         Disables USB-Serial-JTAG download feature in UART  = False R/W (0b0)
                                                   download boot mode
UART_PRINT_CONTROL (BLOCK0)                        Sets the default UART boot message output mode     = Enabled R/W (0b00)
FLASH_TYPE (BLOCK0)                                Selects SPI flash type                             = 8 data lines R/W (0b1)
FLASH_PAGE_SIZE (BLOCK0)                           Sets the size of flash page                        = 0 R/W (0b00)
FLASH_ECC_EN (BLOCK0)                              Enables ECC in Flash boot mode                     = False R/W (0b0)
FORCE_SEND_RESUME (BLOCK0)                         Forces ROM code to send an SPI flash resume comman = False R/W (0b0)
                                                   d during SPI boot
DIS_USB_OTG_DOWNLOAD_MODE (BLOCK0)                 Disables USB-OTG download feature in UART download = True R/W (0b1)
                                                    boot mode
BLOCK_USR_DATA (BLOCK3)                            User data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W

Efuse fuses:
WR_DIS (BLOCK0)                                    Disables programming of individual eFuses          = 0 R/W (0x00000000)
RD_DIS (BLOCK0)                                    Disables software reading from BLOCK4-10           = 0 R/W (0b0000000)

Identity fuses:
SECURE_VERSION (BLOCK0)                            Secure version (used by ESP-IDF anti-rollback feat = 0 R/W (0x0000)
                                                   ure)
MAC (BLOCK1)                                       Factory MAC Address
   = 7c:df:a1:e1:19:00 (OK) R/W
WAFER_VERSION (BLOCK1)                             WAFER version                                      = 1 R/W (0b001)
PKG_VERSION (BLOCK1)                               ??? Package version                                = ESP32-S3 R/W (0x0)
BLOCK1_VERSION (BLOCK1)                            ??? BLOCK1 efuse version                           = 1 R/W (0b001)
OPTIONAL_UNIQUE_ID (BLOCK2)                        ??? Optional unique 128-bit ID
   = 83 11 55 a8 38 28 2a d6 8f c1 b4 02 74 dc d2 3f R/W
BLOCK2_VERSION (BLOCK2)                            ??? Version of BLOCK2                              = 3 R/W (0b011)
CUSTOM_MAC (BLOCK3)                                Custom MAC Address
   = 00:00:00:00:00:00 (OK) R/W

Security fuses:
SOFT_DIS_JTAG (BLOCK0)                             Software disables JTAG by programming odd number o = 0 R/W (0b000)
                                                   f 1 bit(s). JTAG can be re-enabled via HMAC periph
                                                   eral
HARD_DIS_JTAG (BLOCK0)                             Hardware disables JTAG permanently                 = False R/W (0b0)
DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0)               Disables flash encryption when in download boot mo = False R/W (0b0)
                                                   des
SPI_BOOT_CRYPT_CNT (BLOCK0)                        Enables encryption and decryption, when an SPI boo = Disable R/W (0b000)
                                                   t mode is set. Enabled when 1 or 3 bits are set,di
                                                   sabled otherwise
SECURE_BOOT_KEY_REVOKE0 (BLOCK0)                   Revokes use of secure boot key digest 0            = False R/W (0b0)
SECURE_BOOT_KEY_REVOKE1 (BLOCK0)                   Revokes use of secure boot key digest 1            = False R/W (0b0)
SECURE_BOOT_KEY_REVOKE2 (BLOCK0)                   Revokes use of secure boot key digest 2            = False R/W (0b0)
KEY_PURPOSE_0 (BLOCK0)                             KEY0 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_1 (BLOCK0)                             KEY1 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_2 (BLOCK0)                             KEY2 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_3 (BLOCK0)                             KEY3 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_4 (BLOCK0)                             KEY4 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_5 (BLOCK0)                             KEY5 purpose                                       = USER R/W (0x0)
SECURE_BOOT_EN (BLOCK0)                            Enables secure boot                                = False R/W (0b0)
SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0)             Enables aggressive secure boot key revocation mode = False R/W (0b0)
STRAP_JTAG_SEL (BLOCK0)                            Enable selection between usb_to_jtagor pad_to_jtag = True R/W (0b1)
                                                    through GPIO3
DIS_DOWNLOAD_MODE (BLOCK0)                         Disables all Download boot modes                   = False R/W (0b0)
ENABLE_SECURITY_DOWNLOAD (BLOCK0)                  Enables secure UART download mode (read/write flas = False R/W (0b0)
                                                   h only)
BLOCK_KEY0 (BLOCK4)
  Purpose: USER
               Encryption key0 or user data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY1 (BLOCK5)
  Purpose: USER
               Encryption key1 or user data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY2 (BLOCK6)
  Purpose: USER
               Encryption key2 or user data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY3 (BLOCK7)
  Purpose: USER
               Encryption key3 or user data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY4 (BLOCK8)
  Purpose: USER
               Encryption key4 or user data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY5 (BLOCK9)
  Purpose: USER
               Encryption key5 or user data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_SYS_DATA2 (BLOCK10)                          System data (part 2)
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W

Spi_Pad_Config fuses:
SPI_PAD_CONFIG_CLK (BLOCK1)                        SPI CLK pad                                        = 0 R/W (0b000000)
SPI_PAD_CONFIG_Q (BLOCK1)                          SPI Q (D1) pad                                     = 0 R/W (0b000000)
SPI_PAD_CONFIG_D (BLOCK1)                          SPI D (D0) pad                                     = 0 R/W (0b000000)
SPI_PAD_CONFIG_CS (BLOCK1)                         SPI CS pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_HD (BLOCK1)                         SPI HD (D3) pad                                    = 0 R/W (0b000000)
SPI_PAD_CONFIG_WP (BLOCK1)                         SPI WP (D2) pad                                    = 0 R/W (0b000000)
SPI_PAD_CONFIG_DQS (BLOCK1)                        SPI DQS pad                                        = 0 R/W (0b000000)
SPI_PAD_CONFIG_D4 (BLOCK1)                         SPI D4 pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_D5 (BLOCK1)                         SPI D5 pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_D6 (BLOCK1)                         SPI D6 pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_D7 (BLOCK1)                         SPI D7 pad                                         = 0 R/W (0b000000)

Usb Config fuses:
DIS_USB (BLOCK0)                                   Disables the USB OTG hardware                      = False R/W (0b0)
USB_EXCHG_PINS (BLOCK0)                            Exchanges USB D+ and D- pins                       = False R/W (0b0)
EXT_PHY_ENABLE (BLOCK0)                            Enables external USB PHY                           = False R/W (0b0)
BTLC_GPIO_ENABLE (BLOCK0)                          Enables BTLC GPIO                                  = 0 R/W (0b00)
DIS_USB_JTAG (BLOCK0)                              Disable usb_serial_jtag-to-jtag function           = False R/W (0b0)
DIS_USB_SERIAL_JTAG (BLOCK0)                       Disable usb_serial_jtag module                     = False R/W (0b0)
USB_PHY_SEL (BLOCK0)                               Select internal/external PHY for USB OTGand usb_se = False R/W (0b0)
                                                   rial_jtag

Vdd_Spi Config fuses:
VDD_SPI_XPD (BLOCK0)                               The VDD_SPI regulator is powered on                = True R/W (0b1)
VDD_SPI_TIEH (BLOCK0)                              The VDD_SPI power supply voltage at reset          = Connect to 1.8V LDO R/W (0b0)
VDD_SPI_FORCE (BLOCK0)                             Force using VDD_SPI_XPD and VDD_SPI_TIEH to config = True R/W (0b1)
                                                   ure VDD_SPI LDO
PIN_POWER_SELECTION (BLOCK0)                       Sets default power supply for GPIO33..37           = VDD_SPI R/W (0b1)

Wdt Config fuses:
WDT_DELAY_SEL (BLOCK0)                             Selects RTC WDT timeout threshold at startup       = 0 R/W (0b00)

Flash voltage (VDD_SPI) set to 1.8V by efuse.

@higaski
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higaski commented Jul 18, 2022 •
edited

Ok, I have no idea why but all of the sudden it started working for me too.

Info : JTAG tap: esp32s3.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32s3.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)

The only thing that changed on my system in the meantime is the SEGGER version:

JLinkExe --version
SEGGER J-Link Commander V7.66f (Compiled Jul  5 2022 15:23:22)
DLL version V7.66f, compiled Jul  5 2022 15:23:08

When I initially posted this issue it has been 7.66e.
Maybe it has been "their" issue all along?

What JLink version have you been using?

/edit
ok nevermind, I've tried downgrading to 7.66e and its still working... I apologize for wasting your time...

@erhankur
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This is what I have.

C:\ProgramData\Microsoft\Windows\Start Menu\Programs\SEGGER - J-Link V6.95d>"J-Link Commander V6.95d.lnk"
SEGGER J-Link Commander V6.95d (Compiled Feb 12 2021 16:39:44)
DLL version V6.95d, compiled Feb 12 2021 16:38:31

Connecting to J-Link via USB...O.K.
Firmware: J-Link V10 compiled Feb  4 2021 12:58:41
Hardware version: V10.10
S/N: 260106593
License(s): FlashBP, GDB
OEM: SEGGER-EDU
VTref=0.000V

ok nevermind, I've tried downgrading to 7.66e and its still working... I apologize for wasting your time...

No problem. I am closing this issue.

@mfeil-leviton
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Did you ever find out what the original issue was?

@higaski
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higaski commented Aug 1, 2023

Not really no sry.

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@higaski @erhankur @espressif-bot @mfeil-leviton