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riscv64 core, possible H extension? #184

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DasAbhi opened this issue Aug 20, 2023 · 5 comments
Open

riscv64 core, possible H extension? #184

DasAbhi opened this issue Aug 20, 2023 · 5 comments

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@DasAbhi
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DasAbhi commented Aug 20, 2023

Hello I was wondering, is it feasible to add the "H" extension for hypervisors to the 64bit core? Or would that require too much re-engineering of your existing design ?

I am asking because hardware with H extension isn't available for consumers right now, so I am exploring an fpga option. Just wanted to know if it is even possible to add H extension in your riscv64 core.

@eugene-tarassov
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The hypervisor extension is available.
To enable it, just add new WithHypervisor to any of the 64bit core configs.
I personally have not tried it.

@FrancoAuri96
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@DasAbhi Did you manage to sythetize the core with the H-extension?

@Comet959
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@DasAbhi Hey, did you finish adding H extension to the repo?

@Comet959
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Adding new WithHypervusir ++ to src/main/scala/rocket.scala can finish it.

@Comet959
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Comet959 commented Jun 27, 2024

This issue can be closed.

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