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ethernet: mediatek: mtk_eth_soc: add support for initializing the PPE
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The PPE (packet processing engine) is used to offload NAT/routed or even
bridged flows. This patch brings up the PPE and uses it to get a packet
hash. It also contains some functionality that will be used to bring up
flow offloading.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
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nbd168 authored and frank-w committed Jan 23, 2021
1 parent 7001316 commit 875de09
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Showing 7 changed files with 1,190 additions and 3 deletions.
2 changes: 1 addition & 1 deletion drivers/net/ethernet/mediatek/Makefile
Expand Up @@ -4,5 +4,5 @@
#

obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o
mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o
mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o
obj-$(CONFIG_NET_MEDIATEK_STAR_EMAC) += mtk_star_emac.o
21 changes: 19 additions & 2 deletions drivers/net/ethernet/mediatek/mtk_eth_soc.c
Expand Up @@ -2255,12 +2255,17 @@ static int mtk_open(struct net_device *dev)

/* we run 2 netdevs on the same dma ring so we only bring it up once */
if (!refcount_read(&eth->dma_refcnt)) {
int err = mtk_start_dma(eth);
u32 gdm_config = MTK_GDMA_TO_PDMA;
int err;

err = mtk_start_dma(eth);
if (err)
return err;

mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
if (eth->soc->offload_version && mtk_ppe_start(&eth->ppe) == 0)
gdm_config = MTK_GDMA_TO_PPE;

mtk_gdm_config(eth, gdm_config);

napi_enable(&eth->tx_napi);
napi_enable(&eth->rx_napi);
Expand Down Expand Up @@ -2327,6 +2332,9 @@ static int mtk_stop(struct net_device *dev)

mtk_dma_free(eth);

if (eth->soc->offload_version)
mtk_ppe_stop(&eth->ppe);

return 0;
}

Expand Down Expand Up @@ -3055,6 +3063,13 @@ static int mtk_probe(struct platform_device *pdev)
goto err_free_dev;
}

if (eth->soc->offload_version) {
err = mtk_ppe_init(&eth->ppe, eth->dev,
eth->base + MTK_ETH_PPE_BASE, 2);
if (err)
goto err_free_dev;
}

for (i = 0; i < MTK_MAX_DEVS; i++) {
if (!eth->netdev[i])
continue;
Expand Down Expand Up @@ -3129,6 +3144,7 @@ static const struct mtk_soc_data mt7621_data = {
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7621_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
};

static const struct mtk_soc_data mt7622_data = {
Expand All @@ -3137,6 +3153,7 @@ static const struct mtk_soc_data mt7622_data = {
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7622_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
};

static const struct mtk_soc_data mt7623_data = {
Expand Down
11 changes: 11 additions & 0 deletions drivers/net/ethernet/mediatek/mtk_eth_soc.h
Expand Up @@ -15,6 +15,7 @@
#include <linux/u64_stats_sync.h>
#include <linux/refcount.h>
#include <linux/phylink.h>
#include "mtk_ppe.h"

#define MTK_QDMA_PAGE_SIZE 2048
#define MTK_MAX_RX_LENGTH 1536
Expand Down Expand Up @@ -85,6 +86,7 @@
#define MTK_GDMA_TCS_EN BIT(21)
#define MTK_GDMA_UCS_EN BIT(20)
#define MTK_GDMA_TO_PDMA 0x0
#define MTK_GDMA_TO_PPE 0x4444
#define MTK_GDMA_DROP_ALL 0x7777

/* Unicast Filter MAC Address Register - Low */
Expand Down Expand Up @@ -299,6 +301,12 @@
/* QDMA descriptor rxd3 */
#define RX_DMA_VID(_x) ((_x) & 0xfff)

/* QDMA descriptor rxd4 */
#define MTK_RXD4_FOE_ENTRY GENMASK(13, 0)
#define MTK_RXD4_PPE_CPU_REASON GENMASK(18, 14)
#define MTK_RXD4_SRC_PORT GENMASK(21, 19)
#define MTK_RXD4_ALG GENMASK(31, 22)

/* QDMA descriptor rxd4 */
#define RX_DMA_L4_VALID BIT(24)
#define RX_DMA_L4_VALID_PDMA BIT(30) /* when PDMA is used */
Expand Down Expand Up @@ -796,6 +804,7 @@ struct mtk_soc_data {
u32 caps;
u32 required_clks;
bool required_pctl;
u8 offload_version;
netdev_features_t hw_features;
};

Expand Down Expand Up @@ -895,6 +904,8 @@ struct mtk_eth {
u32 tx_int_status_reg;
u32 rx_dma_l4_valid;
int ip_align;

struct mtk_ppe ppe;
};

/* struct mtk_mac - the structure that holds the info about the MACs of the
Expand Down

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