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startup_stm32mp15xx.lst
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startup_stm32mp15xx.lst
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ARM Macro Assembler Page 1
1 00000000 ;*******************************************************
***********************
2 00000000 ;* File Name : startup_stm32mp15xx.s
3 00000000 ;* Author : MCD Application Team
4 00000000 ;* Description : STM32MP15xx devices vector table
for MDK-ARM toolchain.
5 00000000 ;* This module performs:
6 00000000 ;* - Set the initial SP
7 00000000 ;* - Set the initial PC == Reset_Ha
ndler
8 00000000 ;* - Set the vector table entries w
ith the exceptions ISR address
9 00000000 ;* - Branches to __main in the C li
brary (which eventually
10 00000000 ;* calls main()).
11 00000000 ;* After Reset the CortexM4 process
or is in Thread mode,
12 00000000 ;* priority is Privileged, and the
Stack is set to Main.
13 00000000 ;* <<< Use Configuration Wizard in Context Menu >>>
14 00000000 ;*******************************************************
***********************
15 00000000 ;* @attention
16 00000000 ;*
17 00000000 ;* <h2><center>© Copyright (c) 2019 STMicroelectron
ics.
18 00000000 ;* All rights reserved.</center></h2>
19 00000000 ;*
20 00000000 ;* This software component is licensed by ST under BSD 3
-Clause license,
21 00000000 ;* the "License"; You may not use this file except in co
mpliance with the
22 00000000 ;* License. You may obtain a copy of the License at:
23 00000000 ;* opensource.org/licenses/BSD-3-
Clause
24 00000000 ;*
25 00000000 ;*******************************************************
***********************
26 00000000
27 00000000 ; Amount of memory (in bytes) allocated for Stack
28 00000000 ; Tailor this value to your application needs
29 00000000 ; <h> Stack Configuration
30 00000000 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 00000000 ; </h>
32 00000000
33 00000000 00000400
Stack_Size
EQU 0x400
34 00000000
35 00000000 AREA STACK, NOINIT, READWRITE, ALIGN
=3
36 00000000 __stack_limit
37 00000000 Stack_Mem
SPACE Stack_Size
38 00000400 __initial_sp
39 00000400
40 00000400
41 00000400 ; <h> Heap Configuration
42 00000400 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
ARM Macro Assembler Page 2
43 00000400 ; </h>
44 00000400
45 00000400 00000200
Heap_Size
EQU 0x200
46 00000400
47 00000400 AREA HEAP, NOINIT, READWRITE, ALIGN=
3
48 00000000 __heap_base
49 00000000 Heap_Mem
SPACE Heap_Size
50 00000200 __heap_limit
51 00000200
52 00000200 PRESERVE8
53 00000200 THUMB
54 00000200
55 00000200
56 00000200 ; Vector Table Mapped to Address 0 at Reset
57 00000200 AREA RESET, DATA, READONLY
58 00000000 EXPORT __Vectors
59 00000000 EXPORT __Vectors_End
60 00000000 EXPORT __Vectors_Size
61 00000000
62 00000000 00000000
__Vectors
DCD __initial_sp ; Top of Stack
63 00000004 00000000 DCD Reset_Handler
; Reset Handler
64 00000008 00000000 DCD NMI_Handler ; -14 NMI Handler
65 0000000C 00000000 DCD HardFault_Handler ; -13 Hard Fa
ult Handler
66 00000010 00000000 DCD MemManage_Handler ; -12 MPU Fau
lt Handler
67 00000014 00000000 DCD BusFault_Handler ; -11 Bus Faul
t Handler
68 00000018 00000000 DCD UsageFault_Handler ; -10 Usage
Fault Handler
69 0000001C 00000000 DCD 0 ; Reserved
70 00000020 00000000 DCD 0 ; Reserved
71 00000024 00000000 DCD 0 ; Reserved
72 00000028 00000000 DCD 0 ; Reserved
73 0000002C 00000000 DCD SVC_Handler ; -5 SVCall Handle
r
74 00000030 00000000 DCD DebugMon_Handler ; -4 Debug Mo
nitor Handler
75 00000034 00000000 DCD 0 ; Reserved
76 00000038 00000000 DCD PendSV_Handler ; -2 PendSV Han
dler
77 0000003C 00000000 DCD SysTick_Handler ; -1 SysTick H
andler
78 00000040
79 00000040 ; Interrupts
80 00000040 00000000 DCD WWDG1_IRQHandler ;
81 00000044 00000000 DCD PVD_AVD_IRQHandler ;
82 00000048 00000000 DCD TAMP_IRQHandler ;
83 0000004C 00000000 DCD RTC_WKUP_ALARM_IRQHandler ;
84 00000050 00000000 DCD RESERVED4_IRQHandler ;
ARM Macro Assembler Page 3
85 00000054 00000000 DCD RCC_IRQHandler ;
86 00000058 00000000 DCD EXTI0_IRQHandler ;
87 0000005C 00000000 DCD EXTI1_IRQHandler ;
88 00000060 00000000 DCD EXTI2_IRQHandler ;
89 00000064 00000000 DCD EXTI3_IRQHandler ;
90 00000068 00000000 DCD EXTI4_IRQHandler ;
91 0000006C 00000000 DCD DMA1_Stream0_IRQHandler ;
92 00000070 00000000 DCD DMA1_Stream1_IRQHandler ;
93 00000074 00000000 DCD DMA1_Stream2_IRQHandler ;
94 00000078 00000000 DCD DMA1_Stream3_IRQHandler ;
95 0000007C 00000000 DCD DMA1_Stream4_IRQHandler ;
96 00000080 00000000 DCD DMA1_Stream5_IRQHandler ;
97 00000084 00000000 DCD DMA1_Stream6_IRQHandler ;
98 00000088 00000000 DCD ADC1_IRQHandler ;
99 0000008C 00000000 DCD FDCAN1_IT0_IRQHandler ;
100 00000090 00000000 DCD FDCAN2_IT0_IRQHandler ;
101 00000094 00000000 DCD FDCAN1_IT1_IRQHandler ;
102 00000098 00000000 DCD FDCAN2_IT1_IRQHandler ;
103 0000009C 00000000 DCD EXTI5_IRQHandler ;
104 000000A0 00000000 DCD TIM1_BRK_IRQHandler ;
105 000000A4 00000000 DCD TIM1_UP_IRQHandler ;
106 000000A8 00000000 DCD TIM1_TRG_COM_IRQHandler ;
107 000000AC 00000000 DCD TIM1_CC_IRQHandler ;
108 000000B0 00000000 DCD TIM2_IRQHandler ;
109 000000B4 00000000 DCD TIM3_IRQHandler ;
110 000000B8 00000000 DCD TIM4_IRQHandler ;
111 000000BC 00000000 DCD I2C1_EV_IRQHandler ;
112 000000C0 00000000 DCD I2C1_ER_IRQHandler ;
113 000000C4 00000000 DCD I2C2_EV_IRQHandler ;
114 000000C8 00000000 DCD I2C2_ER_IRQHandler ;
115 000000CC 00000000 DCD SPI1_IRQHandler ;
116 000000D0 00000000 DCD SPI2_IRQHandler ;
117 000000D4 00000000 DCD USART1_IRQHandler ;
118 000000D8 00000000 DCD USART2_IRQHandler ;
119 000000DC 00000000 DCD USART3_IRQHandler ;
120 000000E0 00000000 DCD EXTI10_IRQHandler ;
121 000000E4 00000000 DCD RTC_TIMESTAMP_IRQHandler ;
122 000000E8 00000000 DCD EXTI11_IRQHandler ;
123 000000EC 00000000 DCD TIM8_BRK_IRQHandler ;
124 000000F0 00000000 DCD TIM8_UP_IRQHandler ;
125 000000F4 00000000 DCD TIM8_TRG_COM_IRQHandler ;
126 000000F8 00000000 DCD TIM8_CC_IRQHandler ;
127 000000FC 00000000 DCD DMA1_Stream7_IRQHandler ;
128 00000100 00000000 DCD FMC_IRQHandler ;
129 00000104 00000000 DCD SDMMC1_IRQHandler ;
130 00000108 00000000 DCD TIM5_IRQHandler ;
131 0000010C 00000000 DCD SPI3_IRQHandler ;
132 00000110 00000000 DCD UART4_IRQHandler ;
133 00000114 00000000 DCD UART5_IRQHandler ;
134 00000118 00000000 DCD TIM6_IRQHandler ;
135 0000011C 00000000 DCD TIM7_IRQHandler ;
136 00000120 00000000 DCD DMA2_Stream0_IRQHandler ;
137 00000124 00000000 DCD DMA2_Stream1_IRQHandler ;
138 00000128 00000000 DCD DMA2_Stream2_IRQHandler ;
139 0000012C 00000000 DCD DMA2_Stream3_IRQHandler ;
140 00000130 00000000 DCD DMA2_Stream4_IRQHandler ;
141 00000134 00000000 DCD ETH1_IRQHandler ;
142 00000138 00000000 DCD ETH1_WKUP_IRQHandler ;
143 0000013C 00000000 DCD FDCAN_CAL_IRQHandler ;
ARM Macro Assembler Page 4
144 00000140 00000000 DCD EXTI6_IRQHandler ;
145 00000144 00000000 DCD EXTI7_IRQHandler ;
146 00000148 00000000 DCD EXTI8_IRQHandler ;
147 0000014C 00000000 DCD EXTI9_IRQHandler ;
148 00000150 00000000 DCD DMA2_Stream5_IRQHandler ;
149 00000154 00000000 DCD DMA2_Stream6_IRQHandler ;
150 00000158 00000000 DCD DMA2_Stream7_IRQHandler ;
151 0000015C 00000000 DCD USART6_IRQHandler ;
152 00000160 00000000 DCD I2C3_EV_IRQHandler ;
153 00000164 00000000 DCD I2C3_ER_IRQHandler ;
154 00000168 00000000 DCD USBH_OHCI_IRQHandler ;
155 0000016C 00000000 DCD USBH_EHCI_IRQHandler ;
156 00000170 00000000 DCD EXTI12_IRQHandler ;
157 00000174 00000000 DCD EXTI13_IRQHandler ;
158 00000178 00000000 DCD DCMI_IRQHandler ;
159 0000017C 00000000 DCD CRYP1_IRQHandler ;
160 00000180 00000000 DCD HASH1_IRQHandler ;
161 00000184 00000000 DCD FPU_IRQHandler ;
162 00000188 00000000 DCD UART7_IRQHandler ;
163 0000018C 00000000 DCD UART8_IRQHandler ;
164 00000190 00000000 DCD SPI4_IRQHandler ;
165 00000194 00000000 DCD SPI5_IRQHandler ;
166 00000198 00000000 DCD SPI6_IRQHandler ;
167 0000019C 00000000 DCD SAI1_IRQHandler ;
168 000001A0 00000000 DCD LTDC_IRQHandler ;
169 000001A4 00000000 DCD LTDC_ER_IRQHandler ;
170 000001A8 00000000 DCD ADC2_IRQHandler ;
171 000001AC 00000000 DCD SAI2_IRQHandler ;
172 000001B0 00000000 DCD QUADSPI_IRQHandler ;
173 000001B4 00000000 DCD LPTIM1_IRQHandler ;
174 000001B8 00000000 DCD CEC_IRQHandler ;
175 000001BC 00000000 DCD I2C4_EV_IRQHandler ;
176 000001C0 00000000 DCD I2C4_ER_IRQHandler ;
177 000001C4 00000000 DCD SPDIF_RX_IRQHandler ;
178 000001C8 00000000 DCD OTG_IRQHandler ;
179 000001CC 00000000 DCD RESERVED99_IRQHandler ;
180 000001D0 00000000 DCD IPCC_RX0_IRQHandler ;
181 000001D4 00000000 DCD IPCC_TX0_IRQHandler ;
182 000001D8 00000000 DCD DMAMUX1_OVR_IRQHandler ;
183 000001DC 00000000 DCD IPCC_RX1_IRQHandler ;
184 000001E0 00000000 DCD IPCC_TX1_IRQHandler ;
185 000001E4 00000000 DCD CRYP2_IRQHandler ;
186 000001E8 00000000 DCD HASH2_IRQHandler ;
187 000001EC 00000000 DCD I2C5_EV_IRQHandler ;
188 000001F0 00000000 DCD I2C5_ER_IRQHandler ;
189 000001F4 00000000 DCD GPU_IRQHandler ;
190 000001F8 00000000 DCD DFSDM1_FLT0_IRQHandler ;
191 000001FC 00000000 DCD DFSDM1_FLT1_IRQHandler ;
192 00000200 00000000 DCD DFSDM1_FLT2_IRQHandler ;
193 00000204 00000000 DCD DFSDM1_FLT3_IRQHandler ;
194 00000208 00000000 DCD SAI3_IRQHandler ;
195 0000020C 00000000 DCD DFSDM1_FLT4_IRQHandler ;
196 00000210 00000000 DCD TIM15_IRQHandler ;
197 00000214 00000000 DCD TIM16_IRQHandler ;
198 00000218 00000000 DCD TIM17_IRQHandler ;
199 0000021C 00000000 DCD TIM12_IRQHandler ;
200 00000220 00000000 DCD MDIOS_IRQHandler ;
201 00000224 00000000 DCD EXTI14_IRQHandler ;
202 00000228 00000000 DCD MDMA_IRQHandler ;
ARM Macro Assembler Page 5
203 0000022C 00000000 DCD DSI_IRQHandler ;
204 00000230 00000000 DCD SDMMC2_IRQHandler ;
205 00000234 00000000 DCD HSEM_IT2_IRQHandler ;
206 00000238 00000000 DCD DFSDM1_FLT5_IRQHandler ;
207 0000023C 00000000 DCD EXTI15_IRQHandler ;
208 00000240 00000000 DCD nCTIIRQ1_IRQHandler ;
209 00000244 00000000 DCD nCTIIRQ2_IRQHandler ;
210 00000248 00000000 DCD TIM13_IRQHandler ;
211 0000024C 00000000 DCD TIM14_IRQHandler ;
212 00000250 00000000 DCD DAC_IRQHandler ;
213 00000254 00000000 DCD RNG1_IRQHandler ;
214 00000258 00000000 DCD RNG2_IRQHandler ;
215 0000025C 00000000 DCD I2C6_EV_IRQHandler ;
216 00000260 00000000 DCD I2C6_ER_IRQHandler ;
217 00000264 00000000 DCD SDMMC3_IRQHandler ;
218 00000268 00000000 DCD LPTIM2_IRQHandler ;
219 0000026C 00000000 DCD LPTIM3_IRQHandler ;
220 00000270 00000000 DCD LPTIM4_IRQHandler ;
221 00000274 00000000 DCD LPTIM5_IRQHandler ;
222 00000278 00000000 DCD ETH1_LPI_IRQHandler ;
223 0000027C 00000000 DCD RESERVED143_IRQHandler ;
224 00000280 00000000 DCD MPU_SEV_IRQHandler ;
225 00000284 00000000 DCD RCC_WAKEUP_IRQHandler ;
226 00000288 00000000 DCD SAI4_IRQHandler ;
227 0000028C 00000000 DCD DTS_IRQHandler ;
228 00000290 00000000 DCD RESERVED148_IRQHandler ;
229 00000294 00000000 DCD WAKEUP_PIN_IRQHandler ;
230 00000298
231 00000298 00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
ARM Macro Assembler Page 6
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
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00 00 00
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00 00 00
00 00 00
00 00 00
00 00 00
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00 00 00
00 00 00
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00 00 00
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00 00 00
00 00 00
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00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
ARM Macro Assembler Page 7
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 00 00
00 SPACE (73 * 4) ; Interrupts 151 ..
224 are left out
232 000003BC __Vectors_End
233 000003BC 000003BC
__Vectors_Size
EQU __Vectors_End - __Vectors
234 000003BC
235 000003BC
236 000003BC AREA |.text|, CODE, READONLY
237 00000000
238 00000000 ; Reset Handler
239 00000000
240 00000000 Reset_Handler
PROC
241 00000000 EXPORT Reset_Handler [WEAK
]
242 00000000 IMPORT SystemInit
243 00000000 IMPORT __main
244 00000000
245 00000000 4851 LDR R0, =SystemInit
246 00000002 4780 BLX R0
247 00000004 4851 LDR R0, =__main
248 00000006 4700 BX R0
249 00000008 ENDP
250 00000008
251 00000008
252 00000008 ; Macro to define default exception/interrupt handlers.
253 00000008 ; Default handler are weak symbols with an endless loop.
254 00000008 ; They can be overwritten by real handlers.
255 00000008 MACRO
256 00000008 Set_Default_Handler
$Handler_Name
257 00000008 $Handler_Name
PROC
258 00000008 EXPORT $Handler_Name [WEAK
]
259 00000008 B .
260 00000008 ENDP
261 00000008 MEND
262 00000008
263 00000008
264 00000008 ; Default exception/interrupt handler
265 00000008
266 00000008 Set_Default_Handler
NMI_Handler
257 00000008 NMI_Handler
PROC
258 00000008 EXPORT NMI_Handler [WEAK]
259 00000008 E7FE B .
260 0000000A ENDP
267 0000000A Set_Default_Handler
ARM Macro Assembler Page 8
HardFault_Handler
257 0000000A HardFault_Handler
PROC
258 0000000A EXPORT HardFault_Handler [
WEAK]
259 0000000A E7FE B .
260 0000000C ENDP
268 0000000C Set_Default_Handler
MemManage_Handler
257 0000000C MemManage_Handler
PROC
258 0000000C EXPORT MemManage_Handler [
WEAK]
259 0000000C E7FE B .
260 0000000E ENDP
269 0000000E Set_Default_Handler
BusFault_Handler
257 0000000E BusFault_Handler
PROC
258 0000000E EXPORT BusFault_Handler [W
EAK]
259 0000000E E7FE B .
260 00000010 ENDP
270 00000010 Set_Default_Handler
UsageFault_Handler
257 00000010 UsageFault_Handler
PROC
258 00000010 EXPORT UsageFault_Handler
[WEAK]
259 00000010 E7FE B .
260 00000012 ENDP
271 00000012 Set_Default_Handler
SVC_Handler
257 00000012 SVC_Handler
PROC
258 00000012 EXPORT SVC_Handler [WEAK]
259 00000012 E7FE B .
260 00000014 ENDP
272 00000014 Set_Default_Handler
DebugMon_Handler
257 00000014 DebugMon_Handler
PROC
258 00000014 EXPORT DebugMon_Handler [W
EAK]
259 00000014 E7FE B .
260 00000016 ENDP
273 00000016 Set_Default_Handler
PendSV_Handler
257 00000016 PendSV_Handler
PROC
258 00000016 EXPORT PendSV_Handler [WEA
K]
259 00000016 E7FE B .
260 00000018 ENDP
274 00000018 Set_Default_Handler
SysTick_Handler
257 00000018 SysTick_Handler
PROC
258 00000018 EXPORT SysTick_Handler [WE
ARM Macro Assembler Page 9
AK]
259 00000018 E7FE B .
260 0000001A ENDP
275 0000001A
276 0000001A Set_Default_Handler
WWDG1_IRQHandler
; Window WatchDog 1
257 0000001A WWDG1_IRQHandler
PROC
258 0000001A EXPORT WWDG1_IRQHandler [W
EAK]
259 0000001A E7FE B .
260 0000001C ENDP
277 0000001C Set_Default_Handler
PVD_AVD_IRQHandler ; PVD and AV
D through EXTI Line
detection
257 0000001C PVD_AVD_IRQHandler
PROC
258 0000001C EXPORT PVD_AVD_IRQHandler
[WEAK]
259 0000001C E7FE B .
260 0000001E ENDP
278 0000001E Set_Default_Handler
TAMP_IRQHandler ; Tamper and Ti
meStamps through th
e EXTI line
257 0000001E TAMP_IRQHandler
PROC
258 0000001E EXPORT TAMP_IRQHandler [WE
AK]
259 0000001E E7FE B .
260 00000020 ENDP
279 00000020 Set_Default_Handler
RTC_WKUP_ALARM_IRQHandler ; RTC
Wakeup and Alarm t
hrough the EXTI lin
e
257 00000020 RTC_WKUP_ALARM_IRQHandler
PROC
258 00000020 EXPORT RTC_WKUP_ALARM_IRQHandler
[WEAK]
259 00000020 E7FE B .
260 00000022 ENDP
280 00000022 Set_Default_Handler
RESERVED4_IRQHandler ; Reserved
257 00000022 RESERVED4_IRQHandler
PROC
258 00000022 EXPORT RESERVED4_IRQHandler
[WEAK]
259 00000022 E7FE B .
260 00000024 ENDP
281 00000024 Set_Default_Handler
RCC_IRQHandler ; RCC
ARM Macro Assembler Page 10
257 00000024 RCC_IRQHandler
PROC
258 00000024 EXPORT RCC_IRQHandler [WEA
K]
259 00000024 E7FE B .
260 00000026 ENDP
282 00000026 Set_Default_Handler
EXTI0_IRQHandler ; EXTI Line0
257 00000026 EXTI0_IRQHandler
PROC
258 00000026 EXPORT EXTI0_IRQHandler [W
EAK]
259 00000026 E7FE B .
260 00000028 ENDP
283 00000028 Set_Default_Handler
EXTI1_IRQHandler ; EXTI Line1
257 00000028 EXTI1_IRQHandler
PROC
258 00000028 EXPORT EXTI1_IRQHandler [W
EAK]
259 00000028 E7FE B .
260 0000002A ENDP
284 0000002A Set_Default_Handler
EXTI2_IRQHandler ; EXTI Line2
257 0000002A EXTI2_IRQHandler
PROC
258 0000002A EXPORT EXTI2_IRQHandler [W
EAK]
259 0000002A E7FE B .
260 0000002C ENDP
285 0000002C Set_Default_Handler
EXTI3_IRQHandler ; EXTI Line3
257 0000002C EXTI3_IRQHandler
PROC
258 0000002C EXPORT EXTI3_IRQHandler [W
EAK]
259 0000002C E7FE B .
260 0000002E ENDP
286 0000002E Set_Default_Handler
EXTI4_IRQHandler ; EXTI Line4
257 0000002E EXTI4_IRQHandler
PROC
258 0000002E EXPORT EXTI4_IRQHandler [W
EAK]
259 0000002E E7FE B .
260 00000030 ENDP
ARM Macro Assembler Page 11
287 00000030 Set_Default_Handler
DMA1_Stream0_IRQHandler ; DMA1
Stream 0
257 00000030 DMA1_Stream0_IRQHandler
PROC
258 00000030 EXPORT DMA1_Stream0_IRQHandler
[WEAK]
259 00000030 E7FE B .
260 00000032 ENDP
288 00000032 Set_Default_Handler
DMA1_Stream1_IRQHandler ; DMA1
Stream 1
257 00000032 DMA1_Stream1_IRQHandler
PROC
258 00000032 EXPORT DMA1_Stream1_IRQHandler
[WEAK]
259 00000032 E7FE B .
260 00000034 ENDP
289 00000034 Set_Default_Handler
DMA1_Stream2_IRQHandler ; DMA1
Stream 2
257 00000034 DMA1_Stream2_IRQHandler
PROC
258 00000034 EXPORT DMA1_Stream2_IRQHandler
[WEAK]
259 00000034 E7FE B .
260 00000036 ENDP
290 00000036 Set_Default_Handler
DMA1_Stream3_IRQHandler ; DMA1
Stream 3
257 00000036 DMA1_Stream3_IRQHandler
PROC
258 00000036 EXPORT DMA1_Stream3_IRQHandler
[WEAK]
259 00000036 E7FE B .
260 00000038 ENDP
291 00000038 Set_Default_Handler
DMA1_Stream4_IRQHandler ; DMA1
Stream 4
257 00000038 DMA1_Stream4_IRQHandler
PROC
258 00000038 EXPORT DMA1_Stream4_IRQHandler
[WEAK]
259 00000038 E7FE B .
260 0000003A ENDP
292 0000003A Set_Default_Handler
ARM Macro Assembler Page 12
DMA1_Stream5_IRQHandler ; DMA1
Stream 5
257 0000003A DMA1_Stream5_IRQHandler
PROC
258 0000003A EXPORT DMA1_Stream5_IRQHandler
[WEAK]
259 0000003A E7FE B .
260 0000003C ENDP
293 0000003C Set_Default_Handler
DMA1_Stream6_IRQHandler ; DMA1
Stream 6
257 0000003C DMA1_Stream6_IRQHandler
PROC
258 0000003C EXPORT DMA1_Stream6_IRQHandler
[WEAK]
259 0000003C E7FE B .
260 0000003E ENDP
294 0000003E Set_Default_Handler
ADC1_IRQHandler ; ADC1
257 0000003E ADC1_IRQHandler
PROC
258 0000003E EXPORT ADC1_IRQHandler [WE
AK]
259 0000003E E7FE B .
260 00000040 ENDP
295 00000040 Set_Default_Handler
FDCAN1_IT0_IRQHandler ; FDCAN1
Interrupt line 0
257 00000040 FDCAN1_IT0_IRQHandler
PROC
258 00000040 EXPORT FDCAN1_IT0_IRQHandler
[WEAK]
259 00000040 E7FE B .
260 00000042 ENDP
296 00000042 Set_Default_Handler
FDCAN2_IT0_IRQHandler ; FDCAN2
Interrupt line 0
257 00000042 FDCAN2_IT0_IRQHandler
PROC
258 00000042 EXPORT FDCAN2_IT0_IRQHandler
[WEAK]
259 00000042 E7FE B .
260 00000044 ENDP
297 00000044 Set_Default_Handler
FDCAN1_IT1_IRQHandler ; FDCAN1
Interrupt line 1
257 00000044 FDCAN1_IT1_IRQHandler
PROC
258 00000044 EXPORT FDCAN1_IT1_IRQHandler
[WEAK]
259 00000044 E7FE B .
260 00000046 ENDP
298 00000046 Set_Default_Handler
FDCAN2_IT1_IRQHandler ; FDCAN2
ARM Macro Assembler Page 13
Interrupt line 1
257 00000046 FDCAN2_IT1_IRQHandler
PROC
258 00000046 EXPORT FDCAN2_IT1_IRQHandler
[WEAK]
259 00000046 E7FE B .
260 00000048 ENDP
299 00000048 Set_Default_Handler
EXTI5_IRQHandler ; External Lin
e5 interrupts throu
gh AIEC
257 00000048 EXTI5_IRQHandler
PROC
258 00000048 EXPORT EXTI5_IRQHandler [W
EAK]
259 00000048 E7FE B .
260 0000004A ENDP
300 0000004A Set_Default_Handler
TIM1_BRK_IRQHandler ; TIM1 Brea
k interrupt
257 0000004A TIM1_BRK_IRQHandler
PROC
258 0000004A EXPORT TIM1_BRK_IRQHandler
[WEAK]
259 0000004A E7FE B .
260 0000004C ENDP
301 0000004C Set_Default_Handler
TIM1_UP_IRQHandler ; TIM1 Updat
e Interrupt
257 0000004C TIM1_UP_IRQHandler
PROC
258 0000004C EXPORT TIM1_UP_IRQHandler
[WEAK]
259 0000004C E7FE B .
260 0000004E ENDP
302 0000004E Set_Default_Handler
TIM1_TRG_COM_IRQHandler ; TIM1
Trigger and Commuta
tion Interrupt
257 0000004E TIM1_TRG_COM_IRQHandler
PROC
258 0000004E EXPORT TIM1_TRG_COM_IRQHandler
[WEAK]
259 0000004E E7FE B .
260 00000050 ENDP
303 00000050 Set_Default_Handler
TIM1_CC_IRQHandler ; TIM1 Captu
re Compare
257 00000050 TIM1_CC_IRQHandler
PROC
258 00000050 EXPORT TIM1_CC_IRQHandler
[WEAK]
259 00000050 E7FE B .
260 00000052 ENDP
304 00000052 Set_Default_Handler
TIM2_IRQHandler ; TIM2
ARM Macro Assembler Page 14
257 00000052 TIM2_IRQHandler
PROC
258 00000052 EXPORT TIM2_IRQHandler [WE
AK]
259 00000052 E7FE B .
260 00000054 ENDP
305 00000054 Set_Default_Handler
TIM3_IRQHandler ; TIM3
257 00000054 TIM3_IRQHandler
PROC
258 00000054 EXPORT TIM3_IRQHandler [WE
AK]
259 00000054 E7FE B .
260 00000056 ENDP
306 00000056 Set_Default_Handler
TIM4_IRQHandler ; TIM4
257 00000056 TIM4_IRQHandler
PROC
258 00000056 EXPORT TIM4_IRQHandler [WE
AK]
259 00000056 E7FE B .
260 00000058 ENDP
307 00000058 Set_Default_Handler
I2C1_EV_IRQHandler ; I2C1 Event
257 00000058 I2C1_EV_IRQHandler
PROC
258 00000058 EXPORT I2C1_EV_IRQHandler
[WEAK]
259 00000058 E7FE B .
260 0000005A ENDP
308 0000005A Set_Default_Handler
I2C1_ER_IRQHandler ; I2C1 Error
257 0000005A I2C1_ER_IRQHandler
PROC
258 0000005A EXPORT I2C1_ER_IRQHandler
[WEAK]
259 0000005A E7FE B .
260 0000005C ENDP
309 0000005C Set_Default_Handler
I2C2_EV_IRQHandler ; I2C2 Event
257 0000005C I2C2_EV_IRQHandler
PROC
258 0000005C EXPORT I2C2_EV_IRQHandler
[WEAK]
259 0000005C E7FE B .
ARM Macro Assembler Page 15
260 0000005E ENDP
310 0000005E Set_Default_Handler
I2C2_ER_IRQHandler ; I2C2 Error
257 0000005E I2C2_ER_IRQHandler
PROC
258 0000005E EXPORT I2C2_ER_IRQHandler
[WEAK]
259 0000005E E7FE B .
260 00000060 ENDP
311 00000060 Set_Default_Handler
SPI1_IRQHandler ; SPI1
257 00000060 SPI1_IRQHandler
PROC
258 00000060 EXPORT SPI1_IRQHandler [WE
AK]
259 00000060 E7FE B .
260 00000062 ENDP
312 00000062 Set_Default_Handler
SPI2_IRQHandler ; SPI2
257 00000062 SPI2_IRQHandler
PROC
258 00000062 EXPORT SPI2_IRQHandler [WE
AK]
259 00000062 E7FE B .
260 00000064 ENDP
313 00000064 Set_Default_Handler
USART1_IRQHandler ; USART1
257 00000064 USART1_IRQHandler
PROC
258 00000064 EXPORT USART1_IRQHandler [
WEAK]
259 00000064 E7FE B .
260 00000066 ENDP
314 00000066 Set_Default_Handler
USART2_IRQHandler ; USART2
257 00000066 USART2_IRQHandler
PROC
258 00000066 EXPORT USART2_IRQHandler [
WEAK]
259 00000066 E7FE B .
260 00000068 ENDP
315 00000068 Set_Default_Handler
USART3_IRQHandler ; USART3
257 00000068 USART3_IRQHandler
PROC
258 00000068 EXPORT USART3_IRQHandler [
ARM Macro Assembler Page 16
WEAK]
259 00000068 E7FE B .
260 0000006A ENDP
316 0000006A Set_Default_Handler
EXTI10_IRQHandler ; External Li
ne10 interrupts thr
ough AIEC
257 0000006A EXTI10_IRQHandler
PROC
258 0000006A EXPORT EXTI10_IRQHandler [
WEAK]
259 0000006A E7FE B .
260 0000006C ENDP
317 0000006C Set_Default_Handler
RTC_TIMESTAMP_IRQHandler ; RTC
TimeStamp through E
XTI Line
257 0000006C RTC_TIMESTAMP_IRQHandler
PROC