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Simple output buffers are inverting #59

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msinger opened this issue Sep 25, 2021 · 0 comments
Open

Simple output buffers are inverting #59

msinger opened this issue Sep 25, 2021 · 0 comments

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@msinger
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msinger commented Sep 25, 2021

By simple I mean the output buffers that only have one connection. These are:

  • SOUT gets inverted by KENA on page 5. It must be inverted at the output buffer, so signal SOUT should be marked as inverted (with a line on top of the label).
  • !CS_OUT on page 8 is marked as inverted, but it shouldn't be, because the external CS pin is actually active-low. The output buffer is inverting, so the !CS_OUT signal is active-high and shouldn't have a line on it.
  • PHI_OUT on page 1 should also be marked as inverted, because the output buffer for PHI is inverting. All the signals in the schematic that have PHI in their name should be changed as a consequence. The signal that is currently called !PHI_OUT maybe should be called UVYT_PHI, or at least something without the _OUT suffix, because this may be confusing, which one of those signals actually goes to the output pin. There's also !PHI on page 1 that comes out of DOVA and MOPA_PHI on page 4.
  • MA0_OUT-MA12_OUT are all inverted. Also the internal bus of MA0-MA12 is inverted too. This can be seen on page 25, where the inverting tri-state buffers XECA, XYBO, ... are driving A0-A12 onto MA0-MA12.
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