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info.yaml
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info.yaml
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---
# TinyTapeout project information
project:
wokwi_id: 0 # If using wokwi, set this to your project's ID
source_files: # If using an HDL, set wokwi_id as 0 and uncomment and list your source files here. Source files must be in ./src
- fpga.v
top_module: "gatecat_fpga_top" # put the name of your top module here, make it unique by prepending your github username
# As everyone will have access to all designs, try to make it easy for someone new to your design to know what
# it does and how to operate it.
#
# Here is an example: https://github.com/mattvenn/tinytapeout_m_segments/blob/main/info.yaml
#
# This info will be automatically collected and used to make a datasheet for the chip.
documentation:
author: "myrtle" # Your name
discord: "gatecat#6502" # Your discord handle
title: "FPGA test" # Project title
description: "small mux2 fpga test" # Short description of what your project does
how_it_works: "TODO write up" # Longer description of how the project works
how_to_test: "TODO write up" # Instructions on how someone could test your project, include things like what buttons do what and how to set the clock if needed
external_hw: "TODO write up" # Describe any external hardware needed
language: "verilog" # other examples include Verilog, Amaranth, VHDL, etc
doc_link: "" # URL to longer form documentation, eg the README.md in your repository
clock_hz: 1000 # Clock frequency in Hz (if required)
picture: "" # relative path to a picture in your repository
inputs: # a description of what the inputs do
- clock
- cfg_frameinc
- cfg_framestrb
- cfg_mode
- cfg_sel0_in0
- cfg_sel0_in1
- cfg_sel0_in2
- cfg_sel0_in3
outputs:
- out 0
- out 1
- out 2
- out 3
- out 4
- out 5
- out 6
- out 7