mirrored from git://gcc.gnu.org/git/gcc.git
/
reload.c
7350 lines (6428 loc) · 243 KB
/
reload.c
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/* Search an insn for pseudo regs that must be in hard regs and are not.
Copyright (C) 1987-2020 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* This file contains subroutines used only from the file reload1.c.
It knows how to scan one insn for operands and values
that need to be copied into registers to make valid code.
It also finds other operands and values which are valid
but for which equivalent values in registers exist and
ought to be used instead.
Before processing the first insn of the function, call `init_reload'.
init_reload actually has to be called earlier anyway.
To scan an insn, call `find_reloads'. This does two things:
1. sets up tables describing which values must be reloaded
for this insn, and what kind of hard regs they must be reloaded into;
2. optionally record the locations where those values appear in
the data, so they can be replaced properly later.
This is done only if the second arg to `find_reloads' is nonzero.
The third arg to `find_reloads' specifies the number of levels
of indirect addressing supported by the machine. If it is zero,
indirect addressing is not valid. If it is one, (MEM (REG n))
is valid even if (REG n) did not get a hard register; if it is two,
(MEM (MEM (REG n))) is also valid even if (REG n) did not get a
hard register, and similarly for higher values.
Then you must choose the hard regs to reload those pseudo regs into,
and generate appropriate load insns before this insn and perhaps
also store insns after this insn. Set up the array `reload_reg_rtx'
to contain the REG rtx's for the registers you used. In some
cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
for certain reloads. Then that tells you which register to use,
so you do not need to allocate one. But you still do need to add extra
instructions to copy the value into and out of that register.
Finally you must call `subst_reloads' to substitute the reload reg rtx's
into the locations already recorded.
NOTE SIDE EFFECTS:
find_reloads can alter the operands of the instruction it is called on.
1. Two operands of any sort may be interchanged, if they are in a
commutative instruction.
This happens only if find_reloads thinks the instruction will compile
better that way.
2. Pseudo-registers that are equivalent to constants are replaced
with those constants if they are not in hard registers.
1 happens every time find_reloads is called.
2 happens only when REPLACE is 1, which is only when
actually doing the reloads, not when just counting them.
Using a reload register for several reloads in one insn:
When an insn has reloads, it is considered as having three parts:
the input reloads, the insn itself after reloading, and the output reloads.
Reloads of values used in memory addresses are often needed for only one part.
When this is so, reload_when_needed records which part needs the reload.
Two reloads for different parts of the insn can share the same reload
register.
When a reload is used for addresses in multiple parts, or when it is
an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
a register with any other reload. */
#define REG_OK_STRICT
/* We do not enable this with CHECKING_P, since it is awfully slow. */
#undef DEBUG_RELOAD
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "backend.h"
#include "target.h"
#include "rtl.h"
#include "tree.h"
#include "df.h"
#include "memmodel.h"
#include "tm_p.h"
#include "optabs.h"
#include "regs.h"
#include "ira.h"
#include "recog.h"
#include "rtl-error.h"
#include "reload.h"
#include "addresses.h"
#include "function-abi.h"
/* True if X is a constant that can be forced into the constant pool.
MODE is the mode of the operand, or VOIDmode if not known. */
#define CONST_POOL_OK_P(MODE, X) \
((MODE) != VOIDmode \
&& CONSTANT_P (X) \
&& GET_CODE (X) != HIGH \
&& !targetm.cannot_force_const_mem (MODE, X))
/* True if C is a non-empty register class that has too few registers
to be safely used as a reload target class. */
static inline bool
small_register_class_p (reg_class_t rclass)
{
return (reg_class_size [(int) rclass] == 1
|| (reg_class_size [(int) rclass] >= 1
&& targetm.class_likely_spilled_p (rclass)));
}
/* All reloads of the current insn are recorded here. See reload.h for
comments. */
int n_reloads;
struct reload rld[MAX_RELOADS];
/* All the "earlyclobber" operands of the current insn
are recorded here. */
int n_earlyclobbers;
rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
int reload_n_operands;
/* Replacing reloads.
If `replace_reloads' is nonzero, then as each reload is recorded
an entry is made for it in the table `replacements'.
Then later `subst_reloads' can look through that table and
perform all the replacements needed. */
/* Nonzero means record the places to replace. */
static int replace_reloads;
/* Each replacement is recorded with a structure like this. */
struct replacement
{
rtx *where; /* Location to store in */
int what; /* which reload this is for */
machine_mode mode; /* mode it must have */
};
static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
/* Number of replacements currently recorded. */
static int n_replacements;
/* Used to track what is modified by an operand. */
struct decomposition
{
int reg_flag; /* Nonzero if referencing a register. */
int safe; /* Nonzero if this can't conflict with anything. */
rtx base; /* Base address for MEM. */
poly_int64_pod start; /* Starting offset or register number. */
poly_int64_pod end; /* Ending offset or register number. */
};
/* Save MEMs needed to copy from one class of registers to another. One MEM
is used per mode, but normally only one or two modes are ever used.
We keep two versions, before and after register elimination. The one
after register elimination is record separately for each operand. This
is done in case the address is not valid to be sure that we separately
reload each. */
static rtx secondary_memlocs[NUM_MACHINE_MODES];
static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
static int secondary_memlocs_elim_used = 0;
/* The instruction we are doing reloads for;
so we can test whether a register dies in it. */
static rtx_insn *this_insn;
/* Nonzero if this instruction is a user-specified asm with operands. */
static int this_insn_is_asm;
/* If hard_regs_live_known is nonzero,
we can tell which hard regs are currently live,
at least enough to succeed in choosing dummy reloads. */
static int hard_regs_live_known;
/* Indexed by hard reg number,
element is nonnegative if hard reg has been spilled.
This vector is passed to `find_reloads' as an argument
and is not changed here. */
static short *static_reload_reg_p;
/* Set to 1 in subst_reg_equivs if it changes anything. */
static int subst_reg_equivs_changed;
/* On return from push_reload, holds the reload-number for the OUT
operand, which can be different for that from the input operand. */
static int output_reloadnum;
/* Compare two RTX's. */
#define MATCHES(x, y) \
(x == y || (x != 0 && (REG_P (x) \
? REG_P (y) && REGNO (x) == REGNO (y) \
: rtx_equal_p (x, y) && ! side_effects_p (x))))
/* Indicates if two reloads purposes are for similar enough things that we
can merge their reloads. */
#define MERGABLE_RELOADS(when1, when2, op1, op2) \
((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
|| ((when1) == (when2) && (op1) == (op2)) \
|| ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
|| ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
&& (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
|| ((when1) == RELOAD_FOR_OTHER_ADDRESS \
&& (when2) == RELOAD_FOR_OTHER_ADDRESS))
/* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
#define MERGE_TO_OTHER(when1, when2, op1, op2) \
((when1) != (when2) \
|| ! ((op1) == (op2) \
|| (when1) == RELOAD_FOR_INPUT \
|| (when1) == RELOAD_FOR_OPERAND_ADDRESS \
|| (when1) == RELOAD_FOR_OTHER_ADDRESS))
/* If we are going to reload an address, compute the reload type to
use. */
#define ADDR_TYPE(type) \
((type) == RELOAD_FOR_INPUT_ADDRESS \
? RELOAD_FOR_INPADDR_ADDRESS \
: ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
? RELOAD_FOR_OUTADDR_ADDRESS \
: (type)))
static int push_secondary_reload (int, rtx, int, int, enum reg_class,
machine_mode, enum reload_type,
enum insn_code *, secondary_reload_info *);
static enum reg_class find_valid_class (machine_mode, machine_mode,
int, unsigned int);
static void push_replacement (rtx *, int, machine_mode);
static void dup_replacements (rtx *, rtx *);
static void combine_reloads (void);
static int find_reusable_reload (rtx *, rtx, enum reg_class,
enum reload_type, int, int);
static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, machine_mode,
machine_mode, reg_class_t, int, int);
static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
static struct decomposition decompose (rtx);
static int immune_p (rtx, rtx, struct decomposition);
static bool alternative_allows_const_pool_ref (rtx, const char *, int);
static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int,
rtx_insn *, int *);
static rtx make_memloc (rtx, int);
static int maybe_memory_address_addr_space_p (machine_mode, rtx,
addr_space_t, rtx *);
static int find_reloads_address (machine_mode, rtx *, rtx, rtx *,
int, enum reload_type, int, rtx_insn *);
static rtx subst_reg_equivs (rtx, rtx_insn *);
static rtx subst_indexed_address (rtx);
static void update_auto_inc_notes (rtx_insn *, int, int);
static int find_reloads_address_1 (machine_mode, addr_space_t, rtx, int,
enum rtx_code, enum rtx_code, rtx *,
int, enum reload_type,int, rtx_insn *);
static void find_reloads_address_part (rtx, rtx *, enum reg_class,
machine_mode, int,
enum reload_type, int);
static rtx find_reloads_subreg_address (rtx, int, enum reload_type,
int, rtx_insn *, int *);
static void copy_replacements_1 (rtx *, rtx *, int);
static poly_int64 find_inc_amount (rtx, rtx);
static int refers_to_mem_for_reload_p (rtx);
static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
rtx, rtx *);
/* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
list yet. */
static void
push_reg_equiv_alt_mem (int regno, rtx mem)
{
rtx it;
for (it = reg_equiv_alt_mem_list (regno); it; it = XEXP (it, 1))
if (rtx_equal_p (XEXP (it, 0), mem))
return;
reg_equiv_alt_mem_list (regno)
= alloc_EXPR_LIST (REG_EQUIV, mem,
reg_equiv_alt_mem_list (regno));
}
/* Determine if any secondary reloads are needed for loading (if IN_P is
nonzero) or storing (if IN_P is zero) X to or from a reload register of
register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
are needed, push them.
Return the reload number of the secondary reload we made, or -1 if
we didn't need one. *PICODE is set to the insn_code to use if we do
need a secondary reload. */
static int
push_secondary_reload (int in_p, rtx x, int opnum, int optional,
enum reg_class reload_class,
machine_mode reload_mode, enum reload_type type,
enum insn_code *picode, secondary_reload_info *prev_sri)
{
enum reg_class rclass = NO_REGS;
enum reg_class scratch_class;
machine_mode mode = reload_mode;
enum insn_code icode = CODE_FOR_nothing;
enum insn_code t_icode = CODE_FOR_nothing;
enum reload_type secondary_type;
int s_reload, t_reload = -1;
const char *scratch_constraint;
secondary_reload_info sri;
if (type == RELOAD_FOR_INPUT_ADDRESS
|| type == RELOAD_FOR_OUTPUT_ADDRESS
|| type == RELOAD_FOR_INPADDR_ADDRESS
|| type == RELOAD_FOR_OUTADDR_ADDRESS)
secondary_type = type;
else
secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
*picode = CODE_FOR_nothing;
/* If X is a paradoxical SUBREG, use the inner value to determine both the
mode and object being reloaded. */
if (paradoxical_subreg_p (x))
{
x = SUBREG_REG (x);
reload_mode = GET_MODE (x);
}
/* If X is a pseudo-register that has an equivalent MEM (actually, if it
is still a pseudo-register by now, it *must* have an equivalent MEM
but we don't want to assume that), use that equivalent when seeing if
a secondary reload is needed since whether or not a reload is needed
might be sensitive to the form of the MEM. */
if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
&& reg_equiv_mem (REGNO (x)))
x = reg_equiv_mem (REGNO (x));
sri.icode = CODE_FOR_nothing;
sri.prev_sri = prev_sri;
rclass = (enum reg_class) targetm.secondary_reload (in_p, x, reload_class,
reload_mode, &sri);
icode = (enum insn_code) sri.icode;
/* If we don't need any secondary registers, done. */
if (rclass == NO_REGS && icode == CODE_FOR_nothing)
return -1;
if (rclass != NO_REGS)
t_reload = push_secondary_reload (in_p, x, opnum, optional, rclass,
reload_mode, type, &t_icode, &sri);
/* If we will be using an insn, the secondary reload is for a
scratch register. */
if (icode != CODE_FOR_nothing)
{
/* If IN_P is nonzero, the reload register will be the output in
operand 0. If IN_P is zero, the reload register will be the input
in operand 1. Outputs should have an initial "=", which we must
skip. */
/* ??? It would be useful to be able to handle only two, or more than
three, operands, but for now we can only handle the case of having
exactly three: output, input and one temp/scratch. */
gcc_assert (insn_data[(int) icode].n_operands == 3);
/* ??? We currently have no way to represent a reload that needs
an icode to reload from an intermediate tertiary reload register.
We should probably have a new field in struct reload to tag a
chain of scratch operand reloads onto. */
gcc_assert (rclass == NO_REGS);
scratch_constraint = insn_data[(int) icode].operand[2].constraint;
gcc_assert (*scratch_constraint == '=');
scratch_constraint++;
if (*scratch_constraint == '&')
scratch_constraint++;
scratch_class = (reg_class_for_constraint
(lookup_constraint (scratch_constraint)));
rclass = scratch_class;
mode = insn_data[(int) icode].operand[2].mode;
}
/* This case isn't valid, so fail. Reload is allowed to use the same
register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
in the case of a secondary register, we actually need two different
registers for correct code. We fail here to prevent the possibility of
silently generating incorrect code later.
The convention is that secondary input reloads are valid only if the
secondary_class is different from class. If you have such a case, you
cannot use secondary reloads, you must work around the problem some
other way.
Allow this when a reload_in/out pattern is being used. I.e. assume
that the generated code handles this case. */
gcc_assert (!in_p || rclass != reload_class || icode != CODE_FOR_nothing
|| t_icode != CODE_FOR_nothing);
/* See if we can reuse an existing secondary reload. */
for (s_reload = 0; s_reload < n_reloads; s_reload++)
if (rld[s_reload].secondary_p
&& (reg_class_subset_p (rclass, rld[s_reload].rclass)
|| reg_class_subset_p (rld[s_reload].rclass, rclass))
&& ((in_p && rld[s_reload].inmode == mode)
|| (! in_p && rld[s_reload].outmode == mode))
&& ((in_p && rld[s_reload].secondary_in_reload == t_reload)
|| (! in_p && rld[s_reload].secondary_out_reload == t_reload))
&& ((in_p && rld[s_reload].secondary_in_icode == t_icode)
|| (! in_p && rld[s_reload].secondary_out_icode == t_icode))
&& (small_register_class_p (rclass)
|| targetm.small_register_classes_for_mode_p (VOIDmode))
&& MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
opnum, rld[s_reload].opnum))
{
if (in_p)
rld[s_reload].inmode = mode;
if (! in_p)
rld[s_reload].outmode = mode;
if (reg_class_subset_p (rclass, rld[s_reload].rclass))
rld[s_reload].rclass = rclass;
rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
rld[s_reload].optional &= optional;
rld[s_reload].secondary_p = 1;
if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
opnum, rld[s_reload].opnum))
rld[s_reload].when_needed = RELOAD_OTHER;
break;
}
if (s_reload == n_reloads)
{
/* If we need a memory location to copy between the two reload regs,
set it up now. Note that we do the input case before making
the reload and the output case after. This is due to the
way reloads are output. */
if (in_p && icode == CODE_FOR_nothing
&& targetm.secondary_memory_needed (mode, rclass, reload_class))
{
get_secondary_mem (x, reload_mode, opnum, type);
/* We may have just added new reloads. Make sure we add
the new reload at the end. */
s_reload = n_reloads;
}
/* We need to make a new secondary reload for this register class. */
rld[s_reload].in = rld[s_reload].out = 0;
rld[s_reload].rclass = rclass;
rld[s_reload].inmode = in_p ? mode : VOIDmode;
rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
rld[s_reload].reg_rtx = 0;
rld[s_reload].optional = optional;
rld[s_reload].inc = 0;
/* Maybe we could combine these, but it seems too tricky. */
rld[s_reload].nocombine = 1;
rld[s_reload].in_reg = 0;
rld[s_reload].out_reg = 0;
rld[s_reload].opnum = opnum;
rld[s_reload].when_needed = secondary_type;
rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
rld[s_reload].secondary_out_icode
= ! in_p ? t_icode : CODE_FOR_nothing;
rld[s_reload].secondary_p = 1;
n_reloads++;
if (! in_p && icode == CODE_FOR_nothing
&& targetm.secondary_memory_needed (mode, reload_class, rclass))
get_secondary_mem (x, mode, opnum, type);
}
*picode = icode;
return s_reload;
}
/* If a secondary reload is needed, return its class. If both an intermediate
register and a scratch register is needed, we return the class of the
intermediate register. */
reg_class_t
secondary_reload_class (bool in_p, reg_class_t rclass, machine_mode mode,
rtx x)
{
enum insn_code icode;
secondary_reload_info sri;
sri.icode = CODE_FOR_nothing;
sri.prev_sri = NULL;
rclass
= (enum reg_class) targetm.secondary_reload (in_p, x, rclass, mode, &sri);
icode = (enum insn_code) sri.icode;
/* If there are no secondary reloads at all, we return NO_REGS.
If an intermediate register is needed, we return its class. */
if (icode == CODE_FOR_nothing || rclass != NO_REGS)
return rclass;
/* No intermediate register is needed, but we have a special reload
pattern, which we assume for now needs a scratch register. */
return scratch_reload_class (icode);
}
/* ICODE is the insn_code of a reload pattern. Check that it has exactly
three operands, verify that operand 2 is an output operand, and return
its register class.
??? We'd like to be able to handle any pattern with at least 2 operands,
for zero or more scratch registers, but that needs more infrastructure. */
enum reg_class
scratch_reload_class (enum insn_code icode)
{
const char *scratch_constraint;
enum reg_class rclass;
gcc_assert (insn_data[(int) icode].n_operands == 3);
scratch_constraint = insn_data[(int) icode].operand[2].constraint;
gcc_assert (*scratch_constraint == '=');
scratch_constraint++;
if (*scratch_constraint == '&')
scratch_constraint++;
rclass = reg_class_for_constraint (lookup_constraint (scratch_constraint));
gcc_assert (rclass != NO_REGS);
return rclass;
}
/* Return a memory location that will be used to copy X in mode MODE.
If we haven't already made a location for this mode in this insn,
call find_reloads_address on the location being returned. */
rtx
get_secondary_mem (rtx x ATTRIBUTE_UNUSED, machine_mode mode,
int opnum, enum reload_type type)
{
rtx loc;
int mem_valid;
/* By default, if MODE is narrower than a word, widen it to a word.
This is required because most machines that require these memory
locations do not support short load and stores from all registers
(e.g., FP registers). */
mode = targetm.secondary_memory_needed_mode (mode);
/* If we already have made a MEM for this operand in MODE, return it. */
if (secondary_memlocs_elim[(int) mode][opnum] != 0)
return secondary_memlocs_elim[(int) mode][opnum];
/* If this is the first time we've tried to get a MEM for this mode,
allocate a new one. `something_changed' in reload will get set
by noticing that the frame size has changed. */
if (secondary_memlocs[(int) mode] == 0)
{
#ifdef SECONDARY_MEMORY_NEEDED_RTX
secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
#else
secondary_memlocs[(int) mode]
= assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
#endif
}
/* Get a version of the address doing any eliminations needed. If that
didn't give us a new MEM, make a new one if it isn't valid. */
loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
mem_valid = strict_memory_address_addr_space_p (mode, XEXP (loc, 0),
MEM_ADDR_SPACE (loc));
if (! mem_valid && loc == secondary_memlocs[(int) mode])
loc = copy_rtx (loc);
/* The only time the call below will do anything is if the stack
offset is too large. In that case IND_LEVELS doesn't matter, so we
can just pass a zero. Adjust the type to be the address of the
corresponding object. If the address was valid, save the eliminated
address. If it wasn't valid, we need to make a reload each time, so
don't save it. */
if (! mem_valid)
{
type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
: type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
: RELOAD_OTHER);
find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
opnum, type, 0, 0);
}
secondary_memlocs_elim[(int) mode][opnum] = loc;
if (secondary_memlocs_elim_used <= (int)mode)
secondary_memlocs_elim_used = (int)mode + 1;
return loc;
}
/* Clear any secondary memory locations we've made. */
void
clear_secondary_mem (void)
{
memset (secondary_memlocs, 0, sizeof secondary_memlocs);
}
/* Find the largest class which has at least one register valid in
mode INNER, and which for every such register, that register number
plus N is also valid in OUTER (if in range) and is cheap to move
into REGNO. Such a class must exist. */
static enum reg_class
find_valid_class (machine_mode outer ATTRIBUTE_UNUSED,
machine_mode inner ATTRIBUTE_UNUSED, int n,
unsigned int dest_regno ATTRIBUTE_UNUSED)
{
int best_cost = -1;
int rclass;
int regno;
enum reg_class best_class = NO_REGS;
enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
unsigned int best_size = 0;
int cost;
for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
{
int bad = 0;
int good = 0;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno))
{
if (targetm.hard_regno_mode_ok (regno, inner))
{
good = 1;
if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno + n)
&& !targetm.hard_regno_mode_ok (regno + n, outer))
bad = 1;
}
}
if (bad || !good)
continue;
cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);
if ((reg_class_size[rclass] > best_size
&& (best_cost < 0 || best_cost >= cost))
|| best_cost > cost)
{
best_class = (enum reg_class) rclass;
best_size = reg_class_size[rclass];
best_cost = register_move_cost (outer, (enum reg_class) rclass,
dest_class);
}
}
gcc_assert (best_size != 0);
return best_class;
}
/* We are trying to reload a subreg of something that is not a register.
Find the largest class which contains only registers valid in
mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
which we would eventually like to obtain the object. */
static enum reg_class
find_valid_class_1 (machine_mode outer ATTRIBUTE_UNUSED,
machine_mode mode ATTRIBUTE_UNUSED,
enum reg_class dest_class ATTRIBUTE_UNUSED)
{
int best_cost = -1;
int rclass;
int regno;
enum reg_class best_class = NO_REGS;
unsigned int best_size = 0;
int cost;
for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
{
unsigned int computed_rclass_size = 0;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
{
if (in_hard_reg_set_p (reg_class_contents[rclass], mode, regno)
&& targetm.hard_regno_mode_ok (regno, mode))
computed_rclass_size++;
}
cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);
if ((computed_rclass_size > best_size
&& (best_cost < 0 || best_cost >= cost))
|| best_cost > cost)
{
best_class = (enum reg_class) rclass;
best_size = computed_rclass_size;
best_cost = register_move_cost (outer, (enum reg_class) rclass,
dest_class);
}
}
gcc_assert (best_size != 0);
#ifdef LIMIT_RELOAD_CLASS
best_class = LIMIT_RELOAD_CLASS (mode, best_class);
#endif
return best_class;
}
/* Return the number of a previously made reload that can be combined with
a new one, or n_reloads if none of the existing reloads can be used.
OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
push_reload, they determine the kind of the new reload that we try to
combine. P_IN points to the corresponding value of IN, which can be
modified by this function.
DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
static int
find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
enum reload_type type, int opnum, int dont_share)
{
rtx in = *p_in;
int i;
/* We can't merge two reloads if the output of either one is
earlyclobbered. */
if (earlyclobber_operand_p (out))
return n_reloads;
/* We can use an existing reload if the class is right
and at least one of IN and OUT is a match
and the other is at worst neutral.
(A zero compared against anything is neutral.)
For targets with small register classes, don't use existing reloads
unless they are for the same thing since that can cause us to need
more reload registers than we otherwise would. */
for (i = 0; i < n_reloads; i++)
if ((reg_class_subset_p (rclass, rld[i].rclass)
|| reg_class_subset_p (rld[i].rclass, rclass))
/* If the existing reload has a register, it must fit our class. */
&& (rld[i].reg_rtx == 0
|| TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
true_regnum (rld[i].reg_rtx)))
&& ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
&& (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
|| (out != 0 && MATCHES (rld[i].out, out)
&& (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
&& (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
&& (small_register_class_p (rclass)
|| targetm.small_register_classes_for_mode_p (VOIDmode))
&& MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
return i;
/* Reloading a plain reg for input can match a reload to postincrement
that reg, since the postincrement's value is the right value.
Likewise, it can match a preincrement reload, since we regard
the preincrementation as happening before any ref in this insn
to that register. */
for (i = 0; i < n_reloads; i++)
if ((reg_class_subset_p (rclass, rld[i].rclass)
|| reg_class_subset_p (rld[i].rclass, rclass))
/* If the existing reload has a register, it must fit our
class. */
&& (rld[i].reg_rtx == 0
|| TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
true_regnum (rld[i].reg_rtx)))
&& out == 0 && rld[i].out == 0 && rld[i].in != 0
&& ((REG_P (in)
&& GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
&& MATCHES (XEXP (rld[i].in, 0), in))
|| (REG_P (rld[i].in)
&& GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
&& MATCHES (XEXP (in, 0), rld[i].in)))
&& (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
&& (small_register_class_p (rclass)
|| targetm.small_register_classes_for_mode_p (VOIDmode))
&& MERGABLE_RELOADS (type, rld[i].when_needed,
opnum, rld[i].opnum))
{
/* Make sure reload_in ultimately has the increment,
not the plain register. */
if (REG_P (in))
*p_in = rld[i].in;
return i;
}
return n_reloads;
}
/* Return true if:
(a) (subreg:OUTER_MODE REG ...) represents a word or subword subreg
of a multiword value; and
(b) the number of *words* in REG does not match the number of *registers*
in REG. */
static bool
complex_word_subreg_p (machine_mode outer_mode, rtx reg)
{
machine_mode inner_mode = GET_MODE (reg);
poly_uint64 reg_words = REG_NREGS (reg) * UNITS_PER_WORD;
return (known_le (GET_MODE_SIZE (outer_mode), UNITS_PER_WORD)
&& maybe_gt (GET_MODE_SIZE (inner_mode), UNITS_PER_WORD)
&& !known_equal_after_align_up (GET_MODE_SIZE (inner_mode),
reg_words, UNITS_PER_WORD));
}
/* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
expression. MODE is the mode that X will be used in. OUTPUT is true if
the function is invoked for the output part of an enclosing reload. */
static bool
reload_inner_reg_of_subreg (rtx x, machine_mode mode, bool output)
{
rtx inner;
/* Only SUBREGs are problematical. */
if (GET_CODE (x) != SUBREG)
return false;
inner = SUBREG_REG (x);
/* If INNER is a constant or PLUS, then INNER will need reloading. */
if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
return true;
/* If INNER is not a hard register, then INNER will not need reloading. */
if (!(REG_P (inner) && HARD_REGISTER_P (inner)))
return false;
/* If INNER is not ok for MODE, then INNER will need reloading. */
if (!targetm.hard_regno_mode_ok (subreg_regno (x), mode))
return true;
/* If this is for an output, and the outer part is a word or smaller,
INNER is larger than a word and the number of registers in INNER is
not the same as the number of words in INNER, then INNER will need
reloading (with an in-out reload). */
return output && complex_word_subreg_p (mode, inner);
}
/* Return nonzero if IN can be reloaded into REGNO with mode MODE without
requiring an extra reload register. The caller has already found that
IN contains some reference to REGNO, so check that we can produce the
new value in a single step. E.g. if we have
(set (reg r13) (plus (reg r13) (const int 1))), and there is an
instruction that adds one to a register, this should succeed.
However, if we have something like
(set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
needs to be loaded into a register first, we need a separate reload
register.
Such PLUS reloads are generated by find_reload_address_part.
The out-of-range PLUS expressions are usually introduced in the instruction
patterns by register elimination and substituting pseudos without a home
by their function-invariant equivalences. */
static int
can_reload_into (rtx in, int regno, machine_mode mode)
{
rtx dst;
rtx_insn *test_insn;
int r = 0;
struct recog_data_d save_recog_data;
/* For matching constraints, we often get notional input reloads where
we want to use the original register as the reload register. I.e.
technically this is a non-optional input-output reload, but IN is
already a valid register, and has been chosen as the reload register.
Speed this up, since it trivially works. */
if (REG_P (in))
return 1;
/* To test MEMs properly, we'd have to take into account all the reloads
that are already scheduled, which can become quite complicated.
And since we've already handled address reloads for this MEM, it
should always succeed anyway. */
if (MEM_P (in))
return 1;
/* If we can make a simple SET insn that does the job, everything should
be fine. */
dst = gen_rtx_REG (mode, regno);
test_insn = make_insn_raw (gen_rtx_SET (dst, in));
save_recog_data = recog_data;
if (recog_memoized (test_insn) >= 0)
{
extract_insn (test_insn);
r = constrain_operands (1, get_enabled_alternatives (test_insn));
}
recog_data = save_recog_data;
return r;
}
/* Record one reload that needs to be performed.
IN is an rtx saying where the data are to be found before this instruction.
OUT says where they must be stored after the instruction.
(IN is zero for data not read, and OUT is zero for data not written.)
INLOC and OUTLOC point to the places in the instructions where
IN and OUT were found.
If IN and OUT are both nonzero, it means the same register must be used
to reload both IN and OUT.
RCLASS is a register class required for the reloaded data.
INMODE is the machine mode that the instruction requires
for the reg that replaces IN and OUTMODE is likewise for OUT.
If IN is zero, then OUT's location and mode should be passed as
INLOC and INMODE.
STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
OPTIONAL nonzero means this reload does not need to be performed:
it can be discarded if that is more convenient.
OPNUM and TYPE say what the purpose of this reload is.
The return value is the reload-number for this reload.
If both IN and OUT are nonzero, in some rare cases we might
want to make two separate reloads. (Actually we never do this now.)
Therefore, the reload-number for OUT is stored in
output_reloadnum when we return; the return value applies to IN.
Usually (presently always), when IN and OUT are nonzero,
the two reload-numbers are equal, but the caller should be careful to
distinguish them. */
int
push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
enum reg_class rclass, machine_mode inmode,
machine_mode outmode, int strict_low, int optional,
int opnum, enum reload_type type)
{
int i;
int dont_share = 0;
int dont_remove_subreg = 0;
#ifdef LIMIT_RELOAD_CLASS
rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
#endif
int secondary_in_reload = -1, secondary_out_reload = -1;
enum insn_code secondary_in_icode = CODE_FOR_nothing;
enum insn_code secondary_out_icode = CODE_FOR_nothing;
enum reg_class subreg_in_class ATTRIBUTE_UNUSED;
subreg_in_class = NO_REGS;
/* INMODE and/or OUTMODE could be VOIDmode if no mode
has been specified for the operand. In that case,
use the operand's mode as the mode to reload. */
if (inmode == VOIDmode && in != 0)
inmode = GET_MODE (in);
if (outmode == VOIDmode && out != 0)
outmode = GET_MODE (out);
/* If find_reloads and friends until now missed to replace a pseudo
with a constant of reg_equiv_constant something went wrong
beforehand.
Note that it can't simply be done here if we missed it earlier
since the constant might need to be pushed into the literal pool
and the resulting memref would probably need further
reloading. */
if (in != 0 && REG_P (in))
{
int regno = REGNO (in);
gcc_assert (regno < FIRST_PSEUDO_REGISTER
|| reg_renumber[regno] >= 0
|| reg_equiv_constant (regno) == NULL_RTX);
}
/* reg_equiv_constant only contains constants which are obviously
not appropriate as destination. So if we would need to replace
the destination pseudo with a constant we are in real
trouble. */
if (out != 0 && REG_P (out))
{
int regno = REGNO (out);