[U64 V1.18] CPU Port (Bit 3,6 and 7)

[ghost]

The following BASIC statement should return the value 23, but the U64 returns the value 223!
POKE 0,0: POKE 1,0: ? PEEK (1)

or in assembler:

lda #0
sta 0 ; set all portbits as inputs
sta 1 ; try to set all portbits to 0
lda 1 ; should be #$17, but on the U64 its #$df (bit 3,6 and 7 should be 0)

[GideonZ]

Thanks!
Bit 3 needs a bit more investigation, because this may depend on a pull-up / pull-down present in the datasette. Concerning bit 6 and 7 (and probably also bit 3 without datasette), the value read may depend on the value that was on the (virtual) pin before the direction was set to input. For instance:
lda #$ff
sta 0
sta 1
lda #0
sta 0
[delay]
lda 1 might actually have bits 6 and 7 set. depending on [delay]
It is known that the bits fall off to 0, but I'll have to see how long that takes on my C64.

[GideonZ]

According to the service manual of the 1530/1531 datasette, there are VARIOUS circuits used. There is ONE model that has a pull-up on the write pin; all others don't. So I think it is safe to assume that in most cases there is no pull-up on the write line (bit 3), so it should behave similar to bit 6 and 7. On the other hand, one could reason that the leakage current of the 7414 will likely have a preference for a logic '1', so maybe assuming a pull-up on bit 3 is not wrong.

[GideonZ]

With a little test program on my C64, bit 6 and 7 fall back to zero after approx 48000-49000 cycles, thus approx 49..50 ms. In case of my C64, bit 7 falls off a bit earlier than bit 6, but the difference is roughly 6000 cycles max. Interestingly, bit 3 remains 1! .... for... sit back.... 5 SECONDS. This is without datasette attached.

[GideonZ]

Ok.. found it.. On my board revision (Assy 250425), there is 470 pF connected to P3... Hence the 5 second delay. Let's say the bit flips from 1 to 0 at roughly 1V, this means that the voltage had dropped 4V in 5 seconds. This means that the leakage current is in the order of magnitude of I = (c * v) / t = 0.38 nA. That is really impressively small for NMOS. Other approach: what is the capacitance of the internal non-connected I/O pad of the 6510? Linear extrapolation: 470 pF => 5 seconds, 50 ms = 0.01 * 470 pF = 4.7pF. Yeah, sounds about right.

[GideonZ]

Fixed in 1.1A.