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It seems that currently dslx/ir_verilog rules are connected to bazel_rules_hdl's verilog_library thru brick and mortar files, see:
dslx/ir_verilog
bazel_rules_hdl
verilog_library
xls/xls/examples/BUILD
Lines 407 to 412 in 75930f7
It'd be nice to leverage instead structured bazel types like VerilogInfo: https://github.com/hdl/bazel_rules_hdl/blob/main/verilog/providers.bzl#L19, it could also allow simulation rules to ask for specific variant of (system)verilog depending of their frontend capabilities.
VerilogInfo
The text was updated successfully, but these errors were encountered:
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It seems that currently
dslx/ir_verilog
rules are connected tobazel_rules_hdl
'sverilog_library
thru brick and mortar files, see:xls/xls/examples/BUILD
Lines 407 to 412 in 75930f7
It'd be nice to leverage instead structured bazel types like
VerilogInfo
: https://github.com/hdl/bazel_rules_hdl/blob/main/verilog/providers.bzl#L19, it could also allow simulation rules to ask for specific variant of (system)verilog depending of their frontend capabilities.The text was updated successfully, but these errors were encountered: