-
-
Notifications
You must be signed in to change notification settings - Fork 338
/
DisassemblerX8664.cpp
233 lines (183 loc) · 5.33 KB
/
DisassemblerX8664.cpp
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
/*
* Copyright 2012, Alex Smith, alex@alex-smith.me.uk.
* Copyright 2009-2012, Ingo Weinhold, ingo_weinhold@gmx.de.
* Copyright 2008, François Revol, revol@free.fr
* Distributed under the terms of the MIT License.
*/
#include "DisassemblerX8664.h"
#include <new>
#include "udis86.h"
#include <OS.h>
#include "CpuStateX8664.h"
#include "InstructionInfo.h"
static uint8 RegisterNumberFromUdisIndex(int32 udisIndex)
{
switch (udisIndex) {
case UD_R_RIP: return X86_64_REGISTER_RIP;
case UD_R_RSP: return X86_64_REGISTER_RSP;
case UD_R_RBP: return X86_64_REGISTER_RBP;
case UD_R_RAX: return X86_64_REGISTER_RAX;
case UD_R_RBX: return X86_64_REGISTER_RBX;
case UD_R_RCX: return X86_64_REGISTER_RCX;
case UD_R_RDX: return X86_64_REGISTER_RDX;
case UD_R_RSI: return X86_64_REGISTER_RSI;
case UD_R_RDI: return X86_64_REGISTER_RDI;
case UD_R_R8: return X86_64_REGISTER_R8;
case UD_R_R9: return X86_64_REGISTER_R9;
case UD_R_R10: return X86_64_REGISTER_R10;
case UD_R_R11: return X86_64_REGISTER_R11;
case UD_R_R12: return X86_64_REGISTER_R12;
case UD_R_R13: return X86_64_REGISTER_R13;
case UD_R_R14: return X86_64_REGISTER_R14;
case UD_R_R15: return X86_64_REGISTER_R15;
case UD_R_CS: return X86_64_REGISTER_CS;
case UD_R_DS: return X86_64_REGISTER_DS;
case UD_R_ES: return X86_64_REGISTER_ES;
case UD_R_FS: return X86_64_REGISTER_FS;
case UD_R_GS: return X86_64_REGISTER_GS;
case UD_R_SS: return X86_64_REGISTER_SS;
}
return X86_64_INT_REGISTER_END;
}
struct DisassemblerX8664::UdisData : ud_t {
};
DisassemblerX8664::DisassemblerX8664()
:
fAddress(0),
fCode(NULL),
fCodeSize(0),
fUdisData(NULL)
{
}
DisassemblerX8664::~DisassemblerX8664()
{
delete fUdisData;
}
status_t
DisassemblerX8664::Init(target_addr_t address, const void* code, size_t codeSize)
{
// unset old data
delete fUdisData;
fUdisData = NULL;
// set new data
fUdisData = new(std::nothrow) UdisData;
if (fUdisData == NULL)
return B_NO_MEMORY;
fAddress = address;
fCode = (const uint8*)code;
fCodeSize = codeSize;
// init udis
ud_init(fUdisData);
ud_set_input_buffer(fUdisData, (unsigned char*)fCode, fCodeSize);
ud_set_mode(fUdisData, 64);
ud_set_pc(fUdisData, (uint64_t)fAddress);
ud_set_syntax(fUdisData, UD_SYN_ATT);
ud_set_vendor(fUdisData, UD_VENDOR_INTEL);
// TODO: Set the correct vendor!
return B_OK;
}
status_t
DisassemblerX8664::GetNextInstruction(BString& line, target_addr_t& _address,
target_size_t& _size, bool& _breakpointAllowed)
{
unsigned int size = ud_disassemble(fUdisData);
if (size < 1)
return B_ENTRY_NOT_FOUND;
uint64 address = ud_insn_off(fUdisData);
char buffer[256];
snprintf(buffer, sizeof(buffer), "0x%08" B_PRIx64 ": %16.16s %s", address,
ud_insn_hex(fUdisData), ud_insn_asm(fUdisData));
// TODO: Resolve symbols!
line = buffer;
_address = address;
_size = size;
_breakpointAllowed = true;
// TODO: Implement (rep!)!
return B_OK;
}
status_t
DisassemblerX8664::GetPreviousInstruction(target_addr_t nextAddress,
target_addr_t& _address, target_size_t& _size)
{
if (nextAddress < fAddress || nextAddress > fAddress + fCodeSize)
return B_BAD_VALUE;
// loop until hitting the last instruction
while (true) {
target_size_t size = ud_disassemble(fUdisData);
if (size < 1)
return B_ENTRY_NOT_FOUND;
target_addr_t address = ud_insn_off(fUdisData);
if (address + size == nextAddress) {
_address = address;
_size = size;
return B_OK;
}
}
}
status_t
DisassemblerX8664::GetNextInstructionInfo(InstructionInfo& _info,
CpuState* state)
{
unsigned int size = ud_disassemble(fUdisData);
if (size < 1)
return B_ENTRY_NOT_FOUND;
uint32 address = (uint32)ud_insn_off(fUdisData);
instruction_type type = INSTRUCTION_TYPE_OTHER;
target_addr_t targetAddress = 0;
if (fUdisData->mnemonic == UD_Icall)
type = INSTRUCTION_TYPE_SUBROUTINE_CALL;
else if (fUdisData->mnemonic == UD_Ijmp)
type = INSTRUCTION_TYPE_JUMP;
if (state != NULL)
targetAddress = GetInstructionTargetAddress(state);
char buffer[256];
snprintf(buffer, sizeof(buffer), "0x%08" B_PRIx32 ": %16.16s %s", address,
ud_insn_hex(fUdisData), ud_insn_asm(fUdisData));
// TODO: Resolve symbols!
if (!_info.SetTo(address, targetAddress, size, type, true, buffer))
return B_NO_MEMORY;
return B_OK;
}
target_addr_t
DisassemblerX8664::GetInstructionTargetAddress(CpuState* state) const
{
if (fUdisData->mnemonic != UD_Icall && fUdisData->mnemonic != UD_Ijmp)
return 0;
CpuStateX8664* x64State = dynamic_cast<CpuStateX8664*>(state);
if (x64State == NULL)
return 0;
target_addr_t targetAddress = 0;
switch (fUdisData->operand[0].type) {
case UD_OP_REG:
{
targetAddress = x64State->IntRegisterValue(
RegisterNumberFromUdisIndex(fUdisData->operand[0].base));
targetAddress += fUdisData->operand[0].offset;
}
break;
case UD_OP_MEM:
{
targetAddress = x64State->IntRegisterValue(
RegisterNumberFromUdisIndex(fUdisData->operand[0].base));
targetAddress += x64State->IntRegisterValue(
RegisterNumberFromUdisIndex(fUdisData->operand[0].index))
* fUdisData->operand[0].scale;
}
break;
case UD_OP_JIMM:
{
targetAddress = ud_insn_off(fUdisData)
+ fUdisData->operand[0].lval.sdword + ud_insn_len(fUdisData);
}
break;
case UD_OP_IMM:
case UD_OP_CONST:
{
targetAddress = fUdisData->operand[0].lval.udword;
}
break;
default:
break;
}
return targetAddress;
}