/
Makefile.rules
128 lines (98 loc) · 2.87 KB
/
Makefile.rules
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
##
## Standard rules
##
.SUFFIXES: .c .C .cc .o .i .S .s .l .y
$(OBJ_DIR)/%.o %.o: %.c
$(ECHO) " ---- Compiling $< (C)"
$(SILENT) $(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
$(OBJ_DIR)/%.o %.o: %.C
$(ECHO) " ---- Compiling $< (C++)"
$(SILENT) $(CXX) $(CFLAGS) $(INCLUDES) -c -o $@ $<
$(OBJ_DIR)/%.o %.o: %.cc
$(ECHO) " ---- Compiling $< (C++)"
$(SILENT) $(CXX) $(CFLAGS) $(INCLUDES) -c -o $@ $<
$(OBJ_DIR)/%.i %.i: %.c
$(ECHO) " ---- Pre-processing $< (C)"
$(SILENT) $(CPP) $(CFLAGS) $(INCLUDES) $< > $@
$(OBJ_DIR)/%.i %.i: %.C
$(ECHO) " ---- Pre-processing $< (C++)"
$(SILENT) $(CPP) $(CFLAGS) $(INCLUDES) $< > $@
$(OBJ_DIR)/%.i %.i: %.cc
$(ECHO) " ---- Pre-processing $< (C++)"
$(SILENT) $(CPP) $(CFLAGS) $(INCLUDES) $< > $@
$(OBJ_DIR)/%.s %.s: %.c
$(ECHO) " ---- Creating assembly file for $< (C)"
$(SILENT) $(CPP) $(CFLAGS) $(INCLUDES) -S $<
$(OBJ_DIR)/%.s %.s: %.C
$(ECHO) " ---- Creating assembly file for $< (C++)"
$(SILENT) $(CPP) $(CFLAGS) $(INCLUDES) -S $<
$(OBJ_DIR)/%.s: %.cc
$(ECHO) " ---- Creating assembly file for $< (C++)"
$(SILENT) $(CPP) $(CFLAGS) $(INCLUDES) -S $<
$(OBJ_DIR)/%.c %.c: %.l
$(ECHO) " ---- Creating C file for $< (LEX)"
$(SILENT) $(LEX) $<
$(SILENT) mv -f lex.yy.c $*.c
$(OBJ_DIR)/%.C %.C: %.l
$(ECHO) " ---- Creating C++ file for $< (LEX)"
$(SILENT) $(LEX) -+ $<
$(SILENT) mv -f lex.yy.cc $*.cc
$(SILENT) mv -f FlexLexer.h $*.h
$(OBJ_DIR)/%.cc %.cc: %.l
$(ECHO) " ---- Creating C++ file for $< (LEX)"
$(SILENT) $(LEX) -+ $<
$(SILENT) mv -f lex.yy.c $*.cc
$(SILENT) mv -f FlexLexer.h $*.h
$(OBJ_DIR)/%.tab.c %.tab.c: %.y
$(ECHO) " ----- Creating C file for $< (YACC)"
$(SILENT) $(YACC) -b $* $<
$(OBJ_DIR)/%.tab.C %.tab.C: %.y
$(ECHO) " ----- Creating C++ file for $< (YACC)"
$(SILENT) $(YACC) -b $* $<
$(SILENT) mv -f $*.tab.c $*.tab.cc
$(OBJ_DIR)/%.tab.cc %.tab.cc: %.y
$(ECHO) " ---- Creating C++ file for $< (YACC)"
$(SILENT) $(YACC) -b $* $<
$(SILENT) mv -f $*.tab.c $*.tab.cc
##
## Packaging rules
## These are basically broke right now
##
#tar-src:
# $(RM) $(NAME)-src.tar ;
# cd .. ; \
# for i in $(TAR_SRC) ; do \
# tar -rhvf $(NAME)/$(NAME)-src.tar $(NAME)/$$i ; \
# done
# gzip -9 $(NAME)-src.tar
# mv -f $(NAME)-src.tar.gz $(NAME)-src.tgz
#tar-bin: build doc
# $(RM) $(NAME)-bin.tar ;
# for i in $(TAR_BIN) ; do \
# tar -rhvf $(NAME)-bin.tar $$i ; \
# done
# gzip -9 $(NAME)-bin.tar
# mv -f $(NAME)-bin.tar.gz $(NAME)-bin.tgz
#rpm:
#srpm:
##
## Need come CVS and version rules
##
#cvs_ci:
#cvs_co:
#cvs_makever:
#compile-date.h:
##
## Dependencies
##
dep $(DEPEND) depend:
ifeq ($(DEPENDENCIES),)
else
$(ECHO) " ---- Analysing dependencies for $(DEPENDENCIES)"
$(SILENT) $(CPP) -M $(CFLAGS) $(INCLUDES) $(DEPENDENCIES) | \
$(AWK) '{if (index($$0,".o:") > 0) printf "$(OBJ_DIR)/"; print $0}' \
> $(DEPEND)
endif
ifeq ($(DEPEND), $(wildcard $(DEPEND)))
include $(DEPEND)
endif