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Table of Contents

Purpose

Explain how to link Novas object files for FSDB dumping with various standard simulators.

FSDB Overview

FSDB Format

  • An FSDB file is about 5 to 50 times smaller than a VCD file.
  • Verdi system displays waveform and back-annotated signal values faster.
Convert VCD file into FSDB file: _vfast_

Convert FSDB file into VCD file:

FSDB Related Environment Variables

  • NOTE*: A novas_dump.log file gets created during simulation to record some essential simulation/dumping information, such as simulation options used, environment variable settings, and Novas object directories linked. This log file is needed to report a new unified dumper related issue effectively.

Dumping Commands

The unified FSDB dumper supportes three methods for specifying options:

  • Specify an option on the simulator command line.
  • Specify an option using an environment variables.
  • Specify an option in an FSDB dumping command
If the same option is set using more than one method, the resolution is: Method 1 > Method 2 > Method 3.

For the mapping of the simulator command line options to their equivalent environment variables and FSDB dumping command options, please refer to "Linking Novas Files with Simulators and Enabling FSDB Dumping" in Verdi doc directory.

General Dumping Commands

$fsdbDumpfile

To specify the FSDB file name created by the Novas object files for FSDB dumping. If not specified, the default FSDB file name is "novas.fsdb". This command is valid only before $fsdbDumpvars is executed and is ignored if specified after $fsdbDumpvars.

To restrict the largest dump file size to the user-defined size limitation, please specify the limit size in megabyte format. This function will affect the FSDB file that is specified in "FSDB_Name". The FSDB dumper uses the sliding window scheme to keep the last signal values in the FSDB file. It drops the old values if file size exceeds the user-specified limitation.

For *$fsdbDumpvars*, *$fsdbDumpMDA*, *$fsdbDumpvarsES*, *$fsdbDumpSVA* and *$fsdbDumpvarsByFile*, user can use the option "+fsdbfile+filename.fsdb" to specify the target FSDB file to dump. It is equal to using $fsdbDumpfile then $fsdbDumpvars.

Syntax

  When specified in the design:

Arguments

  • FSDB_Name
  Specify the name of the FSDB file generated by the Novas object files for FSDB dumping.

  • Limit_Size
  Specify the maximum FSDB file size in megabyte.

  *NOTE*: The folowing two arguments are valid only if the command is specified inside the design.

  • Limit_Size_var
  Specify the maximum FSDB file size in a variable.

  • FSDB_Name_var
  Specify the FSDB file name in a variable.

Examples

  • NOTE*: The following example uses the syntax for calling the FSDB dumping command in the design. Refer to the syntax section for the correct format for the simulator command line.

Variable Example

If specified in the design, the design variable could be passed as command argument.

$fsdbDumpvars

Description

To dump signal-value-change information to the FSDB file.

  • NOTE*:
 * 1. For VCS users, to include memory, MDA, packed array and structure information in the generated FSDB file, the -sverilog, +vpi, +memcbk and +vcsd options must be included when VCS is invoked to compile the design.
 * 2. The generated FSDB can be converted to VCD which will include the MDA and structure data.

Syntax

When specified in the design:

  • NOTE*:
 * 1. Dumping design variables only supports dumping commands that have been specified inside the source code of the design; for interactive mode, use the task in the simulator command line format instead.
 * 2. After a dumping command has been specified inside the design, it is compatible with both dumping variable and simulator interactive mode formats.

When specified on the simulator command line:

  • *Synopsys*:
  {{{
    $fsdbDumpvars;
    $fsdbDumpvars([depth] [,instance]);
    $fsdbDumpvars(depth [,instance]);
    $fsdbDumpvars("option",]*);
  }}}

Arguments

- depth Specify how many levels of hierarchy to dump for the subsequent scopes. If the subsequent arguments are signals, only these signals will be dumped.

  • NOTE*: When specified in the design, if the depth argument is specified as a variable type, the first argument must be specified as a string literal "level=" and the second argument as level argument. The default level value is 0. Level values have the following meanings:
  0: all signals in all scopes.

  1: all signals in current scope.

  2: all signals in the current scope and all scopes one level below.

  n: all signals in the current scope and all scopes n-1 levels below.

- "level=" Keyword to identify the next argument is a number.

  • NOTE*: Valid only if the command is specified inside the design.
- depth_var Specify how many levels of hierarchy to dump for the subsequent scopes in a variable.

  • NOTE*: Valid only if the command is specified inside the design.
- instance This definition gives either the module scope or signals in full hierarchy format that specify the objects to dump.

  • NOTE*:If this FSDB dump command is included in a VHDL design, double quotes are required for all signals under a VHDL scope. If this FSDB dump command is included in a Verilog design, double quotes are not required.
- "instance=" Keyword to identify the content of the next argument is a module scope or signal.

  • NOTE*: Valid only if the command is specified inside the design.
- instance_var This definition gives either the module scope or signal which represented by instance_var that specify the object to dump.

  • NOTE*: Valid only if the command is specified inside the design.
- option Specify one or more of the following options.

| "+IO_Only" | Only IO port signals will be dumped. | | "+Reg_Only" | Only reg type signals will be dumped. | | "+mda" | Dump all memory and MDA signals in all scopes specified | | | in $fsdbDumpvars or the entire design if no scope is specified. | | | This option is covered by the "+all" option and is effective | | | for SystemVerilog's MDAs only. For VCS users, the VCS | | | option "+memcbk" may be needed while compiling the design. | | | *NOTE*: This option does not apply to VHDL arrays because | | | they are dumped by default without this option. | | | Example: $fsdbDumpvars("+mda"); | | "+mda+packedOnly" | Dump the packed signals in the design. Refer to the | | | Supported MDA Format Table for a summary of which | | | packed or unpacked one-dimensional/two-dimensional | | | signals are dumped with or without the +mda+packedOnly | | | and +mda options. | | | This option is covered by the "+mda" option. | | | Example: $fsdbDumpvars("+mda+packedOnly"); | | "+struct" | Dump struct, MDA struct (i.e. st2[0:1]), MDA in struct (i.e. | | | st3.r[1:0][2:0]) and packed MDA in all scopes specified in | | | $fsdbDumpvars or the entire design if no scope is specified. | | | Unpacked array/MDA will not be dumped. "+struct" is not | | | needed if "+all" is specified. | | | Example: $fsdbDumpvars("+struct"); | | "+skip_cell_instance=mode" | Enable/Disable dumping of cell instance where mode means: | | | 0: disable functionality. | | | 1: Skip all cell info. | | | 2: Dump all ports of cell instance. | | | Others: Show error message and ignore it. | | | Example: $fsdbDumpvars("+skip_cell_instance"); | | "+strength" | Enable strength dumping. | | | Example: $fsdbDumpvars("+strength"); | | "+all" | Dump all signals including the memory, MDA, packed | | | array, structure, union and packed structure signals in all | | | scopes specified in $fsdbDumpvars or the entire design if | | | no scope is specified. | | | For VCS users, the VCS option "+memcbk" may be needed | | | when compiling the design. | | "+parameter" | Dump parameters. | | | Example: $fsdbDumpvars("+parameter"); | | "+trace_process" | Dump VHDL processes. | | | Example: $fsdbDumpvars("+trace_process"); | | "+no_functions" | Disable dumping of functions in the design. | | | Example: $fsdbDumpvars("+no_functions"); | | "+fsdbfile+filename" | Specify the FSDB file name. | | | If not specified, the default FSDB file name is "novas.fsdb". |

- "option=" Keyword to identify the next argument is a string.

  • NOTE*: Valid only if the command is specified inside the design.
- option_var Specify the option in a variable.

  • NOTE*: Valid only if the command is specified inside the design.

Examples

  • NOTE*: The following example uses the syntax for calling the FSDB dumping command in the design. Refer to the syntax section for the correct format for the simulator command line.
- $fsdbDumpvars; Dump all signals in the module instances below this module.

- $fsdbDumpvars(0, system); Dump all signals in the module instances below system.

- $fsdbDumpvars(0, system, "+fsdbfile+novas.fsdb"); Dump all signals in the module instances below system to the specified FSDB file named "novas.fsdb"

- $fsdbDumpvars(1, top.dut1.u1.clk); Dump the clk signal under top.dut1.u1 when top and u1 are Verilog scopes and dut1 is a VHDL scope. This command is included in a Verilog design.

- $fsdbDumpvars("level=", level_reg, system); Dump all signals in the system instance and module instances below it up to the depth that level_reg variable indicates.

- $fsdbDumpvars("+fsdbfile+my.fsdb") Dump all signals under system scope to the specified FSDB file, “my.fsdb”.

$fsdbDumpMDA

Description

To dump value-changes of MDA (one or multi-dimensional array) signals to the FSDB file. All memories and MDAs within the specified instance are dumped. In addition, partial range dumping of a specific MDA instance's value change data into the FSDB file is supported.

  • NOTE*:
1. For VCS users, to include memory, MDA, packed array and structure information in the generated FSDB file, the -sverilog, +vpi, +memcbk and +vcsd options must be included when VCS is invoked to compile the design.

2. The generated FSDB can be converted to VCD which will include the MDA and structure data.

Syntax

When specified in the design:

 *or*

When specified on the simulator command line:

  • *Synopsys*:
 *or*

Arguments

- depth Specify how many levels of hierarchy to dump for the subsequent scopes.

- "level=" Keyword to identify the next argument is a number.

  • NOTE*: Valid only if the command is specified inside the design.
- depth_var Specify how many levels of hierarchy to dump for the subsequent scopes in a variable.

  • NOTE*: Valid only if the command is specified inside the design.
- instance Give either the module scope or signal that contains the MDA objects to dump.

- "instance=" Keyword to identify the content of the next argument is a module scope or signal.

- instance_var Give either the module scope or signal represented by instance_var that specifies the object to dump. - option | +fsdbfile+filename | Specify the FSDB file name. If not specified, the | | | default FSDB file name is "novas.fsdb". | | "+skip_cell_instance=mode" | Enable/Disable dumping of cell instance where | | | mode means: | | | 0: Disable functionality. | | | 1 or 2: Skip all cell information. | | | Others: Show error message and ignore it. |

- "option=" Keyword to identify the next argument is a string.

  • NOTE*:Valid only if the command is specified inside the design.
- option_var Specify the option in a variable.
  • NOTE*:Valid only if the command is specified inside the design.
- mda_instance The target MDA instance to select ranges from.

- Nth_dim_begin_index The beginning index number of the Nth dimension.

- Nth_dim_size The size of the Nth dimension to dump.

  • NOTE*: Partially selecting MDA's dimensions is valid for SystemVerilog MDA statements only. It will not be valid if used by the VHDL procedure call, fsdbDumpMDA.

Examples

  • NOTE*: The following example uses the syntax for calling the FSDB dumping command in the design. Refer to the syntax section for the correct format for the simulator command line.
Assume the following memory and MDA signal are defined:

- $fsdbDumpMDA(plane); Dump all cells of memory plane.

- $fsdbDumpMDA(screen); Dump all cells of MDA screen.

- $fsdbDumpMDA(system); Dump all memories and MDAs under the system scope and its child scopes.

- $fsdbDumpMDA(1, system.i_pram); Dump all memories and MDAs under the system.pram scope.

- $fsdbDumpMDA(0, top, "+skip_cell_instance=1", "+fsdbfile+dump.fsdb"); Dump all memories and MDAs under top scope and skip cell instance.

- $fsdbDumpMDA(screen, 10, 20, 15); Dump cells screen[10][15][1], screen[10][15][0], screen[11][15][1], screen[11][15][0]..., screen[29][15][1], and screen[29][15][0]. The total number of cells dumped is 40.

Variable Example

If specified in the design, the design variable can be passed as an argument.

Linking with Synopsys Simulators

  - [[link with vcs][Linking with Synopsys Simulators]]

Linking with ModelSim Simulators

  - [[link with msim][Linking with ModelSim Simulators]]