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"Expected Expression" Error #40

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ProxyPlayerHD opened this issue May 24, 2020 · 4 comments
Closed

"Expected Expression" Error #40

ProxyPlayerHD opened this issue May 24, 2020 · 4 comments

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@ProxyPlayerHD
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i'm back yet again with another confusing error! hope you missed me!

I'm currently working on building my own 65C02, and in order to test instructions i need code to test them with.

i wrote this simple piece to test the BBS/BBR instructions:

START:
	BBR 0,0,.TESTR
	HLT
	
	.TESTR:
	BBS 0,0,.TESTS
	HLT
	
	.TESTS:
	LDA #0x69
HLT

but i'm getting this error:

testing2.C02C:35:7 31:7:
error: expected expression
  29 |
  30 | START:
  31 |   BBR 0 ,0,.TESTR
     |        ^
  32 |   HLT
  33 |

testing2.C02C:35:7 35:7:
error: expected expression
  33 |
  34 |   .TESTR:
  35 |   BBS 0 ,0,.TESTS
     |        ^
  36 |   HLT
  37 |

and this is the part in the CPU file:

BBR {val},{src},{src1} -> {val}[3:0] @ 0xF[3:0] @ src[7:0] @ ({src1} - pc)[7:0]

BBS {val},{src},{src1} -> ({val} + 8)[3:0] @ 0xF[3:0] @ src[7:0] @ ({src1} - pc)[7:0]

also while we're at it, why are all of the "#" keywords or commands like "#d", "#str", etc. case sensitive?
and lastly is it possible to have a "#bankdef" fill all empty or unused bytes with a specific number instead of of just 0's?

@hlorenzi
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Owner

I couldn't quite reproduce the exact error you mentioned without a proper test case, but I got a similar one, and I think I was able to fix the core issue. Could you please test the new version (it's also in the nightly Release) to check if your problem has been solved as well?

By the way, I've also made directive names case-insensitive, but no customizable bank fill value yet.

@ProxyPlayerHD
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Author

using the exact same code and CPU file i now get a different error:

Z:\Logisim\CPU_65C02V\CASM>customasm.exe testing2.C02C
customasm v0.10.6-8-ga4477b7 (2020-06-13, x86_64-pc-windows-gnu)
assembling `testing2.C02C`...

testing2.C02C:31:2 31:16:
error: failed to resolve instruction
  29 |
  30 | START:
  31 |   BBR 0,0,.TESTR
     |   ^^^^^^^^^^^^^^
  32 |   HLT
  33 |
     testing2.C02C:31:2 31:16:
     error: address is out of bank range
       29 |
       30 | START:
       31 |   BBR 0,0,.TESTR
          |   ^^^^^^^^^^^^^^
       32 |   HLT
       33 |

testing2.C02C:35:2 35:16:
error: failed to resolve instruction
  33 |
  34 |   .TESTR:
  35 |   BBS 0,0,.TESTS
     |   ^^^^^^^^^^^^^^
  36 |   HLT
  37 |
     testing2.C02C:35:2 35:16:
     error: address is out of bank range
       33 |
       34 |   .TESTR:
       35 |   BBS 0,0,.TESTS
          |   ^^^^^^^^^^^^^^
       36 |   HLT
       37 |

overall i'm confused why this even happens, it's just a regular instruction with 3 parameters, i've done more with some RISC based CPUs so why is this such an issue?

here the full CPU file, and file i'm testing this with, so you can hopefully reproduce this:
CPU FILE (pastebin)
ASM FILE (pastebin)

and thanks for the changes to case sensitivity. it's really amazing that you do these changes and how quickly as well.

@hlorenzi
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Owner

Ok, I think I got it now! Can you try it on the new Nightly build?

It was an issue with bank range checks for instructions that use forward-referenced labels. It was a bit tricky to solve, but I think it happened because my code was too messy. I think it's in need of a big refactoring.

@ProxyPlayerHD
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Sorry it was late and i got to bed.
I did try the newest build and it did assemble, and looking at the binary file it seems correct.
Awesome!
thanks man!

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