Topic Modelling Using Gensim .ipynb

{
 "cells": [
  {
   "cell_type": "code",
   "execution_count": 6,
   "metadata": {
    "scrolled": true
   },
   "outputs": [],
   "source": [
    "from nltk.tokenize import RegexpTokenizer\n",
    "from stop_words import get_stop_words\n",
    "from nltk.stem.wordnet import WordNetLemmatizer\n",
    "from gensim import corpora, models\n",
    "import pandas as pd\n",
    "import gensim\n",
    "import pyLDAvis.gensim\n"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": null,
   "metadata": {},
   "outputs": [],
   "source": [
    "print(get_stop_words)"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 7,
   "metadata": {},
   "outputs": [],
   "source": [
    "pattern = r'\\b[^\\d\\W]+\\b'\n",
    "tokenizer = RegexpTokenizer(pattern)\n",
    "en_stop = get_stop_words('en')\n",
    "lemmatizer = WordNetLemmatizer()"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 8,
   "metadata": {},
   "outputs": [
    {
     "name": "stderr",
     "output_type": "stream",
     "text": [
      "<input>:1: DeprecationWarning: invalid escape sequence \\P\n",
      "<input>:1: DeprecationWarning: invalid escape sequence \\P\n",
      "<input>:1: DeprecationWarning: invalid escape sequence \\P\n",
      "<ipython-input-8-d64d8fbeb172>:1: DeprecationWarning: invalid escape sequence \\P\n",
      "  df = pd.read_excel(\"D:\\Projects\\MRC\\wipoLinking_ELECT_IntegreatedCircuits_test.xlsx\")\n"
     ]
    }
   ],
   "source": [
    "df = pd.read_excel(\"D:\\Projects\\MRC\\wipoLinking_ELECT_IntegreatedCircuits_test.xlsx\")"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 9,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/html": [
       "<div>\n",
       "<style scoped>\n",
       "    .dataframe tbody tr th:only-of-type {\n",
       "        vertical-align: middle;\n",
       "    }\n",
       "\n",
       "    .dataframe tbody tr th {\n",
       "        vertical-align: top;\n",
       "    }\n",
       "\n",
       "    .dataframe thead th {\n",
       "        text-align: right;\n",
       "    }\n",
       "</style>\n",
       "<table border=\"1\" class=\"dataframe\">\n",
       "  <thead>\n",
       "    <tr style=\"text-align: right;\">\n",
       "      <th></th>\n",
       "      <th>TERM</th>\n",
       "      <th>Title</th>\n",
       "      <th>Text</th>\n",
       "    </tr>\n",
       "  </thead>\n",
       "  <tbody>\n",
       "    <tr>\n",
       "      <th>0</th>\n",
       "      <td>fully-depleted silicon-on-insulator transistor</td>\n",
       "      <td>BUILDING FULLY-DEPLETED AND PARTIALLY-DEPLETED...</td>\n",
       "      <td>There are two types of conventional SOI device...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>1</th>\n",
       "      <td>semiconductor substrate</td>\n",
       "      <td>SEMICONDUCTOR COMPONENT AND A METHOD FOR IDENT...</td>\n",
       "      <td>The present invention relates to a method for ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>2</th>\n",
       "      <td>transistor-transistor logic</td>\n",
       "      <td>IDENTIFICATION TAG</td>\n",
       "      <td>TTL - Transistor-Transistor Logic is a class o...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>3</th>\n",
       "      <td>TTL</td>\n",
       "      <td>NaN</td>\n",
       "      <td>TTL, i.e. transistor-transistor logic, is a co...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>4</th>\n",
       "      <td>land</td>\n",
       "      <td>ELECTRONIC CONTROL DEVICE FOR A LIGHTING DEVIC...</td>\n",
       "      <td>The term \"land\" as used herein refers to that ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>5</th>\n",
       "      <td>pad</td>\n",
       "      <td>NaN</td>\n",
       "      <td>The term pad as used herein typically refers t...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>6</th>\n",
       "      <td>land pad</td>\n",
       "      <td>NaN</td>\n",
       "      <td>[...] wherein the printed circuit board has a ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>7</th>\n",
       "      <td>programmable chip</td>\n",
       "      <td>LOOK UP TABLE STRUCTURE SUPPORTING QUATERNARY ...</td>\n",
       "      <td>Programmable chips such as programmable logic ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>8</th>\n",
       "      <td>LGA package</td>\n",
       "      <td>MULTIPLE CHIP PACKAGE MODULE HAVING INVERTED P...</td>\n",
       "      <td>[T]he additional package can be a BCC or a QFN...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>9</th>\n",
       "      <td>pin grid array package</td>\n",
       "      <td>METHOD AND APPARATUS FOR INSPECTION OF PIN GR...</td>\n",
       "      <td>In the manufacturing of integrated circuits, t...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>10</th>\n",
       "      <td>PGA package</td>\n",
       "      <td>HIGH SPEED, HIGH DENSITY, LOW POWER DIE INTERC...</td>\n",
       "      <td>Typical interface schemes for integrated circu...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>11</th>\n",
       "      <td>wafer</td>\n",
       "      <td>NaN</td>\n",
       "      <td>When integrated circuits are initially fabrica...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>12</th>\n",
       "      <td>IC package</td>\n",
       "      <td>LEADLESS ARRAY PLASTIC PACKAGE WITH VARIOUS IC...</td>\n",
       "      <td>Systems, methods, and technology for integrate...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>13</th>\n",
       "      <td>ball grid array package</td>\n",
       "      <td>VARIED SOLDER MASK OPENING DIAMETERS WITHIN A ...</td>\n",
       "      <td>The ball grid array package includes a carrier...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>14</th>\n",
       "      <td>land grid array package</td>\n",
       "      <td>HIGH-POWER LAND GRID ARRAY PACKAGE AND SOCKET</td>\n",
       "      <td>Of the grid array packages, the most simple an...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>15</th>\n",
       "      <td>wafer prober</td>\n",
       "      <td>WAFER PROBER USING A TOUCH PAD</td>\n",
       "      <td>A chuck top used for a wafer prober for inspec...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>16</th>\n",
       "      <td>wafer level packaging</td>\n",
       "      <td>COMPOSITIONS AND PROCESSES FOR PHOTORESIST STR...</td>\n",
       "      <td>The recent trend to portable and wireless comp...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>17</th>\n",
       "      <td>test pattern</td>\n",
       "      <td>METHOD AND INSTALLATION FOR ANALYZING AN INTEG...</td>\n",
       "      <td>Test patterns are designed to find particular ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>18</th>\n",
       "      <td>test vector</td>\n",
       "      <td>SCAN VECTOR SUPPORT FOR EVENT BASED TEST SYSTEM</td>\n",
       "      <td>To facilitate better understanding of the pres...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>19</th>\n",
       "      <td>integrated circuit</td>\n",
       "      <td>EMITTER BALLASTING BY CONTACT AREA SEGMENTATIO...</td>\n",
       "      <td>It is well known that integrated circuits (ICs...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>20</th>\n",
       "      <td>application-specific integrated circuit</td>\n",
       "      <td>CUSTOMIZABLE H-TREE SYNTHESIS TOOL</td>\n",
       "      <td>Application-specific integrated circuits (ASIC...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>21</th>\n",
       "      <td>packaging</td>\n",
       "      <td>NaN</td>\n",
       "      <td>In the microelectronics industry packaging den...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>22</th>\n",
       "      <td>probe card</td>\n",
       "      <td>PROBER CLEANING BLOCK ASSEMBLY</td>\n",
       "      <td>In conventional semiconductor fabrication, waf...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>23</th>\n",
       "      <td>plasma etching</td>\n",
       "      <td>PLASMA ETCHING PROCESS</td>\n",
       "      <td>The invention relates to a plasma etching proc...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>24</th>\n",
       "      <td>wafer level package</td>\n",
       "      <td>SEMICONDUCTOR DEVICE HAVING CARBON NANOTUBE IN...</td>\n",
       "      <td>The wafer level package is a type of chip scal...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>25</th>\n",
       "      <td>via</td>\n",
       "      <td>CONDUCTIVE VIAS AND ASSOCIATED METHODS AND STR...</td>\n",
       "      <td>Traces located within different layers are typ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>26</th>\n",
       "      <td>ring</td>\n",
       "      <td>PREVENTIVE TREATMENT PROCESS FOR THE RING OF A...</td>\n",
       "      <td>The invention concerns a process for treatment...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>27</th>\n",
       "      <td>potting</td>\n",
       "      <td>NaN</td>\n",
       "      <td>Conventional approaches to packaging downhole ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>28</th>\n",
       "      <td>transient voltage suppressor</td>\n",
       "      <td>NaN</td>\n",
       "      <td>Transient voltage suppressors (TVS) are device...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>29</th>\n",
       "      <td>transistor</td>\n",
       "      <td>NaN</td>\n",
       "      <td>A transistor is an active device comprised of ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>30</th>\n",
       "      <td>body</td>\n",
       "      <td>NaN</td>\n",
       "      <td>Normally, all the active regions of the MOSFET...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>31</th>\n",
       "      <td>TVS</td>\n",
       "      <td>NaN</td>\n",
       "      <td>Overvoltage protection devices of the semicond...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>32</th>\n",
       "      <td>timing closure</td>\n",
       "      <td>TIMING CLOSURE METHODOLOGY</td>\n",
       "      <td>In designing electronic circuits and systems, ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>33</th>\n",
       "      <td>molecular beam epitaxy</td>\n",
       "      <td>THERMALLY ISOLATED CRYOPANEL FOR VACUUM DEPOSI...</td>\n",
       "      <td>Various techniques can be used to grow materia...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>34</th>\n",
       "      <td>MBE</td>\n",
       "      <td>METHODS OF MAKING OPTICAL WAVEGUIDE STRUCTURES...</td>\n",
       "      <td>Molecular Beam Epitaxy (MBE) can be used to gr...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>35</th>\n",
       "      <td>ground plane</td>\n",
       "      <td>THERMAL MANAGEMENT SYSTEMS AND METHODS</td>\n",
       "      <td>Solder may be used to secure the heat sink, su...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>36</th>\n",
       "      <td>depletion capacitance</td>\n",
       "      <td>METHOD FOR MAKING A BEAM JUNCTION, AND ELECTRO...</td>\n",
       "      <td>In a waveguide photodetector, the absorption l...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>37</th>\n",
       "      <td>electrical via</td>\n",
       "      <td>SYSTEM AND METHOD FOR FORMING THROUGH WAFER VI...</td>\n",
       "      <td>Electrical vias may allow electrical access to...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>38</th>\n",
       "      <td>under bump metallization</td>\n",
       "      <td>CHIPS HAVING REAR CONTACTS CONNECTED BY THROUG...</td>\n",
       "      <td>Structures and methods for fabrication of an u...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>39</th>\n",
       "      <td>sacrificial layer</td>\n",
       "      <td>UNIT CELL ARCHITECTURE FOR ELECTRICAL INTERCON...</td>\n",
       "      <td>After the microstructure has been defined in t...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>40</th>\n",
       "      <td>solder paste</td>\n",
       "      <td>METHOD OF SEMI-CONDUCTOR DEVICE ASSEMBLY INCLU...</td>\n",
       "      <td>In this method, a semiconductor chip has at le...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>41</th>\n",
       "      <td>reflow process</td>\n",
       "      <td>SEMICONDUCTOR ASSEMBLIES, STACKED SEMICONDUCTO...</td>\n",
       "      <td>The second dies can be attached to correspondi...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>42</th>\n",
       "      <td>interconnect carrier</td>\n",
       "      <td>HIGH DENSITY AREA ARRAY SOLDER MICROJOINING I...</td>\n",
       "      <td>A system for interconnecting a set of device c...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>43</th>\n",
       "      <td>planarization</td>\n",
       "      <td>MEMORY CELL THAT INCLUDES A CARBON NANO-TUBE R...</td>\n",
       "      <td>Although peaks on the surface of CNT material ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>44</th>\n",
       "      <td>thermocompression bonding</td>\n",
       "      <td>LED BONDING STRUCTURES AND METHODS OF FABRICA...</td>\n",
       "      <td>Thermocompression bonding is a technique where...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>45</th>\n",
       "      <td>area array package</td>\n",
       "      <td>METHOD FOR ACCOMMODATING SMALL MINIMUM DIE IN ...</td>\n",
       "      <td>Integrated circuit (IC) packages, particularly...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>46</th>\n",
       "      <td>through-silicon via</td>\n",
       "      <td>TECHNIQUES FOR INTERCONNECTING STACKED DIES US...</td>\n",
       "      <td>A through-silicon-via (TSV) is an electrical c...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>47</th>\n",
       "      <td>TSV</td>\n",
       "      <td>TECHNIQUES FOR INTERCONNECTING STACKED DIES US...</td>\n",
       "      <td>A TSV is typically a hole that extends through...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>48</th>\n",
       "      <td>system-on-chip</td>\n",
       "      <td>POWER MEASUREMENT TECHNIQUES OF A SYSTEM-ON-CH...</td>\n",
       "      <td>In a system-on-chip (SOC), the components of t...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>49</th>\n",
       "      <td>SOC</td>\n",
       "      <td>NaN</td>\n",
       "      <td>Systems-on-chip (SOCs) are integrated circuits...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>50</th>\n",
       "      <td>SoC</td>\n",
       "      <td>NaN</td>\n",
       "      <td>Certain embodiments of the invention relate to...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>51</th>\n",
       "      <td>surface mounted device</td>\n",
       "      <td>NaN</td>\n",
       "      <td>A more modern type of component technology is ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>52</th>\n",
       "      <td>industrial frequency</td>\n",
       "      <td>METHODS AND APPARATUS FOR PREPARING SPECIMENS ...</td>\n",
       "      <td>The preferred frequency to be used by RF power...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>53</th>\n",
       "      <td>back grinding tape</td>\n",
       "      <td>NaN</td>\n",
       "      <td>The present invention solves these needs and o...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>54</th>\n",
       "      <td>validity check</td>\n",
       "      <td>POLYGON REPRESENTATION IN AN INTEGRATED CIRCUI...</td>\n",
       "      <td>An approach for representing polygons in an in...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>55</th>\n",
       "      <td>design flow</td>\n",
       "      <td>HARDWARE DEFINITION METHOD</td>\n",
       "      <td>[D]uring the design flow, various IC component...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>56</th>\n",
       "      <td>laser assisted device alteration</td>\n",
       "      <td>NaN</td>\n",
       "      <td>Laser Assisted Device Alteration (LADA) is a t...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>57</th>\n",
       "      <td>LADA</td>\n",
       "      <td>PULSED LADA FOR ACQUISITION OF TIMING DIAGRAMS</td>\n",
       "      <td>This invention is in the field of laser-based ...</td>\n",
       "    </tr>\n",
       "  </tbody>\n",
       "</table>\n",
       "</div>"
      ],
      "text/plain": [
       "                                              TERM  \\\n",
       "0   fully-depleted silicon-on-insulator transistor   \n",
       "1                          semiconductor substrate   \n",
       "2                      transistor-transistor logic   \n",
       "3                                              TTL   \n",
       "4                                             land   \n",
       "5                                              pad   \n",
       "6                                         land pad   \n",
       "7                                programmable chip   \n",
       "8                                      LGA package   \n",
       "9                           pin grid array package   \n",
       "10                                     PGA package   \n",
       "11                                           wafer   \n",
       "12                                      IC package   \n",
       "13                         ball grid array package   \n",
       "14                         land grid array package   \n",
       "15                                    wafer prober   \n",
       "16                           wafer level packaging   \n",
       "17                                    test pattern   \n",
       "18                                     test vector   \n",
       "19                              integrated circuit   \n",
       "20         application-specific integrated circuit   \n",
       "21                                       packaging   \n",
       "22                                      probe card   \n",
       "23                                  plasma etching   \n",
       "24                             wafer level package   \n",
       "25                                             via   \n",
       "26                                            ring   \n",
       "27                                         potting   \n",
       "28                    transient voltage suppressor   \n",
       "29                                      transistor   \n",
       "30                                            body   \n",
       "31                                             TVS   \n",
       "32                                  timing closure   \n",
       "33                          molecular beam epitaxy   \n",
       "34                                             MBE   \n",
       "35                                    ground plane   \n",
       "36                           depletion capacitance   \n",
       "37                                  electrical via   \n",
       "38                        under bump metallization   \n",
       "39                               sacrificial layer   \n",
       "40                                    solder paste   \n",
       "41                                  reflow process   \n",
       "42                            interconnect carrier   \n",
       "43                                   planarization   \n",
       "44                       thermocompression bonding   \n",
       "45                              area array package   \n",
       "46                             through-silicon via   \n",
       "47                                             TSV   \n",
       "48                                  system-on-chip   \n",
       "49                                             SOC   \n",
       "50                                             SoC   \n",
       "51                          surface mounted device   \n",
       "52                            industrial frequency   \n",
       "53                              back grinding tape   \n",
       "54                                  validity check   \n",
       "55                                     design flow   \n",
       "56                laser assisted device alteration   \n",
       "57                                            LADA   \n",
       "\n",
       "                                                Title  \\\n",
       "0   BUILDING FULLY-DEPLETED AND PARTIALLY-DEPLETED...   \n",
       "1   SEMICONDUCTOR COMPONENT AND A METHOD FOR IDENT...   \n",
       "2                                  IDENTIFICATION TAG   \n",
       "3                                                 NaN   \n",
       "4   ELECTRONIC CONTROL DEVICE FOR A LIGHTING DEVIC...   \n",
       "5                                                 NaN   \n",
       "6                                                 NaN   \n",
       "7   LOOK UP TABLE STRUCTURE SUPPORTING QUATERNARY ...   \n",
       "8   MULTIPLE CHIP PACKAGE MODULE HAVING INVERTED P...   \n",
       "9    METHOD AND APPARATUS FOR INSPECTION OF PIN GR...   \n",
       "10  HIGH SPEED, HIGH DENSITY, LOW POWER DIE INTERC...   \n",
       "11                                                NaN   \n",
       "12  LEADLESS ARRAY PLASTIC PACKAGE WITH VARIOUS IC...   \n",
       "13  VARIED SOLDER MASK OPENING DIAMETERS WITHIN A ...   \n",
       "14      HIGH-POWER LAND GRID ARRAY PACKAGE AND SOCKET   \n",
       "15                     WAFER PROBER USING A TOUCH PAD   \n",
       "16  COMPOSITIONS AND PROCESSES FOR PHOTORESIST STR...   \n",
       "17  METHOD AND INSTALLATION FOR ANALYZING AN INTEG...   \n",
       "18    SCAN VECTOR SUPPORT FOR EVENT BASED TEST SYSTEM   \n",
       "19  EMITTER BALLASTING BY CONTACT AREA SEGMENTATIO...   \n",
       "20                 CUSTOMIZABLE H-TREE SYNTHESIS TOOL   \n",
       "21                                                NaN   \n",
       "22                     PROBER CLEANING BLOCK ASSEMBLY   \n",
       "23                             PLASMA ETCHING PROCESS   \n",
       "24  SEMICONDUCTOR DEVICE HAVING CARBON NANOTUBE IN...   \n",
       "25  CONDUCTIVE VIAS AND ASSOCIATED METHODS AND STR...   \n",
       "26  PREVENTIVE TREATMENT PROCESS FOR THE RING OF A...   \n",
       "27                                                NaN   \n",
       "28                                                NaN   \n",
       "29                                                NaN   \n",
       "30                                                NaN   \n",
       "31                                                NaN   \n",
       "32                         TIMING CLOSURE METHODOLOGY   \n",
       "33  THERMALLY ISOLATED CRYOPANEL FOR VACUUM DEPOSI...   \n",
       "34  METHODS OF MAKING OPTICAL WAVEGUIDE STRUCTURES...   \n",
       "35             THERMAL MANAGEMENT SYSTEMS AND METHODS   \n",
       "36  METHOD FOR MAKING A BEAM JUNCTION, AND ELECTRO...   \n",
       "37  SYSTEM AND METHOD FOR FORMING THROUGH WAFER VI...   \n",
       "38  CHIPS HAVING REAR CONTACTS CONNECTED BY THROUG...   \n",
       "39  UNIT CELL ARCHITECTURE FOR ELECTRICAL INTERCON...   \n",
       "40  METHOD OF SEMI-CONDUCTOR DEVICE ASSEMBLY INCLU...   \n",
       "41  SEMICONDUCTOR ASSEMBLIES, STACKED SEMICONDUCTO...   \n",
       "42   HIGH DENSITY AREA ARRAY SOLDER MICROJOINING I...   \n",
       "43  MEMORY CELL THAT INCLUDES A CARBON NANO-TUBE R...   \n",
       "44   LED BONDING STRUCTURES AND METHODS OF FABRICA...   \n",
       "45  METHOD FOR ACCOMMODATING SMALL MINIMUM DIE IN ...   \n",
       "46  TECHNIQUES FOR INTERCONNECTING STACKED DIES US...   \n",
       "47  TECHNIQUES FOR INTERCONNECTING STACKED DIES US...   \n",
       "48  POWER MEASUREMENT TECHNIQUES OF A SYSTEM-ON-CH...   \n",
       "49                                                NaN   \n",
       "50                                                NaN   \n",
       "51                                                NaN   \n",
       "52  METHODS AND APPARATUS FOR PREPARING SPECIMENS ...   \n",
       "53                                                NaN   \n",
       "54  POLYGON REPRESENTATION IN AN INTEGRATED CIRCUI...   \n",
       "55                         HARDWARE DEFINITION METHOD   \n",
       "56                                                NaN   \n",
       "57     PULSED LADA FOR ACQUISITION OF TIMING DIAGRAMS   \n",
       "\n",
       "                                                 Text  \n",
       "0   There are two types of conventional SOI device...  \n",
       "1   The present invention relates to a method for ...  \n",
       "2   TTL - Transistor-Transistor Logic is a class o...  \n",
       "3   TTL, i.e. transistor-transistor logic, is a co...  \n",
       "4   The term \"land\" as used herein refers to that ...  \n",
       "5   The term pad as used herein typically refers t...  \n",
       "6   [...] wherein the printed circuit board has a ...  \n",
       "7   Programmable chips such as programmable logic ...  \n",
       "8   [T]he additional package can be a BCC or a QFN...  \n",
       "9   In the manufacturing of integrated circuits, t...  \n",
       "10  Typical interface schemes for integrated circu...  \n",
       "11  When integrated circuits are initially fabrica...  \n",
       "12  Systems, methods, and technology for integrate...  \n",
       "13  The ball grid array package includes a carrier...  \n",
       "14  Of the grid array packages, the most simple an...  \n",
       "15  A chuck top used for a wafer prober for inspec...  \n",
       "16  The recent trend to portable and wireless comp...  \n",
       "17  Test patterns are designed to find particular ...  \n",
       "18  To facilitate better understanding of the pres...  \n",
       "19  It is well known that integrated circuits (ICs...  \n",
       "20  Application-specific integrated circuits (ASIC...  \n",
       "21  In the microelectronics industry packaging den...  \n",
       "22  In conventional semiconductor fabrication, waf...  \n",
       "23  The invention relates to a plasma etching proc...  \n",
       "24  The wafer level package is a type of chip scal...  \n",
       "25  Traces located within different layers are typ...  \n",
       "26  The invention concerns a process for treatment...  \n",
       "27  Conventional approaches to packaging downhole ...  \n",
       "28  Transient voltage suppressors (TVS) are device...  \n",
       "29  A transistor is an active device comprised of ...  \n",
       "30  Normally, all the active regions of the MOSFET...  \n",
       "31  Overvoltage protection devices of the semicond...  \n",
       "32  In designing electronic circuits and systems, ...  \n",
       "33  Various techniques can be used to grow materia...  \n",
       "34  Molecular Beam Epitaxy (MBE) can be used to gr...  \n",
       "35  Solder may be used to secure the heat sink, su...  \n",
       "36  In a waveguide photodetector, the absorption l...  \n",
       "37  Electrical vias may allow electrical access to...  \n",
       "38  Structures and methods for fabrication of an u...  \n",
       "39  After the microstructure has been defined in t...  \n",
       "40  In this method, a semiconductor chip has at le...  \n",
       "41  The second dies can be attached to correspondi...  \n",
       "42  A system for interconnecting a set of device c...  \n",
       "43  Although peaks on the surface of CNT material ...  \n",
       "44  Thermocompression bonding is a technique where...  \n",
       "45  Integrated circuit (IC) packages, particularly...  \n",
       "46  A through-silicon-via (TSV) is an electrical c...  \n",
       "47  A TSV is typically a hole that extends through...  \n",
       "48  In a system-on-chip (SOC), the components of t...  \n",
       "49  Systems-on-chip (SOCs) are integrated circuits...  \n",
       "50  Certain embodiments of the invention relate to...  \n",
       "51  A more modern type of component technology is ...  \n",
       "52  The preferred frequency to be used by RF power...  \n",
       "53  The present invention solves these needs and o...  \n",
       "54  An approach for representing polygons in an in...  \n",
       "55  [D]uring the design flow, various IC component...  \n",
       "56  Laser Assisted Device Alteration (LADA) is a t...  \n",
       "57  This invention is in the field of laser-based ...  "
      ]
     },
     "execution_count": 9,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "df"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 11,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "<class 'pandas.core.frame.DataFrame'>\n",
      "RangeIndex: 58 entries, 0 to 57\n",
      "Data columns (total 3 columns):\n",
      "TERM     58 non-null object\n",
      "Title    43 non-null object\n",
      "Text     58 non-null object\n",
      "dtypes: object(3)\n",
      "memory usage: 1.4+ KB\n"
     ]
    }
   ],
   "source": [
    "df.info()"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 14,
   "metadata": {},
   "outputs": [],
   "source": [
    "df = df[['TERM','Text']]"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 15,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/html": [
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       "  <thead>\n",
       "    <tr style=\"text-align: right;\">\n",
       "      <th></th>\n",
       "      <th>TERM</th>\n",
       "      <th>Text</th>\n",
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       "  </thead>\n",
       "  <tbody>\n",
       "    <tr>\n",
       "      <th>0</th>\n",
       "      <td>fully-depleted silicon-on-insulator transistor</td>\n",
       "      <td>There are two types of conventional SOI device...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>1</th>\n",
       "      <td>semiconductor substrate</td>\n",
       "      <td>The present invention relates to a method for ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>2</th>\n",
       "      <td>transistor-transistor logic</td>\n",
       "      <td>TTL - Transistor-Transistor Logic is a class o...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>3</th>\n",
       "      <td>TTL</td>\n",
       "      <td>TTL, i.e. transistor-transistor logic, is a co...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>4</th>\n",
       "      <td>land</td>\n",
       "      <td>The term \"land\" as used herein refers to that ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>5</th>\n",
       "      <td>pad</td>\n",
       "      <td>The term pad as used herein typically refers t...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>6</th>\n",
       "      <td>land pad</td>\n",
       "      <td>[...] wherein the printed circuit board has a ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>7</th>\n",
       "      <td>programmable chip</td>\n",
       "      <td>Programmable chips such as programmable logic ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>8</th>\n",
       "      <td>LGA package</td>\n",
       "      <td>[T]he additional package can be a BCC or a QFN...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>9</th>\n",
       "      <td>pin grid array package</td>\n",
       "      <td>In the manufacturing of integrated circuits, t...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>10</th>\n",
       "      <td>PGA package</td>\n",
       "      <td>Typical interface schemes for integrated circu...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>11</th>\n",
       "      <td>wafer</td>\n",
       "      <td>When integrated circuits are initially fabrica...</td>\n",
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       "    <tr>\n",
       "      <th>12</th>\n",
       "      <td>IC package</td>\n",
       "      <td>Systems, methods, and technology for integrate...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>13</th>\n",
       "      <td>ball grid array package</td>\n",
       "      <td>The ball grid array package includes a carrier...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>14</th>\n",
       "      <td>land grid array package</td>\n",
       "      <td>Of the grid array packages, the most simple an...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>15</th>\n",
       "      <td>wafer prober</td>\n",
       "      <td>A chuck top used for a wafer prober for inspec...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>16</th>\n",
       "      <td>wafer level packaging</td>\n",
       "      <td>The recent trend to portable and wireless comp...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>17</th>\n",
       "      <td>test pattern</td>\n",
       "      <td>Test patterns are designed to find particular ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>18</th>\n",
       "      <td>test vector</td>\n",
       "      <td>To facilitate better understanding of the pres...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>19</th>\n",
       "      <td>integrated circuit</td>\n",
       "      <td>It is well known that integrated circuits (ICs...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>20</th>\n",
       "      <td>application-specific integrated circuit</td>\n",
       "      <td>Application-specific integrated circuits (ASIC...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>21</th>\n",
       "      <td>packaging</td>\n",
       "      <td>In the microelectronics industry packaging den...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>22</th>\n",
       "      <td>probe card</td>\n",
       "      <td>In conventional semiconductor fabrication, waf...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>23</th>\n",
       "      <td>plasma etching</td>\n",
       "      <td>The invention relates to a plasma etching proc...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>24</th>\n",
       "      <td>wafer level package</td>\n",
       "      <td>The wafer level package is a type of chip scal...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>25</th>\n",
       "      <td>via</td>\n",
       "      <td>Traces located within different layers are typ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>26</th>\n",
       "      <td>ring</td>\n",
       "      <td>The invention concerns a process for treatment...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>27</th>\n",
       "      <td>potting</td>\n",
       "      <td>Conventional approaches to packaging downhole ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>28</th>\n",
       "      <td>transient voltage suppressor</td>\n",
       "      <td>Transient voltage suppressors (TVS) are device...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>29</th>\n",
       "      <td>transistor</td>\n",
       "      <td>A transistor is an active device comprised of ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>30</th>\n",
       "      <td>body</td>\n",
       "      <td>Normally, all the active regions of the MOSFET...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>31</th>\n",
       "      <td>TVS</td>\n",
       "      <td>Overvoltage protection devices of the semicond...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>32</th>\n",
       "      <td>timing closure</td>\n",
       "      <td>In designing electronic circuits and systems, ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>33</th>\n",
       "      <td>molecular beam epitaxy</td>\n",
       "      <td>Various techniques can be used to grow materia...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>34</th>\n",
       "      <td>MBE</td>\n",
       "      <td>Molecular Beam Epitaxy (MBE) can be used to gr...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>35</th>\n",
       "      <td>ground plane</td>\n",
       "      <td>Solder may be used to secure the heat sink, su...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>36</th>\n",
       "      <td>depletion capacitance</td>\n",
       "      <td>In a waveguide photodetector, the absorption l...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>37</th>\n",
       "      <td>electrical via</td>\n",
       "      <td>Electrical vias may allow electrical access to...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>38</th>\n",
       "      <td>under bump metallization</td>\n",
       "      <td>Structures and methods for fabrication of an u...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>39</th>\n",
       "      <td>sacrificial layer</td>\n",
       "      <td>After the microstructure has been defined in t...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>40</th>\n",
       "      <td>solder paste</td>\n",
       "      <td>In this method, a semiconductor chip has at le...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>41</th>\n",
       "      <td>reflow process</td>\n",
       "      <td>The second dies can be attached to correspondi...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>42</th>\n",
       "      <td>interconnect carrier</td>\n",
       "      <td>A system for interconnecting a set of device c...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>43</th>\n",
       "      <td>planarization</td>\n",
       "      <td>Although peaks on the surface of CNT material ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>44</th>\n",
       "      <td>thermocompression bonding</td>\n",
       "      <td>Thermocompression bonding is a technique where...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>45</th>\n",
       "      <td>area array package</td>\n",
       "      <td>Integrated circuit (IC) packages, particularly...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>46</th>\n",
       "      <td>through-silicon via</td>\n",
       "      <td>A through-silicon-via (TSV) is an electrical c...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>47</th>\n",
       "      <td>TSV</td>\n",
       "      <td>A TSV is typically a hole that extends through...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>48</th>\n",
       "      <td>system-on-chip</td>\n",
       "      <td>In a system-on-chip (SOC), the components of t...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>49</th>\n",
       "      <td>SOC</td>\n",
       "      <td>Systems-on-chip (SOCs) are integrated circuits...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>50</th>\n",
       "      <td>SoC</td>\n",
       "      <td>Certain embodiments of the invention relate to...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>51</th>\n",
       "      <td>surface mounted device</td>\n",
       "      <td>A more modern type of component technology is ...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>52</th>\n",
       "      <td>industrial frequency</td>\n",
       "      <td>The preferred frequency to be used by RF power...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>53</th>\n",
       "      <td>back grinding tape</td>\n",
       "      <td>The present invention solves these needs and o...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>54</th>\n",
       "      <td>validity check</td>\n",
       "      <td>An approach for representing polygons in an in...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>55</th>\n",
       "      <td>design flow</td>\n",
       "      <td>[D]uring the design flow, various IC component...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>56</th>\n",
       "      <td>laser assisted device alteration</td>\n",
       "      <td>Laser Assisted Device Alteration (LADA) is a t...</td>\n",
       "    </tr>\n",
       "    <tr>\n",
       "      <th>57</th>\n",
       "      <td>LADA</td>\n",
       "      <td>This invention is in the field of laser-based ...</td>\n",
       "    </tr>\n",
       "  </tbody>\n",
       "</table>\n",
       "</div>"
      ],
      "text/plain": [
       "                                              TERM  \\\n",
       "0   fully-depleted silicon-on-insulator transistor   \n",
       "1                          semiconductor substrate   \n",
       "2                      transistor-transistor logic   \n",
       "3                                              TTL   \n",
       "4                                             land   \n",
       "5                                              pad   \n",
       "6                                         land pad   \n",
       "7                                programmable chip   \n",
       "8                                      LGA package   \n",
       "9                           pin grid array package   \n",
       "10                                     PGA package   \n",
       "11                                           wafer   \n",
       "12                                      IC package   \n",
       "13                         ball grid array package   \n",
       "14                         land grid array package   \n",
       "15                                    wafer prober   \n",
       "16                           wafer level packaging   \n",
       "17                                    test pattern   \n",
       "18                                     test vector   \n",
       "19                              integrated circuit   \n",
       "20         application-specific integrated circuit   \n",
       "21                                       packaging   \n",
       "22                                      probe card   \n",
       "23                                  plasma etching   \n",
       "24                             wafer level package   \n",
       "25                                             via   \n",
       "26                                            ring   \n",
       "27                                         potting   \n",
       "28                    transient voltage suppressor   \n",
       "29                                      transistor   \n",
       "30                                            body   \n",
       "31                                             TVS   \n",
       "32                                  timing closure   \n",
       "33                          molecular beam epitaxy   \n",
       "34                                             MBE   \n",
       "35                                    ground plane   \n",
       "36                           depletion capacitance   \n",
       "37                                  electrical via   \n",
       "38                        under bump metallization   \n",
       "39                               sacrificial layer   \n",
       "40                                    solder paste   \n",
       "41                                  reflow process   \n",
       "42                            interconnect carrier   \n",
       "43                                   planarization   \n",
       "44                       thermocompression bonding   \n",
       "45                              area array package   \n",
       "46                             through-silicon via   \n",
       "47                                             TSV   \n",
       "48                                  system-on-chip   \n",
       "49                                             SOC   \n",
       "50                                             SoC   \n",
       "51                          surface mounted device   \n",
       "52                            industrial frequency   \n",
       "53                              back grinding tape   \n",
       "54                                  validity check   \n",
       "55                                     design flow   \n",
       "56                laser assisted device alteration   \n",
       "57                                            LADA   \n",
       "\n",
       "                                                 Text  \n",
       "0   There are two types of conventional SOI device...  \n",
       "1   The present invention relates to a method for ...  \n",
       "2   TTL - Transistor-Transistor Logic is a class o...  \n",
       "3   TTL, i.e. transistor-transistor logic, is a co...  \n",
       "4   The term \"land\" as used herein refers to that ...  \n",
       "5   The term pad as used herein typically refers t...  \n",
       "6   [...] wherein the printed circuit board has a ...  \n",
       "7   Programmable chips such as programmable logic ...  \n",
       "8   [T]he additional package can be a BCC or a QFN...  \n",
       "9   In the manufacturing of integrated circuits, t...  \n",
       "10  Typical interface schemes for integrated circu...  \n",
       "11  When integrated circuits are initially fabrica...  \n",
       "12  Systems, methods, and technology for integrate...  \n",
       "13  The ball grid array package includes a carrier...  \n",
       "14  Of the grid array packages, the most simple an...  \n",
       "15  A chuck top used for a wafer prober for inspec...  \n",
       "16  The recent trend to portable and wireless comp...  \n",
       "17  Test patterns are designed to find particular ...  \n",
       "18  To facilitate better understanding of the pres...  \n",
       "19  It is well known that integrated circuits (ICs...  \n",
       "20  Application-specific integrated circuits (ASIC...  \n",
       "21  In the microelectronics industry packaging den...  \n",
       "22  In conventional semiconductor fabrication, waf...  \n",
       "23  The invention relates to a plasma etching proc...  \n",
       "24  The wafer level package is a type of chip scal...  \n",
       "25  Traces located within different layers are typ...  \n",
       "26  The invention concerns a process for treatment...  \n",
       "27  Conventional approaches to packaging downhole ...  \n",
       "28  Transient voltage suppressors (TVS) are device...  \n",
       "29  A transistor is an active device comprised of ...  \n",
       "30  Normally, all the active regions of the MOSFET...  \n",
       "31  Overvoltage protection devices of the semicond...  \n",
       "32  In designing electronic circuits and systems, ...  \n",
       "33  Various techniques can be used to grow materia...  \n",
       "34  Molecular Beam Epitaxy (MBE) can be used to gr...  \n",
       "35  Solder may be used to secure the heat sink, su...  \n",
       "36  In a waveguide photodetector, the absorption l...  \n",
       "37  Electrical vias may allow electrical access to...  \n",
       "38  Structures and methods for fabrication of an u...  \n",
       "39  After the microstructure has been defined in t...  \n",
       "40  In this method, a semiconductor chip has at le...  \n",
       "41  The second dies can be attached to correspondi...  \n",
       "42  A system for interconnecting a set of device c...  \n",
       "43  Although peaks on the surface of CNT material ...  \n",
       "44  Thermocompression bonding is a technique where...  \n",
       "45  Integrated circuit (IC) packages, particularly...  \n",
       "46  A through-silicon-via (TSV) is an electrical c...  \n",
       "47  A TSV is typically a hole that extends through...  \n",
       "48  In a system-on-chip (SOC), the components of t...  \n",
       "49  Systems-on-chip (SOCs) are integrated circuits...  \n",
       "50  Certain embodiments of the invention relate to...  \n",
       "51  A more modern type of component technology is ...  \n",
       "52  The preferred frequency to be used by RF power...  \n",
       "53  The present invention solves these needs and o...  \n",
       "54  An approach for representing polygons in an in...  \n",
       "55  [D]uring the design flow, various IC component...  \n",
       "56  Laser Assisted Device Alteration (LADA) is a t...  \n",
       "57  This invention is in the field of laser-based ...  "
      ]
     },
     "execution_count": 15,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "df"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 17,
   "metadata": {},
   "outputs": [],
   "source": [
    "remove_words = ['data','dataset','datasets','content','context','acknowledgement','inspiration']"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 18,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "['two', 'type', 'conventional', 'soi', 'device', 'partially', 'depleted', 'soi', 'pd', 'soi', 'device', 'fully', 'depleted', 'fd', 'soi', 'device', 'conventional', 'pd', 'soi', 'transistor', 'device', 'one', 'body', 'thickness', 'thicker', 'maximum', 'width', 'depletion', 'layer', 'silicon', 'device', 'operation', 'conventional', 'fd', 'soi', 'transistor', 'device', 'one', 'body', 'thickness', 'thinner', 'maximum', 'width', 'depletion', 'layer', 'silicon', 'device', 'operation', 'consequently', 'operation', 'pd', 'soi', 'device', 'experience', 'partial', 'depletion', 'silicon', 'body', 'fd', 'soi', 'experience', 'full', 'depletion', 'thereof', 'conventional', 'pd', 'soi', 'fd', 'soi', 'device', 'planar', 'device', 'thus', 'formed', 'plane', 'wafer', 'particularly', 'fully', 'depleted', 'silicon', 'insulator', 'fd', 'soi', 'transistor', 'can', 'formed', 'region', 'comprising', 'thinned', 'silicon', 'partially', 'depleted', 'silicon', 'insulator', 'pd', 'soi', 'transistor', 'can', 'formed', 'region', 'comprising', 'thinned', 'silicon', 'method', 'disclosed', 'forming', 'fully', 'depleted', 'silicon', 'insulator', 'fd', 'soi', 'transistor', 'partially', 'depleted', 'silicon', 'insulator', 'fd', 'soi', 'transistor', 'semiconductor', 'substrate', 'part', 'single', 'integrated', 'circuit', 'fabrication', 'process', 'flowd', 'semiconductor', 'device', 'structure', 'fabricated', 'according', 'method', 'also', 'disclosed']\n"
     ]
    }
   ],
   "source": [
    "texts = []\n",
    "\n",
    "# loop through document list\n",
    "for i in df['Text'].iteritems():\n",
    "    # clean and tokenize document string\n",
    "    raw = str(i[1]).lower()\n",
    "    tokens = tokenizer.tokenize(raw)\n",
    "\n",
    "    # remove stop words from tokens\n",
    "    stopped_tokens = [raw for raw in tokens if not raw in en_stop]\n",
    "    \n",
    "    # remove stop words from tokens\n",
    "    stopped_tokens_new = [raw for raw in stopped_tokens if not raw in remove_words]\n",
    "    \n",
    "    # lemmatize tokens\n",
    "    lemma_tokens = [lemmatizer.lemmatize(tokens) for tokens in stopped_tokens_new]\n",
    "    \n",
    "    # remove word containing only single char\n",
    "    new_lemma_tokens = [raw for raw in lemma_tokens if not len(raw) == 1]\n",
    "    \n",
    "    # add tokens to list\n",
    "    texts.append(new_lemma_tokens)\n",
    "\n",
    "# sample data\n",
    "print(texts[0])"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 19,
   "metadata": {},
   "outputs": [],
   "source": [
    "# turn our tokenized documents into a id <-> term dictionary\n",
    "dictionary = corpora.Dictionary(texts)\n",
    "# convert tokenized documents into a document-term matrix\n",
    "corpus = [dictionary.doc2bow(text) for text in texts]"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 20,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "[([(0.047284763, 'event'),\n",
      "   (0.027446462, 'test'),\n",
      "   (0.024965487, 'scan'),\n",
      "   (0.024964519, 'system'),\n",
      "   (0.022486756, 'device')],\n",
      "  -0.5950642552145478),\n",
      " ([(0.02933868, 'circuit'),\n",
      "   (0.023776362, 'semiconductor'),\n",
      "   (0.022431819, 'device'),\n",
      "   (0.021656085, 'integrated'),\n",
      "   (0.019793727, 'substrate')],\n",
      "  -0.9703188334150219),\n",
      " ([(0.032431033, 'array'),\n",
      "   (0.028866246, 'grid'),\n",
      "   (0.028865092, 'pin'),\n",
      "   (0.024323463, 'inspection'),\n",
      "   (0.018268256, 'lead')],\n",
      "  -1.1330603907818608),\n",
      " ([(0.041290045, 'semiconductor'),\n",
      "   (0.02342808, 'substrate'),\n",
      "   (0.023425862, 'deposition'),\n",
      "   (0.022021085, 'first'),\n",
      "   (0.018257786, 'region')],\n",
      "  -1.506255482459129),\n",
      " ([(0.031219512, 'ball'),\n",
      "   (0.025067993, 'solder'),\n",
      "   (0.025064245, 'substrate'),\n",
      "   (0.025056232, 'carrier'),\n",
      "   (0.018901426, 'opening')],\n",
      "  -1.552562603771682),\n",
      " ([(0.076266624, 'chip'),\n",
      "   (0.06472856, 'system'),\n",
      "   (0.02485637, 'component'),\n",
      "   (0.020215265, 'measurement'),\n",
      "   (0.020212654, 'soc')],\n",
      "  -1.7852674870423797),\n",
      " ([(0.041482482, 'polygon'),\n",
      "   (0.03596178, 'first'),\n",
      "   (0.031818226, 'package'),\n",
      "   (0.024924979, 'second'),\n",
      "   (0.023547255, 'wire')],\n",
      "  -3.152070595439292),\n",
      " ([(0.028302282, 'layer'),\n",
      "   (0.02345606, 'soi'),\n",
      "   (0.021789737, 'silicon'),\n",
      "   (0.018455425, 'device'),\n",
      "   (0.017540151, 'least')],\n",
      "  -3.2820383360693817),\n",
      " ([(0.056742758, 'circuit'),\n",
      "   (0.02468465, 'integrated'),\n",
      "   (0.02468217, 'die'),\n",
      "   (0.022525512, 'cell'),\n",
      "   (0.013708954, 'component')],\n",
      "  -4.00476599367337),\n",
      " ([(0.031448025, 'laser'),\n",
      "   (0.022745559, 'wafer'),\n",
      "   (0.01910762, 'device'),\n",
      "   (0.017521223, 'photon'),\n",
      "   (0.012303292, 'transistor')],\n",
      "  -5.7448357338147895),\n",
      " ([(0.023102729, 'circuit'),\n",
      "   (0.021116866, 'ic'),\n",
      "   (0.015487621, 'junction'),\n",
      "   (0.013661888, 'printed'),\n",
      "   (0.013648737, 'board')],\n",
      "  -6.022806498145927),\n",
      " ([(0.029080367, 'substrate'),\n",
      "   (0.021359738, 'layer'),\n",
      "   (0.019429643, 'material'),\n",
      "   (0.017499473, 'die'),\n",
      "   (0.01749722, 'temperature')],\n",
      "  -6.395591286144651),\n",
      " ([(0.038160253, 'mean'),\n",
      "   (0.028298521, 'material'),\n",
      "   (0.02185636, 'plate'),\n",
      "   (0.021855867, 'cleaning'),\n",
      "   (0.020045497, 'transistor')],\n",
      "  -6.442259065342347),\n",
      " ([(0.000705559, 'cell'),\n",
      "   (0.0007054613, 'array'),\n",
      "   (0.00070543593, 'first'),\n",
      "   (0.0007053584, 'package'),\n",
      "   (0.0007051104, 'polygon')],\n",
      "  -8.743638235031133),\n",
      " ([(0.033476405, 'specimen'),\n",
      "   (0.025173375, 'frequency'),\n",
      "   (0.016878534, 'electronic'),\n",
      "   (0.016877877, 'potting'),\n",
      "   (0.012727719, 'module')],\n",
      "  -14.431384038998592)]\n"
     ]
    }
   ],
   "source": [
    "ldamodel = gensim.models.ldamodel.LdaModel(corpus, num_topics=15, id2word = dictionary, passes=20)\n",
    "import pprint\n",
    "pprint.pprint(ldamodel.top_topics(corpus,topn=5))"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 21,
   "metadata": {},
   "outputs": [
    {
     "name": "stderr",
     "output_type": "stream",
     "text": [
      "C:\\Users\\Pawan\\Anaconda3\\lib\\site-packages\\pyLDAvis\\_prepare.py:257: FutureWarning: Sorting because non-concatenation axis is not aligned. A future version\n",
      "of pandas will change to not sort by default.\n",
      "\n",
      "To accept the future behavior, pass 'sort=True'.\n",
      "\n",
      "To retain the current behavior and silence the warning, pass sort=False\n",
      "\n",
      "  return pd.concat([default_term_info] + list(topic_dfs))\n"
     ]
    },
    {
     "data": {
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       "\n",
       "<link rel=\"stylesheet\" type=\"text/css\" href=\"https://cdn.rawgit.com/bmabey/pyLDAvis/files/ldavis.v1.0.0.css\">\n",
       "\n",
       "\n",
       "<div id=\"ldavis_el1642425728007899849156090113\"></div>\n",
       "<script type=\"text/javascript\">\n",
       "\n",
       "var ldavis_el1642425728007899849156090113_data = {\"mdsDat\": {\"x\": [-0.11334318340292425, -0.16059697775309806, 0.00106000153325818, -0.020312862237642244, -0.013032190287150068, -0.10705125617168225, 0.16980648502295964, 0.11134712061380375, -0.06328301838606457, 0.11366985510407082, -0.06929341370664059, 0.046512637477465056, 0.0876689638486143, -0.028583760802035462, 0.04543159914706542], \"y\": [0.14710330700490387, 0.07569545708109102, 0.026386055679101413, 0.1482617142262794, 0.029985679767923386, -0.1151391551376896, -0.00038017707363220536, -0.02335801802657002, -0.14282655080391338, 0.03899686312272719, -0.1547842639245955, -0.01974798116037756, -0.0008796449095833183, 0.0031664455435971776, -0.012479731389262049], \"topics\": [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15], \"cluster\": [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1], \"Freq\": [12.091547012329102, 10.806781768798828, 9.938104629516602, 9.705358505249023, 9.514984130859375, 8.660734176635742, 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       "\n",
       "function LDAvis_load_lib(url, callback){\n",
       "  var s = document.createElement('script');\n",
       "  s.src = url;\n",
       "  s.async = true;\n",
       "  s.onreadystatechange = s.onload = callback;\n",
       "  s.onerror = function(){console.warn(\"failed to load library \" + url);};\n",
       "  document.getElementsByTagName(\"head\")[0].appendChild(s);\n",
       "}\n",
       "\n",
       "if(typeof(LDAvis) !== \"undefined\"){\n",
       "   // already loaded: just create the visualization\n",
       "   !function(LDAvis){\n",
       "       new LDAvis(\"#\" + \"ldavis_el1642425728007899849156090113\", ldavis_el1642425728007899849156090113_data);\n",
       "   }(LDAvis);\n",
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       "   // require.js is available: use it to load d3/LDAvis\n",
       "   require.config({paths: {d3: \"https://cdnjs.cloudflare.com/ajax/libs/d3/3.5.5/d3.min\"}});\n",
       "   require([\"d3\"], function(d3){\n",
       "      window.d3 = d3;\n",
       "      LDAvis_load_lib(\"https://cdn.rawgit.com/bmabey/pyLDAvis/files/ldavis.v1.0.0.js\", function(){\n",
       "        new LDAvis(\"#\" + \"ldavis_el1642425728007899849156090113\", ldavis_el1642425728007899849156090113_data);\n",
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       "    // require.js not available: dynamically load d3 & LDAvis\n",
       "    LDAvis_load_lib(\"https://cdnjs.cloudflare.com/ajax/libs/d3/3.5.5/d3.min.js\", function(){\n",
       "         LDAvis_load_lib(\"https://cdn.rawgit.com/bmabey/pyLDAvis/files/ldavis.v1.0.0.js\", function(){\n",
       "                 new LDAvis(\"#\" + \"ldavis_el1642425728007899849156090113\", ldavis_el1642425728007899849156090113_data);\n",
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      ],
      "text/plain": [
       "PreparedData(topic_coordinates=              x         y  topics  cluster       Freq\n",
       "topic                                                \n",
       "3     -0.113343  0.147103       1        1  12.091547\n",
       "7     -0.160597  0.075695       2        1  10.806782\n",
       "9      0.001060  0.026386       3        1   9.938105\n",
       "11    -0.020313  0.148262       4        1   9.705359\n",
       "1     -0.013032  0.029986       5        1   9.514984\n",
       "12    -0.107051 -0.115139       6        1   8.660734\n",
       "5      0.169806 -0.000380       7        1   8.216057\n",
       "2      0.111347 -0.023358       8        1   7.835020\n",
       "4     -0.063283 -0.142827       9        1   7.231523\n",
       "10     0.113670  0.038997      10        1   5.290989\n",
       "13    -0.069293 -0.154784      11        1   5.039349\n",
       "14     0.046513 -0.019748      12        1   2.537659\n",
       "6      0.087669 -0.000880      13        1   1.866489\n",
       "8     -0.028584  0.003166      14        1   1.199936\n",
       "0      0.045432 -0.012480      15        1   0.065468, topic_info=     Category       Freq           Term      Total  loglift  logprob\n",
       "term                                                                \n",
       "214   Default  27.000000           chip  27.000000  30.0000  30.0000\n",
       "419   Default  27.000000         system  27.000000  29.0000  29.0000\n",
       "1339  Default  26.000000        polygon  26.000000  28.0000  28.0000\n",
       "42    Default  56.000000      substrate  56.000000  27.0000  27.0000\n",
       "676   Default  16.000000          event  16.000000  26.0000  26.0000\n",
       "131   Default  45.000000          first  45.000000  25.0000  25.0000\n",
       "37    Default  45.000000  semiconductor  45.000000  24.0000  24.0000\n",
       "209   Default  43.000000          array  43.000000  23.0000  23.0000\n",
       "4     Default  93.000000        circuit  93.000000  22.0000  22.0000\n",
       "269   Default  30.000000           grid  30.000000  21.0000  21.0000\n",
       "88    Default  23.000000           mean  23.000000  20.0000  20.0000\n",
       "279   Default  40.000000        package  40.000000  19.0000  19.0000\n",
       "23    Default  42.000000          layer  42.000000  18.0000  18.0000\n",
       "1383  Default  15.000000          laser  15.000000  17.0000  17.0000\n",
       "187   Default  19.000000         solder  19.000000  16.0000  16.0000\n",
       "57    Default  30.000000      component  30.000000  15.0000  15.0000\n",
       "567   Default  30.000000           cell  30.000000  14.0000  14.0000\n",
       "87    Default  35.000000       material  35.000000  13.0000  13.0000\n",
       "373   Default  21.000000           test  21.000000  12.0000  12.0000\n",
       "351   Default  21.000000            pin  21.000000  11.0000  11.0000\n",
       "332   Default  14.000000     inspection  14.000000  10.0000  10.0000\n",
       "293   Default  21.000000           wire  21.000000   9.0000   9.0000\n",
       "149   Default  32.000000         second  32.000000   8.0000   8.0000\n",
       "40    Default  12.000000            soi  12.000000   7.0000   7.0000\n",
       "52    Default  35.000000          wafer  35.000000   6.0000   6.0000\n",
       "380   Default   8.000000           ball   8.000000   5.0000   5.0000\n",
       "545   Default  18.000000          plate  18.000000   4.0000   4.0000\n",
       "265   Default  42.000000            die  42.000000   3.0000   3.0000\n",
       "49    Default  26.000000     transistor  26.000000   2.0000   2.0000\n",
       "164   Default  16.000000     conductive  16.000000   1.0000   1.0000\n",
       "...       ...        ...            ...        ...      ...      ...\n",
       "567   Topic15   0.002688           cell  30.056026  -1.9907  -7.2565\n",
       "209   Topic15   0.002688          array  43.290047  -2.3557  -7.2567\n",
       "131   Topic15   0.002687          first  45.821712  -2.4126  -7.2567\n",
       "279   Topic15   0.002687        package  40.466488  -2.2884  -7.2568\n",
       "1339  Topic15   0.002686        polygon  26.746601  -1.8747  -7.2572\n",
       "52    Topic15   0.002685          wafer  35.854984  -2.1681  -7.2575\n",
       "1357  Topic15   0.002684         custom   6.703073  -0.4917  -7.2580\n",
       "460   Topic15   0.002683             ic  26.057575  -1.8496  -7.2582\n",
       "149   Topic15   0.002682         second  32.269604  -2.0639  -7.2586\n",
       "293   Topic15   0.002682           wire  21.338947  -1.6505  -7.2588\n",
       "10    Topic15   0.002681         device  66.279472  -2.7842  -7.2592\n",
       "23    Topic15   0.002681          layer  42.922394  -2.3498  -7.2593\n",
       "197   Topic15   0.002680            pad  24.424747  -1.7862  -7.2595\n",
       "4     Topic15   0.002679        circuit  93.809769  -3.1322  -7.2599\n",
       "214   Topic15   0.002679           chip  27.804798  -1.9163  -7.2600\n",
       "196   Topic15   0.002678            may  25.314697  -1.8226  -7.2601\n",
       "774   Topic15   0.002678            set   8.083109  -0.6811  -7.2602\n",
       "577   Topic15   0.002678        density   3.948530   0.0352  -7.2603\n",
       "101   Topic15   0.002678       provided  17.326811  -1.4437  -7.2604\n",
       "472   Topic15   0.002677        carrier   7.204685  -0.5663  -7.2605\n",
       "301   Topic15   0.002677          block   4.993006  -0.1998  -7.2606\n",
       "1367  Topic15   0.002677       standard   4.137921  -0.0120  -7.2607\n",
       "772   Topic15   0.002677        segment  13.780190  -1.2150  -7.2607\n",
       "993   Topic15   0.002677        library   4.160035  -0.0174  -7.2607\n",
       "1359  Topic15   0.002676       facility   3.282795   0.2193  -7.2609\n",
       "1190  Topic15   0.002676        barrier   3.008334   0.3064  -7.2611\n",
       "919   Topic15   0.002676        various   6.582172  -0.4766  -7.2611\n",
       "575   Topic15   0.002675        created   4.994413  -0.2007  -7.2612\n",
       "14    Topic15   0.002675    fabrication   8.101995  -0.6845  -7.2612\n",
       "167   Topic15   0.002675       disposed   8.226983  -0.6998  -7.2613\n",
       "\n",
       "[823 rows x 6 columns], token_table=      Topic      Freq          Term\n",
       "term                               \n",
       "1370      7  0.839415       ability\n",
       "1072      5  0.825862      absorber\n",
       "1073      5  0.730594    absorption\n",
       "1073      7  0.243531    absorption\n",
       "666       3  0.347581        access\n",
       "666      10  0.347581        access\n",
       "666      13  0.347581        access\n",
       "921       3  0.635530  accidentally\n",
       "1251     13  0.795166      accurate\n",
       "704       8  0.843999        across\n",
       "207       4  0.854937         adder\n",
       "1252      4  0.473338      addition\n",
       "1252     13  0.473338      addition\n",
       "1189     10  0.890957      adhesion\n",
       "955      11  0.677757      adjacent\n",
       "795       8  0.844006        adjust\n",
       "796       8  0.858714    adjustable\n",
       "797       1  0.245524     adjusting\n",
       "797       8  0.736572     adjusting\n",
       "1167      4  0.732555         alloy\n",
       "1167      9  0.244185         alloy\n",
       "1         1  0.284491          also\n",
       "1         2  0.056898          also\n",
       "1         3  0.113796          also\n",
       "1         4  0.113796          also\n",
       "1         5  0.113796          also\n",
       "1         6  0.056898          also\n",
       "1         7  0.056898          also\n",
       "1         8  0.170695          also\n",
       "1         9  0.056898          also\n",
       "...     ...       ...           ...\n",
       "52        1  0.055780         wafer\n",
       "52        3  0.278901         wafer\n",
       "52        4  0.055780         wafer\n",
       "52        6  0.027890         wafer\n",
       "52        7  0.306791         wafer\n",
       "52        8  0.083670         wafer\n",
       "52        9  0.195231         wafer\n",
       "52       10  0.027890         wafer\n",
       "483      14  0.497588       warpage\n",
       "1398      7  0.933094          wave\n",
       "1057      5  0.729144     waveguide\n",
       "1057      6  0.243048     waveguide\n",
       "1399      7  0.741181    wavelength\n",
       "521       2  0.243474           way\n",
       "521       6  0.730422           way\n",
       "623       1  0.170371        weight\n",
       "623       4  0.681486        weight\n",
       "205       1  0.404568       wherein\n",
       "205       5  0.101142       wherein\n",
       "205       6  0.303426       wherein\n",
       "205       7  0.101142       wherein\n",
       "205      12  0.101142       wherein\n",
       "293       1  0.234313          wire\n",
       "293       2  0.702940          wire\n",
       "293      12  0.046863          wire\n",
       "624       5  0.727227           wlp\n",
       "841       9  0.969975       working\n",
       "561       7  0.839412            xy\n",
       "1264     13  0.795173         yield\n",
       "1351      2  0.815359          zone\n",
       "\n",
       "[1329 rows x 3 columns], R=30, lambda_step=0.01, plot_opts={'xlab': 'PC1', 'ylab': 'PC2'}, topic_order=[4, 8, 10, 12, 2, 13, 6, 3, 5, 11, 14, 15, 7, 9, 1])"
      ]
     },
     "execution_count": 21,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "pyLDAvis.enable_notebook()\n",
    "pyLDAvis.gensim.prepare(ldamodel, corpus, dictionary)"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": null,
   "metadata": {},
   "outputs": [],
   "source": []
  }
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