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# Simulator Monad | ||
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A pure simulator monad built on top of the `ST` monad which supports: | ||
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* synchronous and asynchronous exceptions; including: throwing, catching and | ||
masking synchronous and asynchronous exceptions; | ||
* concurrency (using simulated threads), with interfaces shaped by the | ||
`base` and `async` libraries; | ||
* software transactional memory (`STM`); | ||
* simulated time; | ||
* timeouts; | ||
* dynamically typed traces and event log tracing; | ||
* lifting any `ST` computations; | ||
* deadlock detection. | ||
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`io-sim` is a drop-in replacement for the `IO` monad. It was designed to write easily | ||
testable Haskell networking code. Using | ||
[io-sim-classes](https://hackage.haskell.org/package/io-sim-classes) library | ||
one can write code that can run in both: real `IO` and the `SimM` monad. One | ||
of the design goals was to keep the api as close as possible to `base`, | ||
`exceptions`, `async` and `stm` packages. | ||
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As a design choice `IOSim` does not support `MVar`s by default, but they can be | ||
simulated using `stm` interface. | ||
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`io-sim` supports both `io-sim-classes` class hierarchy and `base` | ||
/ `exceptions` class hierarchies (they diverge in some detail). | ||
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The package contains thorough tests, including tests of `STM` against the original | ||
specification (as described in [Composable Memory | ||
Transactions](https://research.microsoft.com/en-us/um/people/simonpj/papers/stm/stm.pdf) | ||
and its `GHC` implementation. This can be seen in both ways: as a check that | ||
our implementation matches the specification and the `GHC` implementation, but also | ||
the other way around: that `GHC`s `STM` implementation meets the specification. |