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Validate JTAG support on FPGA target #153

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jbush001 opened this issue Mar 4, 2018 · 0 comments

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test

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jbush001 commented Mar 4, 2018 •

edited

To fully verify #62, it should be run on FPGA. Need the following.

Expose via one of the GPIO headers on the board
Find some (ideally open) hardware JTAG unit (or perhaps synthesize an integrated JTAG host in FPGA with a bridge that connects to some other external interface, but using a separate hardware JTAG is preferable to validate interoperability).

Optionally:

Implement support for this target in OpenOCD.
Integrate this support into lldb.

jbush001 added the test label

jbush001 mentioned this issue

xv6 operating system hangs when running on FPGA #155

Open

jbush001 changed the title ~~Implement JTAG support on FPGA target~~ Validate JTAG support on FPGA target

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