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sun8i-r16-x6100.dts
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sun8i-r16-x6100.dts
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/dts-v1/;
/ {
interrupt-parent = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x1>;
model = "XIEGU Tech X6100 HF+6m Transceiver";
compatible = "xiegu,x6100", "allwinner,sun8i-r16";
chosen {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
stdout-path = "serial0:115200n8";
framebuffer-lcd0 {
compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <0x2 0x26 0x2 0x28 0x2 0x57 0x2 0x55 0x2 0x54 0x2 0x62>;
status = "disabled";
};
};
display-engine {
allwinner,pipelines = <0x3>;
status = "okay";
compatible = "allwinner,sun8i-a33-display-engine";
};
timer {
compatible = "arm,armv7-timer";
interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
clock-frequency = <0x16e3600>;
arm,cpu-registers-not-fw-configured;
};
cpus {
enable-method = "allwinner,sun8i-a23";
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0x0>;
clocks = <0x2 0x12>;
clock-names = "cpu";
operating-points-v2 = <0x4>;
#cooling-cells = <0x2>;
phandle = <0x3c>;
};
cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0x1>;
clocks = <0x2 0x12>;
clock-names = "cpu";
operating-points-v2 = <0x4>;
#cooling-cells = <0x2>;
phandle = <0x3d>;
};
cpu@2 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0x2>;
clocks = <0x2 0x12>;
clock-names = "cpu";
operating-points-v2 = <0x4>;
#cooling-cells = <0x2>;
phandle = <0x3e>;
};
cpu@3 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0x3>;
clocks = <0x2 0x12>;
clock-names = "cpu";
operating-points-v2 = <0x4>;
#cooling-cells = <0x2>;
phandle = <0x3f>;
};
};
reserved-memory {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
cma@4a000000 {
compatible = "shared-dma-pool";
size = <0x8000000>;
alloc-ranges = <0x4a000000 0x8000000>;
reusable;
linux,cma-default;
phandle = <0x22>;
};
};
clocks {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
osc24M_clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x16e3600>;
clock-accuracy = <0xc350>;
clock-output-names = "osc24M";
phandle = <0x19>;
};
ext_osc32k_clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x8000>;
clock-accuracy = <0xc350>;
clock-output-names = "ext-osc32k";
phandle = <0x29>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
system-control@1c00000 {
compatible = "allwinner,sun8i-a23-system-control";
reg = <0x1c00000 0x30>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
sram@1d00000 {
compatible = "mmio-sram";
reg = <0x1d00000 0x80000>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges = <0x0 0x1d00000 0x80000>;
sram-section@0 {
compatible = "allwinner,sun8i-a23-sram-c1", "allwinner,sun4i-a10-sram-c1";
reg = <0x0 0x80000>;
phandle = <0x33>;
};
};
};
dma-controller@1c02000 {
compatible = "allwinner,sun8i-a23-dma";
reg = <0x1c02000 0x1000>;
interrupts = <0x0 0x32 0x4>;
clocks = <0x2 0x19>;
resets = <0x2 0x6>;
#dma-cells = <0x1>;
phandle = <0x5>;
};
nand-controller@1c03000 {
compatible = "allwinner,sun8i-a23-nand-controller";
reg = <0x1c03000 0x1000>;
interrupts = <0x0 0x46 0x4>;
clocks = <0x2 0x1d 0x2 0x3b>;
clock-names = "ahb", "mod";
resets = <0x2 0xa>;
reset-names = "ahb";
dmas = <0x5 0x5>;
dma-names = "rxtx";
pinctrl-names = "default";
pinctrl-0 = <0x6 0x7 0x8>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
lcd-controller@1c0c000 {
reg = <0x1c0c000 0x1000>;
interrupts = <0x0 0x56 0x4>;
dmas = <0x5 0xc>;
clocks = <0x2 0x26 0x2 0x57 0x2 0xd>;
clock-names = "ahb", "tcon-ch0", "lvds-alt";
clock-output-names = "tcon-pixel-clock";
#clock-cells = <0x0>;
resets = <0x2 0x13 0x2 0x1c>;
reset-names = "lcd", "lvds";
status = "okay";
compatible = "allwinner,sun8i-a33-tcon";
pinctrl-names = "default";
pinctrl-0 = <0x9>;
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port@0 {
reg = <0x0>;
endpoint {
remote-endpoint = <0xa>;
phandle = <0x28>;
};
};
port@1 {
reg = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
endpoint@1 {
reg = <0x1>;
remote-endpoint = <0xb>;
phandle = <0x35>;
};
endpoint@0 {
reg = <0x0>;
remote-endpoint = <0xc>;
phandle = <0x47>;
};
};
};
};
mmc@1c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x1c0f000 0x1000>;
clocks = <0x2 0x1a 0x2 0x3c 0x2 0x3e 0x2 0x3d>;
clock-names = "ahb", "mmc", "output", "sample";
resets = <0x2 0x7>;
reset-names = "ahb";
interrupts = <0x0 0x3c 0x4>;
pinctrl-names = "default";
pinctrl-0 = <0xd>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
vmmc-supply = <0xe>;
cd-gpios = <0xf 0x4 0x3 0x1>;
bus-width = <0x4>;
};
mmc@1c10000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x1c10000 0x1000>;
clocks = <0x2 0x1b 0x2 0x3f 0x2 0x41 0x2 0x40>;
clock-names = "ahb", "mmc", "output", "sample";
resets = <0x2 0x8>;
reset-names = "ahb";
interrupts = <0x0 0x3d 0x4>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
pinctrl-names = "default";
pinctrl-0 = <0x10>;
vmmc-supply = <0x11>;
mmc-pwrseq = <0x12>;
bus-width = <0x4>;
non-removable;
};
mmc@1c11000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x1c11000 0x1000>;
clocks = <0x2 0x1c 0x2 0x42 0x2 0x44 0x2 0x43>;
clock-names = "ahb", "mmc", "output", "sample";
resets = <0x2 0x9>;
reset-names = "ahb";
interrupts = <0x0 0x3e 0x4>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
pinctrl-names = "default";
pinctrl-0 = <0x13>;
vmmc-supply = <0xe>;
bus-width = <0x8>;
non-removable;
cap-mmc-hw-reset;
};
usb@1c19000 {
reg = <0x1c19000 0x400>;
clocks = <0x2 0x22>;
resets = <0x2 0xf>;
interrupts = <0x0 0x47 0x4>;
interrupt-names = "mc";
phys = <0x14 0x0>;
phy-names = "usb";
extcon = <0x14 0x0>;
dr_mode = "host";
status = "okay";
compatible = "allwinner,sun8i-a33-musb";
};
phy@1c19400 {
clocks = <0x2 0x4a 0x2 0x4b>;
clock-names = "usb0_phy", "usb1_phy";
resets = <0x2 0x0 0x2 0x1>;
reset-names = "usb0_reset", "usb1_reset";
status = "okay";
#phy-cells = <0x1>;
compatible = "allwinner,sun8i-a33-usb-phy";
reg = <0x1c19400 0x14 0x1c1a800 0x4>;
reg-names = "phy_ctrl", "pmu1";
pinctrl-names = "default";
pinctrl-0 = <0x15>;
usb0_id_det-gpios = <0xf 0x7 0x8 0x0>;
usb0_vbus_power-supply = <0x16>;
usb0_vbus-supply = <0x17>;
usb1_vbus-supply = <0x18>;
phandle = <0x14>;
};
usb@1c1a000 {
compatible = "allwinner,sun8i-a23-ehci", "generic-ehci";
reg = <0x1c1a000 0x100>;
interrupts = <0x0 0x48 0x4>;
clocks = <0x2 0x23>;
resets = <0x2 0x10>;
phys = <0x14 0x1>;
phy-names = "usb";
status = "okay";
};
usb@1c1a400 {
compatible = "allwinner,sun8i-a23-ohci", "generic-ohci";
reg = <0x1c1a400 0x100>;
interrupts = <0x0 0x49 0x4>;
clocks = <0x2 0x24 0x2 0x4e>;
resets = <0x2 0x11>;
phys = <0x14 0x1>;
phy-names = "usb";
status = "okay";
};
clock@1c20000 {
reg = <0x1c20000 0x400>;
clocks = <0x19 0x1a 0x0>;
clock-names = "hosc", "losc";
#clock-cells = <0x1>;
#reset-cells = <0x1>;
compatible = "allwinner,sun8i-a33-ccu";
phandle = <0x2>;
};
pinctrl@1c20800 {
reg = <0x1c20800 0x400>;
clocks = <0x2 0x30 0x19 0x1a 0x0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <0x3>;
#gpio-cells = <0x3>;
compatible = "allwinner,sun8i-a33-pinctrl";
interrupts = <0x0 0xf 0x4 0x0 0x11 0x4>;
vcc-pb-supply = <0x1b>;
vcc-pc-supply = <0x1b>;
vcc-pd-supply = <0x1b>;
vcc-pe-supply = <0x1b>;
vcc-pf-supply = <0x1b>;
vcc-pg-supply = <0x1b>;
vcc-ph-supply = <0x1b>;
vcc-pl-supply = <0x1b>;
phandle = <0xf>;
i2c0-pins {
pins = "PH2", "PH3";
function = "i2c0";
phandle = <0x1f>;
};
i2c1-pins {
pins = "PH4", "PH5";
function = "i2c1";
phandle = <0x20>;
};
i2c2-pins {
pins = "PE12", "PE13";
function = "i2c2";
phandle = <0x21>;
};
lcd-rgb666-pins {
pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD20", "PD21", "PD22", "PD23", "PD24", "PD25", "PD26", "PD27";
function = "lcd0";
phandle = <0x9>;
};
mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
function = "mmc0";
drive-strength = <0x1e>;
bias-pull-up;
phandle = <0xd>;
};
mmc1-pg-pins {
pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
function = "mmc1";
drive-strength = <0x1e>;
bias-pull-up;
phandle = <0x10>;
};
mmc2-8bit-pins {
pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
function = "mmc2";
drive-strength = <0x28>;
bias-pull-up;
phandle = <0x13>;
};
nand-pins {
pins = "PC0", "PC1", "PC2", "PC5", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15";
function = "nand0";
phandle = <0x6>;
};
nand-cs0-pin {
pins = "PC4";
function = "nand0";
bias-pull-up;
phandle = <0x7>;
};
nand-cs1-pin {
pins = "PC3";
function = "nand0";
bias-pull-up;
};
nand-rb0-pin {
pins = "PC6";
function = "nand0";
bias-pull-up;
phandle = <0x8>;
};
nand-rb1-pin {
pins = "PC7";
function = "nand0";
bias-pull-up;
};
pwm0-pin {
pins = "PH0";
function = "pwm0";
phandle = <0x1c>;
};
uart0-pf-pins {
pins = "PF2", "PF4";
function = "uart0";
};
uart1-pg-pins {
pins = "PG6", "PG7";
function = "uart1";
};
uart1-cts-rts-pg-pins {
pins = "PG8", "PG9";
function = "uart1";
};
uart0-pb-pins {
pins = "PB0", "PB1";
function = "uart0";
phandle = <0x1d>;
};
usb0_id_detect_pin@0 {
pins = "PH8";
function = "gpio_in";
bias-pull-up;
phandle = <0x15>;
};
usb0_vbus_detect_pin@0 {
pins = "PH9";
function = "gpio_in";
bias-pull-down;
};
uart3@0 {
pins = "PH6", "PH7";
function = "uart3";
phandle = <0x1e>;
};
rotary-1-pins {
pins = "PB2", "PB3";
function = "gpio_in";
bias-pull-up;
phandle = <0x48>;
};
rotary-2-pins {
pins = "PB4", "PB6";
function = "gpio_in";
bias-pull-up;
phandle = <0x49>;
};
rotary-3-pins {
pins = "PB5", "PB7";
function = "gpio_in";
bias-pull-up;
phandle = <0x4a>;
};
};
timer@1c20c00 {
compatible = "allwinner,sun8i-a23-timer";
reg = <0x1c20c00 0xa0>;
interrupts = <0x0 0x12 0x4 0x0 0x13 0x4>;
clocks = <0x19>;
};
watchdog@1c20ca0 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x1c20ca0 0x20>;
interrupts = <0x0 0x19 0x4>;
clocks = <0x19>;
};
pwm@1c21400 {
compatible = "allwinner,sun7i-a20-pwm";
reg = <0x1c21400 0xc>;
clocks = <0x19>;
#pwm-cells = <0x3>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x1c>;
phandle = <0x44>;
};
lradc@1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x1c22800 0x100>;
interrupts = <0x0 0x1e 0x4>;
status = "disabled";
};
serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28000 0x400>;
interrupts = <0x0 0x0 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x2 0x36>;
resets = <0x2 0x23>;
dmas = <0x5 0x6 0x5 0x6>;
dma-names = "rx", "tx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x1d>;
};
serial@1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28400 0x400>;
interrupts = <0x0 0x1 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x2 0x37>;
resets = <0x2 0x24>;
dmas = <0x5 0x7 0x5 0x7>;
dma-names = "rx", "tx";
status = "disabled";
};
serial@1c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28800 0x400>;
interrupts = <0x0 0x2 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x2 0x38>;
resets = <0x2 0x25>;
dmas = <0x5 0x8 0x5 0x8>;
dma-names = "rx", "tx";
status = "disabled";
};
serial@1c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28c00 0x400>;
interrupts = <0x0 0x3 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x2 0x39>;
resets = <0x2 0x26>;
dmas = <0x5 0x9 0x5 0x9>;
dma-names = "rx", "tx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x1e>;
};
serial@1c29000 {
compatible = "snps,dw-apb-uart";
reg = <0x1c29000 0x400>;
interrupts = <0x0 0x4 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x2 0x3a>;
resets = <0x2 0x27>;
dmas = <0x5 0xa 0x5 0xa>;
dma-names = "rx", "tx";
status = "disabled";
};
i2c@1c2ac00 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x1c2ac00 0x400>;
interrupts = <0x0 0x6 0x4>;
clocks = <0x2 0x33>;
resets = <0x2 0x20>;
pinctrl-names = "default";
pinctrl-0 = <0x1f>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
i2c@1c2b000 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x1c2b000 0x400>;
interrupts = <0x0 0x7 0x4>;
clocks = <0x2 0x34>;
resets = <0x2 0x21>;
pinctrl-names = "default";
pinctrl-0 = <0x20>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
PCF8563@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
interrupt-parent = <0xf>;
interrupts = <0x6 0xd 0x2>;
interrupt-names = "irq";
irq-gpios = <0xf 0x6 0xd 0x0>;
};
};
i2c@1c2b400 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x1c2b400 0x400>;
interrupts = <0x0 0x8 0x4>;
clocks = <0x2 0x35>;
resets = <0x2 0x22>;
pinctrl-names = "default";
pinctrl-0 = <0x21>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
gpu@1c40000 {
compatible = "allwinner,sun8i-a23-mali", "allwinner,sun7i-a20-mali", "arm,mali-400";
reg = <0x1c40000 0x10000>;
interrupts = <0x0 0x61 0x4 0x0 0x62 0x4 0x0 0x63 0x4 0x0 0x64 0x4 0x0 0x66 0x4 0x0 0x67 0x4 0x0 0x65 0x4>;
interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", "ppmmu1", "pmu";
clocks = <0x2 0x2a 0x2 0x63>;
clock-names = "bus", "core";
resets = <0x2 0x17>;
#cooling-cells = <0x2>;
assigned-clocks = <0x2 0x63>;
assigned-clock-rates = <0x16e36000>;
memory-region = <0x22>;
operating-points-v2 = <0x23>;
phandle = <0x42>;
};
interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000 0x2000 0x1c86000 0x2000>;
interrupt-controller;
#interrupt-cells = <0x3>;
interrupts = <0x1 0x9 0xf04>;
phandle = <0x1>;
};
display-frontend@1e00000 {
reg = <0x1e00000 0x20000>;
interrupts = <0x0 0x5d 0x4>;
clocks = <0x2 0x29 0x2 0x56 0x2 0x53>;
clock-names = "ahb", "mod", "ram";
resets = <0x2 0x16>;
compatible = "allwinner,sun8i-a33-display-frontend";
phandle = <0x3>;
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port@1 {
reg = <0x1>;
endpoint {
remote-endpoint = <0x24>;
phandle = <0x25>;
};
};
};
};
display-backend@1e60000 {
reg = <0x1e60000 0x10000 0x1e80000 0x1000>;
interrupts = <0x0 0x5f 0x4>;
clocks = <0x2 0x28 0x2 0x55 0x2 0x54 0x2 0x2e>;
clock-names = "ahb", "mod", "ram", "sat";
resets = <0x2 0x15 0x2 0x1b>;
compatible = "allwinner,sun8i-a33-display-backend";
reg-names = "be", "sat";
reset-names = "be", "sat";
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port@0 {
reg = <0x0>;
endpoint {
remote-endpoint = <0x25>;
phandle = <0x24>;
};
};
port@1 {
reg = <0x1>;
endpoint {
remote-endpoint = <0x26>;
phandle = <0x27>;
};
};
};
};
drc@1e70000 {
reg = <0x1e70000 0x10000>;
interrupts = <0x0 0x5b 0x4>;
clocks = <0x2 0x2d 0x2 0x62 0x2 0x52>;
clock-names = "ahb", "mod", "ram";
resets = <0x2 0x1a>;
compatible = "allwinner,sun8i-a33-drc";
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port@0 {
reg = <0x0>;
endpoint {
remote-endpoint = <0x27>;
phandle = <0x26>;
};
};
port@1 {
reg = <0x1>;
endpoint {
remote-endpoint = <0x28>;
phandle = <0xa>;
};
};
};
};
rtc@1f00000 {
compatible = "allwinner,sun8i-a23-rtc";
reg = <0x1f00000 0x400>;
interrupts = <0x0 0x28 0x4 0x0 0x29 0x4>;
clock-output-names = "osc32k", "osc32k-out";
clocks = <0x29>;
#clock-cells = <0x1>;
phandle = <0x1a>;
};
interrupt-controller@1f00c00 {
compatible = "allwinner,sun6i-a31-r-intc";
interrupt-controller;
#interrupt-cells = <0x2>;
reg = <0x1f00c00 0x400>;
interrupts = <0x0 0x20 0x4>;
phandle = <0x32>;
};
prcm@1f01400 {
compatible = "allwinner,sun8i-a23-prcm";
reg = <0x1f01400 0x200>;
ar100_clk {
compatible = "fixed-factor-clock";
#clock-cells = <0x0>;
clock-div = <0x1>;
clock-mult = <0x1>;
clocks = <0x19>;
clock-output-names = "ar100";
phandle = <0x2a>;
};
ahb0_clk {
compatible = "fixed-factor-clock";
#clock-cells = <0x0>;
clock-div = <0x1>;
clock-mult = <0x1>;
clocks = <0x2a>;
clock-output-names = "ahb0";
phandle = <0x2b>;
};
apb0_clk {
compatible = "allwinner,sun8i-a23-apb0-clk";
#clock-cells = <0x0>;
clocks = <0x2b>;
clock-output-names = "apb0";
phandle = <0x2c>;
};
apb0_gates_clk {
compatible = "allwinner,sun8i-a23-apb0-gates-clk";
#clock-cells = <0x1>;
clocks = <0x2c>;
clock-output-names = "apb0_pio", "apb0_timer", "apb0_rsb", "apb0_uart", "apb0_i2c";
phandle = <0x2d>;
};
apb0_rst {
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <0x1>;
phandle = <0x2e>;
};
codec-analog {
compatible = "allwinner,sun8i-a23-codec-analog";
phandle = <0x38>;
};
};
cpucfg@1f01c00 {
compatible = "allwinner,sun8i-a23-cpuconfig";
reg = <0x1f01c00 0x300>;
};
serial@1f02800 {
compatible = "snps,dw-apb-uart";
reg = <0x1f02800 0x400>;
interrupts = <0x0 0x26 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x2d 0x4>;
resets = <0x2e 0x4>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x2f>;
};
i2c@1f02400 {
compatible = "allwinner,sun8i-a23-i2c", "allwinner,sun6i-a31-i2c";
reg = <0x1f02400 0x400>;
interrupts = <0x0 0x2c 0x4>;
pinctrl-names = "default";
pinctrl-0 = <0x30>;
clocks = <0x2d 0x6>;
resets = <0x2e 0x6>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
pinctrl@1f02c00 {
compatible = "allwinner,sun8i-a23-r-pinctrl";
reg = <0x1f02c00 0x400>;
interrupts = <0x0 0x2d 0x4>;
clocks = <0x2d 0x0 0x19 0x1a 0x0>;
clock-names = "apb", "hosc", "losc";
resets = <0x2e 0x0>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <0x3>;
#gpio-cells = <0x3>;
phandle = <0x45>;
r-i2c-pins {
pins = "PL0", "PL1";
function = "s_i2c";
bias-pull-up;
phandle = <0x30>;
};
r-rsb-pins {
pins = "PL0", "PL1";
function = "s_rsb";
drive-strength = <0x14>;
bias-pull-up;
phandle = <0x31>;
};
r-uart-pins {
pins = "PL2", "PL3";
function = "s_uart";
phandle = <0x2f>;
};
};
rsb@1f03400 {
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x1f03400 0x400>;
interrupts = <0x0 0x27 0x4>;
clocks = <0x2d 0x3>;
clock-frequency = <0x2dc6c0>;
resets = <0x2e 0x3>;
pinctrl-names = "default";
pinctrl-0 = <0x31>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
pmic@3a3 {
compatible = "x-powers,axp223";
reg = <0x3a3>;
interrupt-parent = <0x32>;
interrupts = <0x0 0x8>;
eldoin-supply = <0xe>;
interrupt-controller;
#interrupt-cells = <0x1>;
ac-power-supply {
compatible = "x-powers,axp221-ac-power-supply";
status = "okay";
};
adc {
compatible = "x-powers,axp221-adc";
#io-channel-cells = <0x1>;
};
battery-power-supply {
compatible = "x-powers,axp221-battery-power-supply";
status = "okay";
};
regulators {
x-powers,dcdc-freq = <0xbb8>;
dcdc1 {
regulator-name = "vcc-3v0";
regulator-always-on;
regulator-min-microvolt = <0x2dc6c0>;
regulator-max-microvolt = <0x2dc6c0>;
phandle = <0xe>;
};
dcdc2 {
regulator-name = "vdd-sys";
regulator-always-on;
regulator-min-microvolt = <0xdbba0>;
regulator-max-microvolt = <0x155cc0>;
};
dcdc3 {
regulator-name = "vdd-cpu";
regulator-always-on;
regulator-min-microvolt = <0xdbba0>;
regulator-max-microvolt = <0x155cc0>;
};
dcdc4 {
regulator-name = "dcdc4";
};
dcdc5 {
regulator-name = "vcc-dram";
regulator-always-on;
regulator-min-microvolt = <0x16e360>;
regulator-max-microvolt = <0x16e360>;
};
dc1sw {
regulator-name = "vcc-lcd";
regulator-always-on;
};
dc5ldo {
regulator-name = "vdd-cpus";
regulator-always-on;
regulator-min-microvolt = <0xdbba0>;