Memory components (latches and registers). Note that all registers use the Rising Edge Detector from the Misc category.
NOTE: The Rising Edge Detector is one way of achieving the desired functionality, which is based on the fact that each gate has a (propagation) delay. Theoretically it should work in real world circuits, but I'm not really sure. A better approach is to use 2 or 3 latches to detect the rising edge of the clock.
- SR Latch (Active Low)
- SR Latch (Active High)
- Gated SR Latch
- D Latch
- JK FlipFlop with Async Preset/Clear
- 1-bit Register
- 2-bit Register
- 4-bit Register
- 8-bit Register
- 1-bit Register w/ Async reset
- 2-bit Register w/ Async reset
- 4-bit Register w/ Async reset
- 8-bit Register w/ Async reset
- 16x4-bit Register File w/ Async reset
