-
Notifications
You must be signed in to change notification settings - Fork 20
/
functions_exceptions_and_nans.go
121 lines (100 loc) · 3.04 KB
/
functions_exceptions_and_nans.go
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
// This file is part of Gopher2600.
//
// Gopher2600 is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// Gopher2600 is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with Gopher2600. If not, see <https://www.gnu.org/licenses/>.
package fpu
type FPException int
const (
FPExc_InvalidOp FPException = iota
FPExc_DivideByZero
FPExc_Overflow
FPExc_Underflow
FPExc_Inexact
FPExc_InputDenorm
)
func (fpu *FPU) FPProcessException(exception FPException, fpscr FPSCR) {
// page A2-49 of "ARMv7-M"
// we're taking advantage of the fact that the enable bits and the
// "cumulative" bits are 8 bits apart in the FPU status register
if fpscr.value>>uint32(exception+8) == 0x01 {
panic("IMPLEMENTATION DEFINED floating-point trap handling")
} else {
fpu.Status.value |= (0x01 << exception)
}
}
func (fpu *FPU) FPProcessNaN(typ FPType, N int, op uint64, fpscr FPSCR) uint64 {
// page A2-49 of "ARMv7-M"
var topfrac int
switch N {
case 32:
topfrac = 22
case 64:
topfrac = 51
default:
panic("unsupported number of bits in FPProcessNaN()")
}
result := op
if typ == FPType_SNaN {
result = result | (0x01 << topfrac)
fpu.FPProcessException(FPExc_InvalidOp, fpscr)
}
if fpscr.DN() {
result = fpu.FPDefaultNaN(N)
}
return result
}
func (fpu *FPU) FPProcessNaNs(typ1 FPType, typ2 FPType, N int, op1 uint64, op2 uint64, fpscr FPSCR) (bool, uint64) {
// page A2-49 to A2-50 of "ARMv7-M"
var done bool
var result uint64
if typ1 == FPType_SNaN {
done = true
result = fpu.FPProcessNaN(typ1, N, op1, fpscr)
} else if typ2 == FPType_SNaN {
done = true
result = fpu.FPProcessNaN(typ2, N, op2, fpscr)
} else if typ1 == FPType_QNaN {
done = true
result = fpu.FPProcessNaN(typ1, N, op1, fpscr)
} else if typ2 == FPType_QNaN {
done = true
result = fpu.FPProcessNaN(typ2, N, op2, fpscr)
}
return done, result
}
func (fpu *FPU) FPProcessNaNs3(typ1 FPType, typ2 FPType, typ3 FPType, N int,
op1 uint64, op2 uint64, op3 uint64, fpscr FPSCR) (bool, uint64) {
// page A2-50 of "ARMv7-M"
var done bool
var result uint64
if typ1 == FPType_SNaN {
done = true
result = fpu.FPProcessNaN(typ1, N, op1, fpscr)
} else if typ2 == FPType_SNaN {
done = true
result = fpu.FPProcessNaN(typ2, N, op2, fpscr)
} else if typ3 == FPType_SNaN {
done = true
result = fpu.FPProcessNaN(typ3, N, op3, fpscr)
} else if typ1 == FPType_QNaN {
done = true
result = fpu.FPProcessNaN(typ1, N, op1, fpscr)
} else if typ2 == FPType_QNaN {
done = true
result = fpu.FPProcessNaN(typ2, N, op2, fpscr)
} else if typ3 == FPType_QNaN {
done = true
result = fpu.FPProcessNaN(typ3, N, op3, fpscr)
}
return done, result
}