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Improve software UART for slow rates #107

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jfpoilpret opened this issue Sep 18, 2022 · 0 comments
Open

Improve software UART for slow rates #107

jfpoilpret opened this issue Sep 18, 2022 · 0 comments
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jfpoilpret commented Sep 18, 2022

Current software UART heavily uses ISR for receiving data.
Due to high bit rates, it has been decided that one ISR call should handle a complete byte, which is fast enough for high rates (e.g. 115'200 bps), but is terrible with slow rates (e.g. 9'600 bps) where a long time can be spent within an ISR, so that other interrupts will not get processed in time.
Typically, at 9'600 bps, each byte received will "block" the ISR during about 1ms.

Dealing with slow rates would be better with a Timer used as a clock for each bit reception.
This would not work at higher rates (the cost of calling an ISR for each bit is too heavy and we may miss some bits in this case).

Hence we propose to create a new kind of SW UART (and keep the existing one).

@jfpoilpret jfpoilpret self-assigned this Sep 18, 2022
@jfpoilpret jfpoilpret added this to the 1.10 milestone Sep 19, 2022
@jfpoilpret jfpoilpret modified the milestones: 1.10, 1.11 Dec 13, 2022
@jfpoilpret jfpoilpret modified the milestones: 1.11, 1.12 May 16, 2023
@jfpoilpret jfpoilpret modified the milestones: 1.12, 1.13 Aug 2, 2023
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