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exchange_wrapper.go
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exchange_wrapper.go
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package cuda
/*
THIS FILE IS AUTO-GENERATED BY CUDA2GO.
EDITING IS FUTILE.
*/
import (
"github.com/mumax/3/cuda/cu"
"github.com/mumax/3/timer"
"sync"
"unsafe"
)
// CUDA handle for addexchange kernel
var addexchange_code cu.Function
// Stores the arguments for addexchange kernel invocation
type addexchange_args_t struct {
arg_Bx unsafe.Pointer
arg_By unsafe.Pointer
arg_Bz unsafe.Pointer
arg_mx unsafe.Pointer
arg_my unsafe.Pointer
arg_mz unsafe.Pointer
arg_aLUT2d unsafe.Pointer
arg_regions unsafe.Pointer
arg_wx float32
arg_wy float32
arg_wz float32
arg_Nx int
arg_Ny int
arg_Nz int
arg_PBC byte
argptr [15]unsafe.Pointer
sync.Mutex
}
// Stores the arguments for addexchange kernel invocation
var addexchange_args addexchange_args_t
func init() {
// CUDA driver kernel call wants pointers to arguments, set them up once.
addexchange_args.argptr[0] = unsafe.Pointer(&addexchange_args.arg_Bx)
addexchange_args.argptr[1] = unsafe.Pointer(&addexchange_args.arg_By)
addexchange_args.argptr[2] = unsafe.Pointer(&addexchange_args.arg_Bz)
addexchange_args.argptr[3] = unsafe.Pointer(&addexchange_args.arg_mx)
addexchange_args.argptr[4] = unsafe.Pointer(&addexchange_args.arg_my)
addexchange_args.argptr[5] = unsafe.Pointer(&addexchange_args.arg_mz)
addexchange_args.argptr[6] = unsafe.Pointer(&addexchange_args.arg_aLUT2d)
addexchange_args.argptr[7] = unsafe.Pointer(&addexchange_args.arg_regions)
addexchange_args.argptr[8] = unsafe.Pointer(&addexchange_args.arg_wx)
addexchange_args.argptr[9] = unsafe.Pointer(&addexchange_args.arg_wy)
addexchange_args.argptr[10] = unsafe.Pointer(&addexchange_args.arg_wz)
addexchange_args.argptr[11] = unsafe.Pointer(&addexchange_args.arg_Nx)
addexchange_args.argptr[12] = unsafe.Pointer(&addexchange_args.arg_Ny)
addexchange_args.argptr[13] = unsafe.Pointer(&addexchange_args.arg_Nz)
addexchange_args.argptr[14] = unsafe.Pointer(&addexchange_args.arg_PBC)
}
// Wrapper for addexchange CUDA kernel, asynchronous.
func k_addexchange_async(Bx unsafe.Pointer, By unsafe.Pointer, Bz unsafe.Pointer, mx unsafe.Pointer, my unsafe.Pointer, mz unsafe.Pointer, aLUT2d unsafe.Pointer, regions unsafe.Pointer, wx float32, wy float32, wz float32, Nx int, Ny int, Nz int, PBC byte, cfg *config) {
if Synchronous { // debug
Sync()
timer.Start("addexchange")
}
addexchange_args.Lock()
defer addexchange_args.Unlock()
if addexchange_code == 0 {
addexchange_code = fatbinLoad(addexchange_map, "addexchange")
}
addexchange_args.arg_Bx = Bx
addexchange_args.arg_By = By
addexchange_args.arg_Bz = Bz
addexchange_args.arg_mx = mx
addexchange_args.arg_my = my
addexchange_args.arg_mz = mz
addexchange_args.arg_aLUT2d = aLUT2d
addexchange_args.arg_regions = regions
addexchange_args.arg_wx = wx
addexchange_args.arg_wy = wy
addexchange_args.arg_wz = wz
addexchange_args.arg_Nx = Nx
addexchange_args.arg_Ny = Ny
addexchange_args.arg_Nz = Nz
addexchange_args.arg_PBC = PBC
args := addexchange_args.argptr[:]
cu.LaunchKernel(addexchange_code, cfg.Grid.X, cfg.Grid.Y, cfg.Grid.Z, cfg.Block.X, cfg.Block.Y, cfg.Block.Z, 0, stream0, args)
if Synchronous { // debug
Sync()
timer.Stop("addexchange")
}
}
// maps compute capability on PTX code for addexchange kernel.
var addexchange_map = map[int]string{0: "",
20: addexchange_ptx_20,
30: addexchange_ptx_30,
35: addexchange_ptx_35,
50: addexchange_ptx_50,
52: addexchange_ptx_52,
53: addexchange_ptx_53}
// addexchange PTX code for various compute capabilities.
const (
addexchange_ptx_20 = `
.version 3.2
.target sm_20
.address_size 64
.visible .entry addexchange(
.param .u64 addexchange_param_0,
.param .u64 addexchange_param_1,
.param .u64 addexchange_param_2,
.param .u64 addexchange_param_3,
.param .u64 addexchange_param_4,
.param .u64 addexchange_param_5,
.param .u64 addexchange_param_6,
.param .u64 addexchange_param_7,
.param .f32 addexchange_param_8,
.param .f32 addexchange_param_9,
.param .f32 addexchange_param_10,
.param .u32 addexchange_param_11,
.param .u32 addexchange_param_12,
.param .u32 addexchange_param_13,
.param .u8 addexchange_param_14
)
{
.reg .pred %p<26>;
.reg .s16 %rs<21>;
.reg .s32 %r<275>;
.reg .f32 %f<121>;
.reg .s64 %rd<111>;
ld.param.u64 %rd4, [addexchange_param_0];
ld.param.u64 %rd5, [addexchange_param_1];
ld.param.u64 %rd6, [addexchange_param_2];
ld.param.u64 %rd7, [addexchange_param_3];
ld.param.u64 %rd8, [addexchange_param_4];
ld.param.u64 %rd9, [addexchange_param_5];
ld.param.u64 %rd10, [addexchange_param_6];
ld.param.u64 %rd11, [addexchange_param_7];
ld.param.f32 %f46, [addexchange_param_8];
ld.param.f32 %f47, [addexchange_param_9];
ld.param.f32 %f48, [addexchange_param_10];
ld.param.u32 %r52, [addexchange_param_11];
ld.param.u32 %r53, [addexchange_param_12];
ld.param.u32 %r54, [addexchange_param_13];
cvta.to.global.u64 %rd1, %rd9;
cvta.to.global.u64 %rd2, %rd8;
cvta.to.global.u64 %rd3, %rd7;
.loc 1 13 1
mov.u32 %r55, %ntid.x;
mov.u32 %r56, %ctaid.x;
mov.u32 %r57, %tid.x;
mad.lo.s32 %r1, %r55, %r56, %r57;
.loc 1 14 1
mov.u32 %r58, %ntid.y;
mov.u32 %r59, %ctaid.y;
mov.u32 %r60, %tid.y;
mad.lo.s32 %r2, %r58, %r59, %r60;
.loc 1 15 1
mov.u32 %r61, %ntid.z;
mov.u32 %r62, %ctaid.z;
mov.u32 %r63, %tid.z;
mad.lo.s32 %r3, %r61, %r62, %r63;
.loc 1 17 1
setp.ge.s32 %p1, %r2, %r53;
setp.ge.s32 %p2, %r1, %r52;
or.pred %p3, %p2, %p1;
.loc 1 17 1
setp.ge.s32 %p4, %r3, %r54;
or.pred %p5, %p3, %p4;
ld.param.u8 %rs4, [addexchange_param_14];
.loc 1 17 1
@%p5 bra BB0_41;
.loc 1 22 1
mad.lo.s32 %r64, %r3, %r53, %r2;
mad.lo.s32 %r65, %r64, %r52, %r1;
mul.wide.s32 %rd12, %r65, 4;
add.s64 %rd13, %rd3, %rd12;
add.s64 %rd14, %rd2, %rd12;
add.s64 %rd15, %rd1, %rd12;
.loc 1 23 1
ld.global.f32 %f1, [%rd13];
ld.global.f32 %f2, [%rd14];
.loc 1 25 1
mul.f32 %f49, %f2, %f2;
fma.rn.f32 %f50, %f1, %f1, %f49;
.loc 1 23 1
ld.global.f32 %f3, [%rd15];
.loc 1 25 1
fma.rn.f32 %f51, %f3, %f3, %f50;
setp.eq.f32 %p6, %f51, 0f00000000;
@%p6 bra BB0_41;
cvta.to.global.u64 %rd16, %rd11;
cvt.s64.s32 %rd17, %r65;
add.s64 %rd18, %rd16, %rd17;
.loc 1 29 1
ld.global.u8 %rs1, [%rd18];
.loc 1 77 1
cvt.u32.u16 %r80, %rs1;
and.b32 %r4, %r80, 255;
cvta.to.global.u64 %rd19, %rd4;
mul.wide.s32 %rd20, %r65, 4;
add.s64 %rd21, %rd19, %rd20;
.loc 1 30 1
ld.global.f32 %f4, [%rd21];
cvta.to.global.u64 %rd22, %rd5;
add.s64 %rd23, %rd22, %rd20;
.loc 1 30 1
ld.global.f32 %f5, [%rd23];
cvta.to.global.u64 %rd24, %rd6;
add.s64 %rd25, %rd24, %rd20;
.loc 1 30 1
ld.global.f32 %f6, [%rd25];
.loc 1 37 1
and.b16 %rs5, %rs4, 1;
setp.eq.b16 %p7, %rs5, 1;
@!%p7 bra BB0_4;
bra.uni BB0_3;
BB0_3:
add.s32 %r85, %r1, -1;
rem.s32 %r86, %r85, %r52;
add.s32 %r87, %r86, %r52;
rem.s32 %r263, %r87, %r52;
bra.uni BB0_5;
BB0_4:
.loc 1 37 1
add.s32 %r92, %r1, -1;
mov.u32 %r93, 0;
.loc 2 3551 10
max.s32 %r263, %r92, %r93;
BB0_5:
.loc 1 37 226
mad.lo.s32 %r103, %r64, %r52, %r263;
cvt.s64.s32 %rd28, %r103;
mul.wide.s32 %rd29, %r103, 4;
add.s64 %rd30, %rd3, %rd29;
add.s64 %rd32, %rd2, %rd29;
add.s64 %rd34, %rd1, %rd29;
.loc 1 38 1
ld.global.f32 %f52, [%rd30];
ld.global.f32 %f53, [%rd32];
ld.global.f32 %f54, [%rd34];
.loc 1 39 1
mul.f32 %f55, %f53, %f53;
fma.rn.f32 %f56, %f52, %f52, %f55;
fma.rn.f32 %f57, %f54, %f54, %f56;
setp.eq.f32 %p8, %f57, 0f00000000;
selp.f32 %f9, %f3, %f54, %p8;
selp.f32 %f8, %f2, %f53, %p8;
selp.f32 %f7, %f1, %f52, %p8;
add.s64 %rd35, %rd16, %rd28;
.loc 1 40 1
ld.global.u8 %rs6, [%rd35];
and.b16 %rs7, %rs1, 255;
setp.gt.u16 %p9, %rs6, %rs7;
cvt.u32.u16 %r8, %rs6;
@%p9 bra BB0_7;
add.s32 %r104, %r4, 1;
mul.lo.s32 %r105, %r104, %r4;
shr.u32 %r106, %r105, 31;
add.s32 %r107, %r105, %r106;
shr.s32 %r108, %r107, 1;
add.s32 %r264, %r8, %r108;
bra.uni BB0_8;
BB0_7:
.loc 1 40 1
add.s32 %r109, %r8, 1;
mul.lo.s32 %r110, %r109, %r8;
shr.u32 %r111, %r110, 31;
add.s32 %r112, %r110, %r111;
shr.s32 %r113, %r112, 1;
add.s32 %r264, %r113, %r4;
BB0_8:
cvta.to.global.u64 %rd36, %rd10;
mul.wide.s32 %rd37, %r264, 4;
add.s64 %rd38, %rd36, %rd37;
.loc 1 40 1
ld.global.f32 %f58, [%rd38];
.loc 1 41 1
mul.f32 %f59, %f58, %f46;
sub.f32 %f60, %f7, %f1;
sub.f32 %f61, %f8, %f2;
sub.f32 %f62, %f9, %f3;
.loc 1 41 1
fma.rn.f32 %f10, %f59, %f60, %f4;
fma.rn.f32 %f11, %f59, %f61, %f5;
fma.rn.f32 %f12, %f59, %f62, %f6;
.loc 1 44 1
add.s32 %r12, %r1, 1;
@!%p7 bra BB0_10;
bra.uni BB0_9;
BB0_9:
rem.s32 %r118, %r12, %r52;
add.s32 %r119, %r118, %r52;
rem.s32 %r265, %r119, %r52;
bra.uni BB0_11;
BB0_10:
.loc 1 44 1
add.s32 %r120, %r52, -1;
.loc 2 3530 10
min.s32 %r265, %r12, %r120;
BB0_11:
.loc 1 44 226
mad.lo.s32 %r130, %r64, %r52, %r265;
cvt.s64.s32 %rd41, %r130;
mul.wide.s32 %rd42, %r130, 4;
add.s64 %rd43, %rd3, %rd42;
add.s64 %rd45, %rd2, %rd42;
add.s64 %rd47, %rd1, %rd42;
.loc 1 45 1
ld.global.f32 %f63, [%rd43];
ld.global.f32 %f64, [%rd45];
ld.global.f32 %f65, [%rd47];
.loc 1 46 1
mul.f32 %f66, %f64, %f64;
fma.rn.f32 %f67, %f63, %f63, %f66;
fma.rn.f32 %f68, %f65, %f65, %f67;
setp.eq.f32 %p11, %f68, 0f00000000;
selp.f32 %f15, %f3, %f65, %p11;
selp.f32 %f14, %f2, %f64, %p11;
selp.f32 %f13, %f1, %f63, %p11;
add.s64 %rd48, %rd16, %rd41;
.loc 1 47 1
ld.global.u8 %rs9, [%rd48];
setp.gt.u16 %p12, %rs9, %rs7;
cvt.u32.u16 %r16, %rs9;
@%p12 bra BB0_13;
add.s32 %r131, %r4, 1;
mul.lo.s32 %r132, %r131, %r4;
shr.u32 %r133, %r132, 31;
add.s32 %r134, %r132, %r133;
shr.s32 %r135, %r134, 1;
add.s32 %r266, %r16, %r135;
bra.uni BB0_14;
BB0_13:
.loc 1 47 1
add.s32 %r136, %r16, 1;
mul.lo.s32 %r137, %r136, %r16;
shr.u32 %r138, %r137, 31;
add.s32 %r139, %r137, %r138;
shr.s32 %r140, %r139, 1;
add.s32 %r266, %r140, %r4;
BB0_14:
mul.wide.s32 %rd50, %r266, 4;
add.s64 %rd51, %rd36, %rd50;
.loc 1 47 1
ld.global.f32 %f69, [%rd51];
.loc 1 48 1
mul.f32 %f70, %f69, %f46;
sub.f32 %f71, %f13, %f1;
sub.f32 %f72, %f14, %f2;
sub.f32 %f73, %f15, %f3;
.loc 1 48 1
fma.rn.f32 %f16, %f70, %f71, %f10;
fma.rn.f32 %f17, %f70, %f72, %f11;
fma.rn.f32 %f18, %f70, %f73, %f12;
.loc 1 51 1
and.b16 %rs2, %rs4, 2;
setp.eq.s16 %p13, %rs2, 0;
add.s32 %r20, %r2, -1;
@%p13 bra BB0_16;
rem.s32 %r145, %r20, %r53;
add.s32 %r146, %r145, %r53;
rem.s32 %r267, %r146, %r53;
bra.uni BB0_17;
BB0_16:
mov.u32 %r147, 0;
.loc 2 3551 10
max.s32 %r267, %r20, %r147;
BB0_17:
.loc 1 51 179
mad.lo.s32 %r152, %r3, %r53, %r267;
mad.lo.s32 %r157, %r152, %r52, %r1;
cvt.s64.s32 %rd54, %r157;
mul.wide.s32 %rd55, %r157, 4;
add.s64 %rd56, %rd3, %rd55;
add.s64 %rd58, %rd2, %rd55;
add.s64 %rd60, %rd1, %rd55;
.loc 1 52 1
ld.global.f32 %f74, [%rd56];
ld.global.f32 %f75, [%rd58];
ld.global.f32 %f76, [%rd60];
.loc 1 53 1
mul.f32 %f77, %f75, %f75;
fma.rn.f32 %f78, %f74, %f74, %f77;
fma.rn.f32 %f79, %f76, %f76, %f78;
setp.eq.f32 %p14, %f79, 0f00000000;
selp.f32 %f21, %f3, %f76, %p14;
selp.f32 %f20, %f2, %f75, %p14;
selp.f32 %f19, %f1, %f74, %p14;
add.s64 %rd61, %rd16, %rd54;
.loc 1 54 1
ld.global.u8 %rs11, [%rd61];
setp.gt.u16 %p15, %rs11, %rs7;
cvt.u32.u16 %r24, %rs11;
@%p15 bra BB0_19;
add.s32 %r158, %r4, 1;
mul.lo.s32 %r159, %r158, %r4;
shr.u32 %r160, %r159, 31;
add.s32 %r161, %r159, %r160;
shr.s32 %r162, %r161, 1;
add.s32 %r268, %r24, %r162;
bra.uni BB0_20;
BB0_19:
.loc 1 54 1
add.s32 %r163, %r24, 1;
mul.lo.s32 %r164, %r163, %r24;
shr.u32 %r165, %r164, 31;
add.s32 %r166, %r164, %r165;
shr.s32 %r167, %r166, 1;
add.s32 %r268, %r167, %r4;
BB0_20:
mul.wide.s32 %rd63, %r268, 4;
add.s64 %rd64, %rd36, %rd63;
.loc 1 54 1
ld.global.f32 %f80, [%rd64];
.loc 1 55 1
mul.f32 %f81, %f80, %f47;
sub.f32 %f82, %f19, %f1;
sub.f32 %f83, %f20, %f2;
sub.f32 %f84, %f21, %f3;
.loc 1 55 1
fma.rn.f32 %f22, %f81, %f82, %f16;
fma.rn.f32 %f23, %f81, %f83, %f17;
fma.rn.f32 %f24, %f81, %f84, %f18;
.loc 1 58 1
add.s32 %r28, %r2, 1;
and.b16 %rs13, %rs2, 255;
setp.eq.s16 %p16, %rs13, 0;
.loc 1 58 1
@%p16 bra BB0_22;
rem.s32 %r172, %r28, %r53;
add.s32 %r173, %r172, %r53;
rem.s32 %r269, %r173, %r53;
bra.uni BB0_23;
BB0_22:
.loc 1 58 1
add.s32 %r174, %r53, -1;
.loc 2 3530 10
min.s32 %r269, %r28, %r174;
BB0_23:
.loc 1 58 179
mad.lo.s32 %r179, %r3, %r53, %r269;
mad.lo.s32 %r184, %r179, %r52, %r1;
cvt.s64.s32 %rd67, %r184;
mul.wide.s32 %rd68, %r184, 4;
add.s64 %rd69, %rd3, %rd68;
add.s64 %rd71, %rd2, %rd68;
add.s64 %rd73, %rd1, %rd68;
.loc 1 59 1
ld.global.f32 %f85, [%rd69];
ld.global.f32 %f86, [%rd71];
ld.global.f32 %f87, [%rd73];
.loc 1 60 1
mul.f32 %f88, %f86, %f86;
fma.rn.f32 %f89, %f85, %f85, %f88;
fma.rn.f32 %f90, %f87, %f87, %f89;
setp.eq.f32 %p17, %f90, 0f00000000;
selp.f32 %f27, %f3, %f87, %p17;
selp.f32 %f26, %f2, %f86, %p17;
selp.f32 %f25, %f1, %f85, %p17;
add.s64 %rd74, %rd16, %rd67;
.loc 1 61 1
ld.global.u8 %rs14, [%rd74];
setp.gt.u16 %p18, %rs14, %rs7;
cvt.u32.u16 %r32, %rs14;
@%p18 bra BB0_25;
add.s32 %r185, %r4, 1;
mul.lo.s32 %r186, %r185, %r4;
shr.u32 %r187, %r186, 31;
add.s32 %r188, %r186, %r187;
shr.s32 %r189, %r188, 1;
add.s32 %r270, %r32, %r189;
bra.uni BB0_26;
BB0_25:
.loc 1 61 1
add.s32 %r190, %r32, 1;
mul.lo.s32 %r191, %r190, %r32;
shr.u32 %r192, %r191, 31;
add.s32 %r193, %r191, %r192;
shr.s32 %r194, %r193, 1;
add.s32 %r270, %r194, %r4;
BB0_26:
mul.wide.s32 %rd76, %r270, 4;
add.s64 %rd77, %rd36, %rd76;
.loc 1 61 1
ld.global.f32 %f91, [%rd77];
.loc 1 62 1
mul.f32 %f92, %f91, %f47;
sub.f32 %f93, %f25, %f1;
sub.f32 %f94, %f26, %f2;
sub.f32 %f95, %f27, %f3;
.loc 1 62 1
fma.rn.f32 %f118, %f92, %f93, %f22;
fma.rn.f32 %f119, %f92, %f94, %f23;
fma.rn.f32 %f120, %f92, %f95, %f24;
.loc 1 65 1
setp.eq.s32 %p19, %r54, 1;
@%p19 bra BB0_40;
.loc 1 67 1
and.b16 %rs3, %rs4, 4;
setp.eq.s16 %p20, %rs3, 0;
add.s32 %r36, %r3, -1;
@%p20 bra BB0_29;
rem.s32 %r199, %r36, %r54;
add.s32 %r200, %r199, %r54;
rem.s32 %r271, %r200, %r54;
bra.uni BB0_30;
BB0_29:
mov.u32 %r201, 0;
.loc 2 3551 10
max.s32 %r271, %r36, %r201;
BB0_30:
.loc 1 67 133
mad.lo.s32 %r206, %r271, %r53, %r2;
mad.lo.s32 %r211, %r206, %r52, %r1;
cvt.s64.s32 %rd80, %r211;
mul.wide.s32 %rd81, %r211, 4;
add.s64 %rd82, %rd3, %rd81;
add.s64 %rd84, %rd2, %rd81;
add.s64 %rd86, %rd1, %rd81;
.loc 1 68 1
ld.global.f32 %f96, [%rd82];
ld.global.f32 %f97, [%rd84];
ld.global.f32 %f98, [%rd86];
.loc 1 69 1
mul.f32 %f99, %f97, %f97;
fma.rn.f32 %f100, %f96, %f96, %f99;
fma.rn.f32 %f101, %f98, %f98, %f100;
setp.eq.f32 %p21, %f101, 0f00000000;
selp.f32 %f33, %f3, %f98, %p21;
selp.f32 %f32, %f2, %f97, %p21;
selp.f32 %f31, %f1, %f96, %p21;
add.s64 %rd87, %rd16, %rd80;
.loc 1 70 1
ld.global.u8 %rs16, [%rd87];
setp.gt.u16 %p22, %rs16, %rs7;
cvt.u32.u16 %r40, %rs16;
@%p22 bra BB0_32;
add.s32 %r212, %r4, 1;
mul.lo.s32 %r213, %r212, %r4;
shr.u32 %r214, %r213, 31;
add.s32 %r215, %r213, %r214;
shr.s32 %r216, %r215, 1;
add.s32 %r272, %r40, %r216;
bra.uni BB0_33;
BB0_32:
.loc 1 70 1
add.s32 %r217, %r40, 1;
mul.lo.s32 %r218, %r217, %r40;
shr.u32 %r219, %r218, 31;
add.s32 %r220, %r218, %r219;
shr.s32 %r221, %r220, 1;
add.s32 %r272, %r221, %r4;
BB0_33:
mul.wide.s32 %rd89, %r272, 4;
add.s64 %rd90, %rd36, %rd89;
.loc 1 70 1
ld.global.f32 %f102, [%rd90];
.loc 1 71 1
mul.f32 %f103, %f102, %f48;
sub.f32 %f104, %f31, %f1;
sub.f32 %f105, %f32, %f2;
sub.f32 %f106, %f33, %f3;
.loc 1 71 1
fma.rn.f32 %f34, %f103, %f104, %f118;
fma.rn.f32 %f35, %f103, %f105, %f119;
fma.rn.f32 %f36, %f103, %f106, %f120;
.loc 1 74 1
add.s32 %r44, %r3, 1;
and.b16 %rs18, %rs3, 255;
setp.eq.s16 %p23, %rs18, 0;
.loc 1 74 1
@%p23 bra BB0_35;
rem.s32 %r226, %r44, %r54;
add.s32 %r227, %r226, %r54;
rem.s32 %r273, %r227, %r54;
bra.uni BB0_36;
BB0_35:
.loc 1 74 1
add.s32 %r228, %r54, -1;
.loc 2 3530 10
min.s32 %r273, %r44, %r228;
BB0_36:
.loc 1 74 133
mad.lo.s32 %r233, %r273, %r53, %r2;
mad.lo.s32 %r238, %r233, %r52, %r1;
cvt.s64.s32 %rd93, %r238;
mul.wide.s32 %rd94, %r238, 4;
add.s64 %rd95, %rd3, %rd94;
add.s64 %rd97, %rd2, %rd94;
add.s64 %rd99, %rd1, %rd94;
.loc 1 75 1
ld.global.f32 %f107, [%rd95];
ld.global.f32 %f108, [%rd97];
ld.global.f32 %f109, [%rd99];
.loc 1 76 1
mul.f32 %f110, %f108, %f108;
fma.rn.f32 %f111, %f107, %f107, %f110;
fma.rn.f32 %f112, %f109, %f109, %f111;
setp.eq.f32 %p24, %f112, 0f00000000;
selp.f32 %f39, %f3, %f109, %p24;
selp.f32 %f38, %f2, %f108, %p24;
selp.f32 %f37, %f1, %f107, %p24;
add.s64 %rd100, %rd16, %rd93;
.loc 1 77 1
ld.global.u8 %rs19, [%rd100];
setp.gt.u16 %p25, %rs19, %rs7;
cvt.u32.u16 %r48, %rs19;
@%p25 bra BB0_38;
add.s32 %r239, %r4, 1;
mul.lo.s32 %r240, %r239, %r4;
shr.u32 %r241, %r240, 31;
add.s32 %r242, %r240, %r241;
shr.s32 %r243, %r242, 1;
add.s32 %r274, %r48, %r243;
bra.uni BB0_39;
BB0_38:
.loc 1 77 1
add.s32 %r244, %r48, 1;
mul.lo.s32 %r245, %r244, %r48;
shr.u32 %r246, %r245, 31;
add.s32 %r247, %r245, %r246;
shr.s32 %r248, %r247, 1;
add.s32 %r274, %r248, %r4;
BB0_39:
mul.wide.s32 %rd102, %r274, 4;
add.s64 %rd103, %rd36, %rd102;
.loc 1 77 1
ld.global.f32 %f113, [%rd103];
.loc 1 78 1
mul.f32 %f114, %f113, %f48;
sub.f32 %f115, %f37, %f1;
sub.f32 %f116, %f38, %f2;
sub.f32 %f117, %f39, %f3;
.loc 1 78 1
fma.rn.f32 %f118, %f114, %f115, %f34;
fma.rn.f32 %f119, %f114, %f116, %f35;
fma.rn.f32 %f120, %f114, %f117, %f36;
BB0_40:
mul.wide.s32 %rd105, %r65, 4;
add.s64 %rd106, %rd19, %rd105;
.loc 1 81 1
st.global.f32 [%rd106], %f118;
add.s64 %rd108, %rd22, %rd105;
.loc 1 82 1
st.global.f32 [%rd108], %f119;
add.s64 %rd110, %rd24, %rd105;
.loc 1 83 1
st.global.f32 [%rd110], %f120;
BB0_41:
.loc 1 84 2
ret;
}
`
addexchange_ptx_30 = `
.version 4.0
.target sm_30
.address_size 64
.visible .entry addexchange(
.param .u64 addexchange_param_0,
.param .u64 addexchange_param_1,
.param .u64 addexchange_param_2,
.param .u64 addexchange_param_3,
.param .u64 addexchange_param_4,
.param .u64 addexchange_param_5,
.param .u64 addexchange_param_6,
.param .u64 addexchange_param_7,
.param .f32 addexchange_param_8,
.param .f32 addexchange_param_9,
.param .f32 addexchange_param_10,
.param .u32 addexchange_param_11,
.param .u32 addexchange_param_12,
.param .u32 addexchange_param_13,
.param .u8 addexchange_param_14
)
{
.reg .pred %p<26>;
.reg .s16 %rs<21>;
.reg .s32 %r<275>;
.reg .f32 %f<121>;
.reg .s64 %rd<111>;
ld.param.u64 %rd1, [addexchange_param_0];
ld.param.u64 %rd2, [addexchange_param_1];
ld.param.u64 %rd3, [addexchange_param_2];
ld.param.u64 %rd4, [addexchange_param_3];
ld.param.u64 %rd5, [addexchange_param_4];
ld.param.u64 %rd6, [addexchange_param_5];
ld.param.u64 %rd7, [addexchange_param_6];
ld.param.u64 %rd8, [addexchange_param_7];
ld.param.f32 %f46, [addexchange_param_8];
ld.param.f32 %f47, [addexchange_param_9];
ld.param.f32 %f48, [addexchange_param_10];
ld.param.u32 %r52, [addexchange_param_11];
ld.param.u32 %r53, [addexchange_param_12];
ld.param.u32 %r54, [addexchange_param_13];
ld.param.u8 %rs4, [addexchange_param_14];
mov.u32 %r55, %ntid.x;
mov.u32 %r56, %ctaid.x;
mov.u32 %r57, %tid.x;
mad.lo.s32 %r1, %r55, %r56, %r57;
mov.u32 %r58, %ntid.y;
mov.u32 %r59, %ctaid.y;
mov.u32 %r60, %tid.y;
mad.lo.s32 %r2, %r58, %r59, %r60;
mov.u32 %r61, %ntid.z;
mov.u32 %r62, %ctaid.z;
mov.u32 %r63, %tid.z;
mad.lo.s32 %r3, %r61, %r62, %r63;
setp.ge.s32 %p1, %r2, %r53;
setp.ge.s32 %p2, %r1, %r52;
or.pred %p3, %p2, %p1;
setp.ge.s32 %p4, %r3, %r54;
or.pred %p5, %p3, %p4;
@%p5 bra BB0_41;
cvta.to.global.u64 %rd9, %rd6;
cvta.to.global.u64 %rd10, %rd5;
cvta.to.global.u64 %rd11, %rd4;
mad.lo.s32 %r64, %r3, %r53, %r2;
mad.lo.s32 %r65, %r64, %r52, %r1;
mul.wide.s32 %rd12, %r65, 4;
add.s64 %rd13, %rd11, %rd12;
add.s64 %rd14, %rd10, %rd12;
add.s64 %rd15, %rd9, %rd12;
ld.global.f32 %f1, [%rd13];
ld.global.f32 %f2, [%rd14];
mul.f32 %f49, %f2, %f2;
fma.rn.f32 %f50, %f1, %f1, %f49;
ld.global.f32 %f3, [%rd15];
fma.rn.f32 %f51, %f3, %f3, %f50;
setp.eq.f32 %p6, %f51, 0f00000000;
@%p6 bra BB0_41;
cvta.to.global.u64 %rd16, %rd8;
cvt.s64.s32 %rd17, %r65;
add.s64 %rd18, %rd16, %rd17;
ld.global.u8 %rs1, [%rd18];
cvt.u32.u16 %r80, %rs1;
and.b32 %r4, %r80, 255;
cvta.to.global.u64 %rd19, %rd1;
mul.wide.s32 %rd20, %r65, 4;
add.s64 %rd21, %rd19, %rd20;
ld.global.f32 %f4, [%rd21];
cvta.to.global.u64 %rd22, %rd2;
add.s64 %rd23, %rd22, %rd20;
ld.global.f32 %f5, [%rd23];
cvta.to.global.u64 %rd24, %rd3;
add.s64 %rd25, %rd24, %rd20;
ld.global.f32 %f6, [%rd25];
and.b16 %rs5, %rs4, 1;
setp.eq.b16 %p7, %rs5, 1;
@!%p7 bra BB0_4;
bra.uni BB0_3;
BB0_3:
add.s32 %r85, %r1, -1;
rem.s32 %r86, %r85, %r52;
add.s32 %r87, %r86, %r52;
rem.s32 %r263, %r87, %r52;
bra.uni BB0_5;
BB0_4:
add.s32 %r92, %r1, -1;
mov.u32 %r93, 0;
max.s32 %r263, %r92, %r93;
BB0_5:
mad.lo.s32 %r103, %r64, %r52, %r263;
cvt.s64.s32 %rd27, %r103;
mul.wide.s32 %rd29, %r103, 4;
add.s64 %rd30, %rd11, %rd29;
add.s64 %rd32, %rd10, %rd29;
add.s64 %rd34, %rd9, %rd29;
ld.global.f32 %f52, [%rd30];
ld.global.f32 %f53, [%rd32];
ld.global.f32 %f54, [%rd34];
mul.f32 %f55, %f53, %f53;
fma.rn.f32 %f56, %f52, %f52, %f55;
fma.rn.f32 %f57, %f54, %f54, %f56;
setp.eq.f32 %p8, %f57, 0f00000000;
selp.f32 %f9, %f3, %f54, %p8;
selp.f32 %f8, %f2, %f53, %p8;
selp.f32 %f7, %f1, %f52, %p8;
add.s64 %rd35, %rd16, %rd27;
ld.global.u8 %rs6, [%rd35];
and.b16 %rs7, %rs1, 255;
setp.gt.u16 %p9, %rs6, %rs7;
cvt.u32.u16 %r8, %rs6;
@%p9 bra BB0_7;
add.s32 %r104, %r4, 1;
mul.lo.s32 %r105, %r104, %r4;
shr.u32 %r106, %r105, 31;
add.s32 %r107, %r105, %r106;
shr.s32 %r108, %r107, 1;
add.s32 %r264, %r108, %r8;
bra.uni BB0_8;
BB0_7:
add.s32 %r109, %r8, 1;
mul.lo.s32 %r110, %r109, %r8;
shr.u32 %r111, %r110, 31;
add.s32 %r112, %r110, %r111;
shr.s32 %r113, %r112, 1;
add.s32 %r264, %r113, %r4;
BB0_8:
cvta.to.global.u64 %rd36, %rd7;
mul.wide.s32 %rd37, %r264, 4;
add.s64 %rd38, %rd36, %rd37;
ld.global.f32 %f58, [%rd38];
mul.f32 %f59, %f58, %f46;
sub.f32 %f60, %f7, %f1;
sub.f32 %f61, %f8, %f2;
sub.f32 %f62, %f9, %f3;
fma.rn.f32 %f10, %f59, %f60, %f4;
fma.rn.f32 %f11, %f59, %f61, %f5;
fma.rn.f32 %f12, %f59, %f62, %f6;
add.s32 %r12, %r1, 1;
@!%p7 bra BB0_10;
bra.uni BB0_9;
BB0_9:
rem.s32 %r118, %r12, %r52;
add.s32 %r119, %r118, %r52;
rem.s32 %r265, %r119, %r52;
bra.uni BB0_11;
BB0_10:
add.s32 %r120, %r52, -1;
min.s32 %r265, %r12, %r120;
BB0_11:
mad.lo.s32 %r130, %r64, %r52, %r265;
cvt.s64.s32 %rd40, %r130;
mul.wide.s32 %rd42, %r130, 4;
add.s64 %rd43, %rd11, %rd42;
add.s64 %rd45, %rd10, %rd42;
add.s64 %rd47, %rd9, %rd42;
ld.global.f32 %f63, [%rd43];
ld.global.f32 %f64, [%rd45];
ld.global.f32 %f65, [%rd47];
mul.f32 %f66, %f64, %f64;
fma.rn.f32 %f67, %f63, %f63, %f66;
fma.rn.f32 %f68, %f65, %f65, %f67;
setp.eq.f32 %p11, %f68, 0f00000000;
selp.f32 %f15, %f3, %f65, %p11;
selp.f32 %f14, %f2, %f64, %p11;
selp.f32 %f13, %f1, %f63, %p11;
add.s64 %rd48, %rd16, %rd40;
ld.global.u8 %rs9, [%rd48];
setp.gt.u16 %p12, %rs9, %rs7;
cvt.u32.u16 %r16, %rs9;
@%p12 bra BB0_13;
add.s32 %r131, %r4, 1;
mul.lo.s32 %r132, %r131, %r4;
shr.u32 %r133, %r132, 31;
add.s32 %r134, %r132, %r133;
shr.s32 %r135, %r134, 1;
add.s32 %r266, %r135, %r16;
bra.uni BB0_14;
BB0_13:
add.s32 %r136, %r16, 1;
mul.lo.s32 %r137, %r136, %r16;
shr.u32 %r138, %r137, 31;
add.s32 %r139, %r137, %r138;
shr.s32 %r140, %r139, 1;
add.s32 %r266, %r140, %r4;
BB0_14:
mul.wide.s32 %rd50, %r266, 4;
add.s64 %rd51, %rd36, %rd50;
ld.global.f32 %f69, [%rd51];
mul.f32 %f70, %f69, %f46;
sub.f32 %f71, %f13, %f1;
sub.f32 %f72, %f14, %f2;
sub.f32 %f73, %f15, %f3;
fma.rn.f32 %f16, %f70, %f71, %f10;
fma.rn.f32 %f17, %f70, %f72, %f11;
fma.rn.f32 %f18, %f70, %f73, %f12;
and.b16 %rs2, %rs4, 2;
setp.eq.s16 %p13, %rs2, 0;
add.s32 %r20, %r2, -1;
@%p13 bra BB0_16;
rem.s32 %r145, %r20, %r53;
add.s32 %r146, %r145, %r53;
rem.s32 %r267, %r146, %r53;
bra.uni BB0_17;
BB0_16:
mov.u32 %r147, 0;
max.s32 %r267, %r20, %r147;
BB0_17:
mad.lo.s32 %r152, %r3, %r53, %r267;
mad.lo.s32 %r157, %r152, %r52, %r1;
cvt.s64.s32 %rd53, %r157;
mul.wide.s32 %rd55, %r157, 4;
add.s64 %rd56, %rd11, %rd55;
add.s64 %rd58, %rd10, %rd55;
add.s64 %rd60, %rd9, %rd55;
ld.global.f32 %f74, [%rd56];
ld.global.f32 %f75, [%rd58];
ld.global.f32 %f76, [%rd60];
mul.f32 %f77, %f75, %f75;
fma.rn.f32 %f78, %f74, %f74, %f77;
fma.rn.f32 %f79, %f76, %f76, %f78;
setp.eq.f32 %p14, %f79, 0f00000000;
selp.f32 %f21, %f3, %f76, %p14;
selp.f32 %f20, %f2, %f75, %p14;
selp.f32 %f19, %f1, %f74, %p14;
add.s64 %rd61, %rd16, %rd53;
ld.global.u8 %rs11, [%rd61];
setp.gt.u16 %p15, %rs11, %rs7;
cvt.u32.u16 %r24, %rs11;
@%p15 bra BB0_19;
add.s32 %r158, %r4, 1;
mul.lo.s32 %r159, %r158, %r4;
shr.u32 %r160, %r159, 31;
add.s32 %r161, %r159, %r160;
shr.s32 %r162, %r161, 1;
add.s32 %r268, %r162, %r24;
bra.uni BB0_20;
BB0_19:
add.s32 %r163, %r24, 1;
mul.lo.s32 %r164, %r163, %r24;
shr.u32 %r165, %r164, 31;
add.s32 %r166, %r164, %r165;
shr.s32 %r167, %r166, 1;
add.s32 %r268, %r167, %r4;
BB0_20:
mul.wide.s32 %rd63, %r268, 4;
add.s64 %rd64, %rd36, %rd63;
ld.global.f32 %f80, [%rd64];
mul.f32 %f81, %f80, %f47;
sub.f32 %f82, %f19, %f1;