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Install fails on AMD 8350 #20

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lesshaste opened this issue Jan 14, 2020 · 5 comments
Closed

Install fails on AMD 8350 #20

lesshaste opened this issue Jan 14, 2020 · 5 comments

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@lesshaste
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Pkg.add("LoopVectorization") on julia 1.3.1 and LoopVectorization 0.3.5 gives (from the log):

ERROR: LoadError: "Architecture not yet supported. Please file an issue!\nYou can fix immediately by supplying the correct number of cores\nand the cache sizes (L1 data per core, L2 per core, L3).\nIf you do, please file an issue with the information or a PR\nadding it to the build script, so your architecture will be\nsupported for all future releases."
Stacktrace:
 [1] top-level scope at /home/user/.julia/packages/VectorizationBase/cKn6V/deps/build.jl:15
 [2] include at ./boot.jl:328 [inlined]
 [3] include_relative(::Module, ::String) at ./loading.jl:1105
 [4] include(::Module, ::String) at ./Base.jl:31
 [5] include(::String) at ./client.jl:424
 [6] top-level scope at none:5
in expression starting at /home/user/.julia/packages/VectorizationBase/cKn6V/deps/build.jl:7

The CPU is the AMD 8350 /proc/cpuinfo gives:

processor : 0
vendor_id : AuthenticAMD
cpu family : 21
model : 2
model name : AMD FX(tm)-8350 Eight-Core Processor
stepping : 0
microcode : 0x6000852
cpu MHz : 1400.000
cache size : 2048 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 4
apicid : 16
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt fma4 tce nodeid_msr tbm topoext perfctr_core perfctr_nb cpb hw_pstate ssbd ibpb vmmcall bmi1 arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold
bugs : fxsave_leak sysret_ss_attrs spectre_v1 spectre_v2 spec_store_bypass
bogomips : 8016.25
TLB size : 1536 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm 100mhzsteps hwpstate cpb eff_freq_ro

@simeonschaub
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Just for reference, Wikipedia has a pretty good list of specs for FX processors: https://en.m.wikipedia.org/wiki/List_of_AMD_FX_microprocessors

@chriselrod
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chriselrod commented Jan 14, 2020

I no longer call how I decided not to use:

using CpuId
cache_size = CpuId.cachesize()
num_cores = CpuId.cpucores()

https://github.com/chriselrod/VectorizationBase.jl/blob/master/deps/build.jl#L10

For AMD CPUS. Mind trying them and reporting what they return?
It would be better if we don't have to special case.

If that doesn't work, the problem is in CpuId.jl. If it does work, I should probably drop the checks.
Either way, the issue can be addressed in VectorizationBase, like @simeonschaub noted on discourse.

Otherwise, I'll add them. I also need to add Sys.CPU_NAME == "znver2".
What is your Sys.CPU_NAME?

@lesshaste
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julia> cache_size = CpuId.cachesize()
(16384, 2097152, 8388608)

julia> num_cores = CpuId.cpucores()
8

julia> Sys.CPU_NAME
"bdver1"

@chriselrod
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chriselrod commented Jan 14, 2020

Looks like I may be able to just drop the special casing for AMD.

Do you know how I could test on zenv1 and zenv2?
I'm wondering if I should still special case these, or if they're properly supported. It isn't immediately obvious to me how to find out without access to them.

EDIT:
m-j-w/CpuId.jl@2ac67b0
Looks like as of July 2018, those functions should be supported on AMD.

I must have written the build script before that.

I'll just drop the special casing.

@chriselrod
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Fixed by
JuliaSIMD/VectorizationBase.jl@720d707

Update to VectorizationBase v0.1.8. I'll release a new LoopVectorization with that as the lower bound in the next few days.

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