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net/i40e: relax barrier in Tx for NEON
[ upstream commit 6b50c48 ] To keep ordering of mixed accesses, 'DMB OSH' is sufficient. 'DSB' inside the I40E_PCI_REG_WRITE is overkill.[1] This patch fixes by replacing with just sufficient barriers in the normal PMD and vPMD. It showed 7% performance uplift on ThunderX2 and 4% on Arm N1SDP. The test case is the RFC2544 zero-loss test running testpmd. [1] http://inbox.dpdk.org/dev/CALBAE1M-ezVWCjqCZDBw+MMDEC4O9 qf0Kpn89EMdGDajepKoZQ@mail.gmail.com Fixes: ae0eb31 ("net/i40e: implement vector PMD for ARM") Signed-off-by: Gavin Hu <gavin.hu@arm.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
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