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.SUBCKT TL074c 1out 1in- 1in+ vcc+ 2in+ 2in- 2out 3out 3in- 3in+ vcc- 4in+ 4in- 4out .include TL074.301 XU1A 1in+ 1in- vcc+ vcc- 1out TL074 XU1B 2in+ 2in- vcc+ vcc- 2out TL074 XU1C 3in+ 3in- vcc+ vcc- 3out TL074 XU1D 4in+ 4in- vcc+ vcc- 4out TL074 .ends
Because I see you only provide the opamp but not the whole chip
The text was updated successfully, but these errors were encountered:
for anyone needing 4013
.subckt 4013B Q1 Q1N CLOCK1 RESET1 D1 SET1 VSS SET2 D2 RESET2 CLOCK2 Q2N Q2 VDD * Include the CD4013B model from the library .include CD4000_v.lib XU1 D1 CLOCK1 RESET1 SET1 Q1 Q1N VDD VSS vdd1={5} speed1={standard} CD4013B XU2 D2 CLOCK2 RESET2 SET2 Q2 Q2N VDD VSS vdd1={5} speed1={standard} CD4013B .ends 4013B
and 4081
.subckt 4081B A1 B1 Y1 Y2 A2 B2 VSS A3 B3 Y3 Y4 A4 B4 VDD * Parameters for timing and performance adjustment .param vdd1={5} speed1={standard} tripdt1={tripdt} .param td1=1e-9*(125-40-10)*5/{vdd1}*{speed1} .include CD4000_v.lib * Instances for each of the four AND gates in the CD4081B XAND1 A1 B1 Y1 VDD VSS vdd1={vdd1} speed1={speed1} tripdt1={tripdt1} td1={td1} CD4081B XAND2 A2 B2 Y2 VDD VSS vdd1={vdd1} speed1={speed1} tripdt1={tripdt1} td1={td1} CD4081B XAND3 A3 B3 Y3 VDD VSS vdd1={vdd1} speed1={speed1} tripdt1={tripdt1} td1={td1} CD4081B XAND4 A4 B4 Y4 VDD VSS vdd1={vdd1} speed1={speed1} tripdt1={tripdt1} td1={td1} CD4081B .ends 4081B
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Because I see you only provide the opamp but not the whole chip
The text was updated successfully, but these errors were encountered: