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[Feature Request] Circuit verification via ISM #210
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Posting here the first draft of the issue for reference: Proposed Solution (First draft)Use the Initialization-CNOT-Measurement (ICM) form. In this form, the computation is expressed as initialization of states (including magic states), a unitary consisting of just CNOTS, and single measurements in the Z and X bases. Verification processComparing UnitariesOur input quantum program is reversible quantum program, a unitary We check that If the above are met, then the final state of both program should be Challenges
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Issue Description
We want a technique to verify large scale circuits. Verification by comparing the final state-vector is computationally very expensive. A better approach might be to compare the logical circuit and the compiled circuit to a standard form, that is particularly efficient to compare.
Proposed Solution
Convert both logical and patch computation circuit into an Initialization-Stabilizer-Measurement form (ISM). Check that the initial states are the same for both, check that the stabilizer parts are the same by simulation with CHP on a set that generates all stabilizer states, check that measurements occur in the same order.
Overview
Our input quantum program is reversible quantum program, a unitary
U_0
, applied to an initial statev_0
. Remove all the T gates by turning them into teleported gates, and our program isU
,u
. Now the compiled version of this program is a sequence of merges and splits on a large input statev_0
. These are pure stabilizer operations in the Pauli formalism forming a unitaryV
, with the addition of some ancillas turning the initial statev_0
tov
.We check that
u
andv
match (qubit mapping problem) and thatU=V
by checkingUV^=1
(by^
I mean dagger) with some efficient multiplier for stabilizer unitaries (based on CHP?).Matching input qubits
Need to check that
u
andv
match:|+>
and|m>
, but as long as it's possible to permute the ancilla portionsv
to matchu
that should be fine. Will have to track this permutation inV
as well.Checking Unitaries
We want to show that
U
(stabilizer ops of the logical circuit) is the same asV
(stabilizer ops of the compiled circuit). We do it by checking thatU|s> = V|s>
a set as states|s>
that generates all stabilizer states. TODO explain why this is enough.The generator for all stabilizer states
What are the states
|s>
for which we checkU|s> = V|s>
? One state stabilized by each of the following Pauli productsChecking the measurement sequence
Need to look into this more as it might be tricky especially when running things like Litinski's transform for commuting pi/4 rotations.
Computing
U|s>
andV|s>
For the input circuit U it might be advantageous to use the Clifford+T set as it's more likely to be closer to the form in which the input was specified in to begin with.
On this set we can use CHP to compute
U|s>
. CHP internally uses the Pauli Product form to express stabilizer states (CHP paper beginning of sec. III), so we are in good shape for using these strings of paulis directly as input.For the compiled compilation part we want to look at either decomposing the multibody measurements in their computational meaning with CNOTs and Hadamards or simulating them directly since they are stabilizer operations
Additional References
Paler et al. on converting circuits to ICM
Aaronson's CHP
Very Fast Stabilizer Simulator (Stim)
Graph state based fast stabilizer simulation (another idea for stabilizer simulation)
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