/
sub.ll
1462 lines (1325 loc) · 42.1 KB
/
sub.ll
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
define i32 @sub_constant(i32 %x) {
; CHECK-LABEL: @sub_constant(
; CHECK-NEXT: [[R:%.*]] = add i32 [[X:%.*]], -42
; CHECK-NEXT: ret i32 [[R]]
;
%r = sub i32 %x, 42
ret i32 %r
}
@g = global i32 0
define i32 @sub_constant_expression(i32 %x) {
; CHECK-LABEL: @sub_constant_expression(
; CHECK-NEXT: [[R:%.*]] = sub i32 [[X:%.*]], ptrtoint (i32* @g to i32)
; CHECK-NEXT: ret i32 [[R]]
;
%r = sub i32 %x, ptrtoint (i32* @g to i32)
ret i32 %r
}
define <2 x i32> @sub_constant_vec(<2 x i32> %x) {
; CHECK-LABEL: @sub_constant_vec(
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[X:%.*]], <i32 -42, i32 12>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%r = sub <2 x i32> %x, <i32 42, i32 -12>
ret <2 x i32> %r
}
define <3 x i33> @sub_constant_vec_weird_type(<3 x i33> %x) {
; CHECK-LABEL: @sub_constant_vec_weird_type(
; CHECK-NEXT: [[R:%.*]] = add <3 x i33> [[X:%.*]], <i33 42, i33 -42, i33 12>
; CHECK-NEXT: ret <3 x i33> [[R]]
;
%r = sub <3 x i33> %x, <i33 -42, i33 42, i33 -12>
ret <3 x i33> %r
}
define <4 x i32> @sub_constant_expression_vec(<4 x i32> %x) {
; CHECK-LABEL: @sub_constant_expression_vec(
; CHECK-NEXT: [[R:%.*]] = sub <4 x i32> [[X:%.*]], bitcast (i128 ptrtoint (i32* @g to i128) to <4 x i32>)
; CHECK-NEXT: ret <4 x i32> [[R]]
;
%r = sub <4 x i32> %x, bitcast (i128 ptrtoint (i32* @g to i128) to <4 x i32>)
ret <4 x i32> %r
}
define i32 @neg_sub(i32 %x, i32 %y) {
; CHECK-LABEL: @neg_sub(
; CHECK-NEXT: [[R:%.*]] = add i32 [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[R]]
;
%neg = sub i32 0, %x
%r = sub i32 %y, %neg
ret i32 %r
}
define i32 @neg_nsw_sub(i32 %x, i32 %y) {
; CHECK-LABEL: @neg_nsw_sub(
; CHECK-NEXT: [[R:%.*]] = add i32 [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[R]]
;
%neg = sub nsw i32 0, %x
%r = sub i32 %y, %neg
ret i32 %r
}
define i32 @neg_sub_nsw(i32 %x, i32 %y) {
; CHECK-LABEL: @neg_sub_nsw(
; CHECK-NEXT: [[R:%.*]] = add i32 [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[R]]
;
%neg = sub i32 0, %x
%r = sub nsw i32 %y, %neg
ret i32 %r
}
define i32 @neg_nsw_sub_nsw(i32 %x, i32 %y) {
; CHECK-LABEL: @neg_nsw_sub_nsw(
; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[R]]
;
%neg = sub nsw i32 0, %x
%r = sub nsw i32 %y, %neg
ret i32 %r
}
define <2 x i32> @neg_sub_vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @neg_sub_vec(
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%neg = sub <2 x i32> zeroinitializer, %x
%r = sub <2 x i32> %y, %neg
ret <2 x i32> %r
}
define <2 x i32> @neg_nsw_sub_vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @neg_nsw_sub_vec(
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%neg = sub nsw <2 x i32> zeroinitializer, %x
%r = sub <2 x i32> %y, %neg
ret <2 x i32> %r
}
define <2 x i32> @neg_sub_nsw_vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @neg_sub_nsw_vec(
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%neg = sub <2 x i32> zeroinitializer, %x
%r = sub nsw <2 x i32> %y, %neg
ret <2 x i32> %r
}
define <2 x i32> @neg_nsw_sub_nsw_vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @neg_nsw_sub_nsw_vec(
; CHECK-NEXT: [[R:%.*]] = add nsw <2 x i32> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%neg = sub nsw <2 x i32> zeroinitializer, %x
%r = sub nsw <2 x i32> %y, %neg
ret <2 x i32> %r
}
define <2 x i32> @neg_sub_vec_undef(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @neg_sub_vec_undef(
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%neg = sub <2 x i32> <i32 0, i32 undef>, %x
%r = sub <2 x i32> %y, %neg
ret <2 x i32> %r
}
define <2 x i32> @neg_nsw_sub_vec_undef(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @neg_nsw_sub_vec_undef(
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%neg = sub nsw <2 x i32> <i32 undef, i32 0>, %x
%r = sub <2 x i32> %y, %neg
ret <2 x i32> %r
}
define <2 x i32> @neg_sub_nsw_vec_undef(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @neg_sub_nsw_vec_undef(
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%neg = sub <2 x i32> <i32 undef, i32 0>, %x
%r = sub nsw <2 x i32> %y, %neg
ret <2 x i32> %r
}
; This should not drop 'nsw'.
define <2 x i32> @neg_nsw_sub_nsw_vec_undef(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @neg_nsw_sub_nsw_vec_undef(
; CHECK-NEXT: [[R:%.*]] = add nsw <2 x i32> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%neg = sub nsw <2 x i32> <i32 0, i32 undef>, %x
%r = sub nsw <2 x i32> %y, %neg
ret <2 x i32> %r
}
; (~X) - (~Y) --> Y - X
; Also, show that we can handle extra uses and vectors.
declare void @use8(i8)
define i8 @notnotsub(i8 %x, i8 %y) {
; CHECK-LABEL: @notnotsub(
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
; CHECK-NEXT: [[NY:%.*]] = xor i8 [[Y:%.*]], -1
; CHECK-NEXT: [[SUB:%.*]] = sub i8 [[Y]], [[X]]
; CHECK-NEXT: call void @use8(i8 [[NX]])
; CHECK-NEXT: call void @use8(i8 [[NY]])
; CHECK-NEXT: ret i8 [[SUB]]
;
%nx = xor i8 %x, -1
%ny = xor i8 %y, -1
%sub = sub i8 %nx, %ny
call void @use8(i8 %nx)
call void @use8(i8 %ny)
ret i8 %sub
}
define <2 x i8> @notnotsub_vec(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @notnotsub_vec(
; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i8> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i8> [[SUB]]
;
%nx = xor <2 x i8> %x, <i8 -1, i8 -1>
%ny = xor <2 x i8> %y, <i8 -1, i8 -1>
%sub = sub <2 x i8> %nx, %ny
ret <2 x i8> %sub
}
define <2 x i8> @notnotsub_vec_undef_elts(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @notnotsub_vec_undef_elts(
; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i8> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i8> [[SUB]]
;
%nx = xor <2 x i8> %x, <i8 undef, i8 -1>
%ny = xor <2 x i8> %y, <i8 -1, i8 undef>
%sub = sub <2 x i8> %nx, %ny
ret <2 x i8> %sub
}
define i32 @test5(i32 %A, i32 %B, i32 %C) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: [[D_NEG:%.*]] = sub i32 [[C:%.*]], [[B:%.*]]
; CHECK-NEXT: [[E:%.*]] = add i32 [[D_NEG]], [[A:%.*]]
; CHECK-NEXT: ret i32 [[E]]
;
%D = sub i32 %B, %C
%E = sub i32 %A, %D
ret i32 %E
}
define i32 @test6(i32 %A, i32 %B) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: [[B_NOT:%.*]] = xor i32 [[B:%.*]], -1
; CHECK-NEXT: [[D:%.*]] = and i32 [[B_NOT]], [[A:%.*]]
; CHECK-NEXT: ret i32 [[D]]
;
%C = and i32 %A, %B
%D = sub i32 %A, %C
ret i32 %D
}
define i32 @test6commuted(i32 %A, i32 %B) {
; CHECK-LABEL: @test6commuted(
; CHECK-NEXT: [[B_NOT:%.*]] = xor i32 [[B:%.*]], -1
; CHECK-NEXT: [[D:%.*]] = and i32 [[B_NOT]], [[A:%.*]]
; CHECK-NEXT: ret i32 [[D]]
;
%C = and i32 %B, %A
%D = sub i32 %A, %C
ret i32 %D
}
define i32 @test7(i32 %A) {
; CHECK-LABEL: @test7(
; CHECK-NEXT: [[B:%.*]] = xor i32 [[A:%.*]], -1
; CHECK-NEXT: ret i32 [[B]]
;
%B = sub i32 -1, %A
ret i32 %B
}
define i32 @test8(i32 %A) {
; CHECK-LABEL: @test8(
; CHECK-NEXT: [[C:%.*]] = shl i32 [[A:%.*]], 3
; CHECK-NEXT: ret i32 [[C]]
;
%B = mul i32 9, %A
%C = sub i32 %B, %A
ret i32 %C
}
define i32 @test9(i32 %A) {
; CHECK-LABEL: @test9(
; CHECK-NEXT: [[C:%.*]] = mul i32 [[A:%.*]], -2
; CHECK-NEXT: ret i32 [[C]]
;
%B = mul i32 3, %A
%C = sub i32 %A, %B
ret i32 %C
}
define i1 @test11(i8 %A, i8 %B) {
; CHECK-LABEL: @test11(
; CHECK-NEXT: [[D:%.*]] = icmp ne i8 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i1 [[D]]
;
%C = sub i8 %A, %B
%D = icmp ne i8 %C, 0
ret i1 %D
}
define <2 x i1> @test11vec(<2 x i8> %A, <2 x i8> %B) {
; CHECK-LABEL: @test11vec(
; CHECK-NEXT: [[D:%.*]] = icmp ne <2 x i8> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[D]]
;
%C = sub <2 x i8> %A, %B
%D = icmp ne <2 x i8> %C, zeroinitializer
ret <2 x i1> %D
}
define i32 @test12(i32 %A) {
; CHECK-LABEL: @test12(
; CHECK-NEXT: [[B_NEG:%.*]] = lshr i32 [[A:%.*]], 31
; CHECK-NEXT: ret i32 [[B_NEG]]
;
%B = ashr i32 %A, 31
%C = sub i32 0, %B
ret i32 %C
}
define i32 @test13(i32 %A) {
; CHECK-LABEL: @test13(
; CHECK-NEXT: [[B_NEG:%.*]] = ashr i32 [[A:%.*]], 31
; CHECK-NEXT: ret i32 [[B_NEG]]
;
%B = lshr i32 %A, 31
%C = sub i32 0, %B
ret i32 %C
}
define <2 x i32> @test12vec(<2 x i32> %A) {
; CHECK-LABEL: @test12vec(
; CHECK-NEXT: [[B_NEG:%.*]] = lshr <2 x i32> [[A:%.*]], <i32 31, i32 31>
; CHECK-NEXT: ret <2 x i32> [[B_NEG]]
;
%B = ashr <2 x i32> %A, <i32 31, i32 31>
%C = sub <2 x i32> zeroinitializer, %B
ret <2 x i32> %C
}
define <2 x i32> @test13vec(<2 x i32> %A) {
; CHECK-LABEL: @test13vec(
; CHECK-NEXT: [[B_NEG:%.*]] = ashr <2 x i32> [[A:%.*]], <i32 31, i32 31>
; CHECK-NEXT: ret <2 x i32> [[B_NEG]]
;
%B = lshr <2 x i32> %A, <i32 31, i32 31>
%C = sub <2 x i32> zeroinitializer, %B
ret <2 x i32> %C
}
define i32 @test15(i32 %A, i32 %B) {
; CHECK-LABEL: @test15(
; CHECK-NEXT: [[C:%.*]] = sub i32 0, [[A:%.*]]
; CHECK-NEXT: [[D:%.*]] = srem i32 [[B:%.*]], [[C]]
; CHECK-NEXT: ret i32 [[D]]
;
%C = sub i32 0, %A
%D = srem i32 %B, %C
ret i32 %D
}
define i32 @test16(i32 %A) {
; CHECK-LABEL: @test16(
; CHECK-NEXT: [[X_NEG:%.*]] = sdiv i32 [[A:%.*]], -1123
; CHECK-NEXT: ret i32 [[X_NEG]]
;
%X = sdiv i32 %A, 1123
%Y = sub i32 0, %X
ret i32 %Y
}
; Can't fold subtract here because negation it might oveflow.
; PR3142
define i32 @test17(i32 %A) {
; CHECK-LABEL: @test17(
; CHECK-NEXT: [[B:%.*]] = sub i32 0, [[A:%.*]]
; CHECK-NEXT: [[C:%.*]] = sdiv i32 [[B]], 1234
; CHECK-NEXT: ret i32 [[C]]
;
%B = sub i32 0, %A
%C = sdiv i32 %B, 1234
ret i32 %C
}
define i64 @test18(i64 %Y) {
; CHECK-LABEL: @test18(
; CHECK-NEXT: ret i64 0
;
%i.4 = shl i64 %Y, 2
%i.12 = shl i64 %Y, 2
%i.8 = sub i64 %i.4, %i.12
ret i64 %i.8
}
define i1 @test20(i32 %g, i32 %h) {
; CHECK-LABEL: @test20(
; CHECK-NEXT: [[I_4:%.*]] = icmp ne i32 [[H:%.*]], 0
; CHECK-NEXT: ret i1 [[I_4]]
;
%i.2 = sub i32 %g, %h
%i.4 = icmp ne i32 %i.2, %g
ret i1 %i.4
}
define i1 @test21(i32 %g, i32 %h) {
; CHECK-LABEL: @test21(
; CHECK-NEXT: [[I_4:%.*]] = icmp ne i32 [[H:%.*]], 0
; CHECK-NEXT: ret i1 [[I_4]]
;
%i.2 = sub i32 %g, %h
%i.4 = icmp ne i32 %i.2, %g
ret i1 %i.4
}
; PR2298
define zeroext i1 @test22(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: @test22(
; CHECK-NEXT: [[I5:%.*]] = icmp eq i32 [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[I5]]
;
%i2 = sub i32 0, %a
%i4 = sub i32 0, %b
%i5 = icmp eq i32 %i2, %i4
ret i1 %i5
}
define i32 @test26(i32 %x) {
; CHECK-LABEL: @test26(
; CHECK-NEXT: [[SHL_NEG:%.*]] = shl i32 -3, [[X:%.*]]
; CHECK-NEXT: ret i32 [[SHL_NEG]]
;
%shl = shl i32 3, %x
%neg = sub i32 0, %shl
ret i32 %neg
}
define i64 @test_neg_shl_sub(i64 %a, i64 %b) {
; CHECK-LABEL: @test_neg_shl_sub(
; CHECK-NEXT: [[SUB_NEG:%.*]] = sub i64 [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: [[MUL_NEG:%.*]] = shl i64 [[SUB_NEG]], 2
; CHECK-NEXT: ret i64 [[MUL_NEG]]
;
%sub = sub i64 %a, %b
%mul = shl i64 %sub, 2
%neg = sub i64 0, %mul
ret i64 %neg
}
define i64 @test_neg_shl_sub_extra_use1(i64 %a, i64 %b, i64* %p) {
; CHECK-LABEL: @test_neg_shl_sub_extra_use1(
; CHECK-NEXT: [[SUB:%.*]] = sub i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: store i64 [[SUB]], i64* [[P:%.*]], align 8
; CHECK-NEXT: [[MUL_NEG:%.*]] = mul i64 [[SUB]], -4
; CHECK-NEXT: ret i64 [[MUL_NEG]]
;
%sub = sub i64 %a, %b
store i64 %sub, i64* %p
%mul = shl i64 %sub, 2
%neg = sub i64 0, %mul
ret i64 %neg
}
define i64 @test_neg_shl_sub_extra_use2(i64 %a, i64 %b, i64* %p) {
; CHECK-LABEL: @test_neg_shl_sub_extra_use2(
; CHECK-NEXT: [[SUB:%.*]] = sub i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[MUL:%.*]] = shl i64 [[SUB]], 2
; CHECK-NEXT: store i64 [[MUL]], i64* [[P:%.*]], align 8
; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
; CHECK-NEXT: ret i64 [[NEG]]
;
%sub = sub i64 %a, %b
%mul = shl i64 %sub, 2
store i64 %mul, i64* %p
%neg = sub i64 0, %mul
ret i64 %neg
}
define i64 @test_neg_shl_div(i64 %a) {
; CHECK-LABEL: @test_neg_shl_div(
; CHECK-NEXT: [[DIV_NEG:%.*]] = sdiv i64 [[A:%.*]], -3
; CHECK-NEXT: [[SHL_NEG:%.*]] = shl i64 [[DIV_NEG]], 2
; CHECK-NEXT: ret i64 [[SHL_NEG]]
;
%div = sdiv i64 %a, 3
%shl = shl i64 %div, 2
%neg = sub i64 0, %shl
ret i64 %neg
}
define i64 @test_neg_shl_zext_i1(i1 %a, i64 %b) {
; CHECK-LABEL: @test_neg_shl_zext_i1(
; CHECK-NEXT: [[EXT_NEG:%.*]] = sext i1 [[A:%.*]] to i64
; CHECK-NEXT: [[SHL_NEG:%.*]] = shl i64 [[EXT_NEG]], [[B:%.*]]
; CHECK-NEXT: ret i64 [[SHL_NEG]]
;
%ext = zext i1 %a to i64
%shl = shl i64 %ext, %b
%neg = sub i64 0, %shl
ret i64 %neg
}
define i64 @test_neg_shl_sext_i1(i1 %a, i64 %b) {
; CHECK-LABEL: @test_neg_shl_sext_i1(
; CHECK-NEXT: [[EXT_NEG:%.*]] = zext i1 [[A:%.*]] to i64
; CHECK-NEXT: [[SHL_NEG:%.*]] = shl i64 [[EXT_NEG]], [[B:%.*]]
; CHECK-NEXT: ret i64 [[SHL_NEG]]
;
%ext = sext i1 %a to i64
%shl = shl i64 %ext, %b
%neg = sub i64 0, %shl
ret i64 %neg
}
define i64 @test_neg_zext_i1_extra_use(i1 %a, i64 %b, i64* %p) {
; CHECK-LABEL: @test_neg_zext_i1_extra_use(
; CHECK-NEXT: [[EXT_NEG:%.*]] = sext i1 [[A:%.*]] to i64
; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[A]] to i64
; CHECK-NEXT: store i64 [[EXT]], i64* [[P:%.*]], align 8
; CHECK-NEXT: ret i64 [[EXT_NEG]]
;
%ext = zext i1 %a to i64
%neg = sub i64 0, %ext
store i64 %ext, i64* %p
ret i64 %neg
}
define i64 @test_neg_sext_i1_extra_use(i1 %a, i64 %b, i64* %p) {
; CHECK-LABEL: @test_neg_sext_i1_extra_use(
; CHECK-NEXT: [[EXT_NEG:%.*]] = zext i1 [[A:%.*]] to i64
; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[A]] to i64
; CHECK-NEXT: store i64 [[EXT]], i64* [[P:%.*]], align 8
; CHECK-NEXT: ret i64 [[EXT_NEG]]
;
%ext = sext i1 %a to i64
%neg = sub i64 0, %ext
store i64 %ext, i64* %p
ret i64 %neg
}
define i32 @test_neg_trunc_shl_sub(i64 %a, i64 %b) {
; CHECK-LABEL: @test_neg_trunc_shl_sub(
; CHECK-NEXT: [[SUB_NEG:%.*]] = sub i64 [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: [[SUB_TR_NEG:%.*]] = trunc i64 [[SUB_NEG]] to i32
; CHECK-NEXT: [[TRUNC_NEG:%.*]] = shl i32 [[SUB_TR_NEG]], 2
; CHECK-NEXT: ret i32 [[TRUNC_NEG]]
;
%sub = sub i64 %a, %b
%shl = shl i64 %sub, 2
%trunc = trunc i64 %shl to i32
%neg = sub i32 0, %trunc
ret i32 %neg
}
define i32 @test_neg_trunc_shl_ashr(i64 %a, i64 %b) {
; CHECK-LABEL: @test_neg_trunc_shl_ashr(
; CHECK-NEXT: [[SHR_NEG:%.*]] = lshr i64 [[A:%.*]], 63
; CHECK-NEXT: [[SHL_NEG:%.*]] = shl i64 [[SHR_NEG]], [[B:%.*]]
; CHECK-NEXT: [[TRUNC_NEG:%.*]] = trunc i64 [[SHL_NEG]] to i32
; CHECK-NEXT: ret i32 [[TRUNC_NEG]]
;
%shr = ashr i64 %a, 63
%shl = shl i64 %shr, %b
%trunc = trunc i64 %shl to i32
%neg = sub i32 0, %trunc
ret i32 %neg
}
define i32 @test_neg_trunc_shl_lshr(i64 %a, i64 %b) {
; CHECK-LABEL: @test_neg_trunc_shl_lshr(
; CHECK-NEXT: [[SHR_NEG:%.*]] = ashr i64 [[A:%.*]], 63
; CHECK-NEXT: [[SHL_NEG:%.*]] = shl i64 [[SHR_NEG]], [[B:%.*]]
; CHECK-NEXT: [[TRUNC_NEG:%.*]] = trunc i64 [[SHL_NEG]] to i32
; CHECK-NEXT: ret i32 [[TRUNC_NEG]]
;
%shr = lshr i64 %a, 63
%shl = shl i64 %shr, %b
%trunc = trunc i64 %shl to i32
%neg = sub i32 0, %trunc
ret i32 %neg
}
define i64 @test_neg_mul_sub(i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: @test_neg_mul_sub(
; CHECK-NEXT: [[SUB_NEG:%.*]] = sub i64 [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: [[MUL_NEG:%.*]] = mul i64 [[SUB_NEG]], [[C:%.*]]
; CHECK-NEXT: ret i64 [[MUL_NEG]]
;
%sub = sub i64 %a, %b
%mul = mul i64 %sub, %c
%neg = sub i64 0, %mul
ret i64 %neg
}
define i64 @test_neg_mul_sub_commuted(i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: @test_neg_mul_sub_commuted(
; CHECK-NEXT: [[COMPLEX:%.*]] = mul i64 [[C:%.*]], [[C]]
; CHECK-NEXT: [[SUB_NEG:%.*]] = sub i64 [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: [[MUL_NEG:%.*]] = mul i64 [[SUB_NEG]], [[COMPLEX]]
; CHECK-NEXT: ret i64 [[MUL_NEG]]
;
%complex = mul i64 %c, %c
%sub = sub i64 %a, %b
%mul = mul i64 %complex, %sub
%neg = sub i64 0, %mul
ret i64 %neg
}
define i32 @test27(i32 %x, i32 %y) {
; CHECK-LABEL: @test27(
; CHECK-NEXT: [[MUL_NEG:%.*]] = shl i32 [[Y:%.*]], 3
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[MUL_NEG]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[SUB]]
;
%mul = mul i32 %y, -8
%sub = sub i32 %x, %mul
ret i32 %sub
}
define <2 x i32> @test27vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @test27vec(
; CHECK-NEXT: [[MUL_NEG:%.*]] = mul <2 x i32> [[Y:%.*]], <i32 8, i32 6>
; CHECK-NEXT: [[SUB:%.*]] = add <2 x i32> [[MUL_NEG]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[SUB]]
;
%mul = mul <2 x i32> %y, <i32 -8, i32 -6>
%sub = sub <2 x i32> %x, %mul
ret <2 x i32> %sub
}
define <2 x i32> @test27vecsplat(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @test27vecsplat(
; CHECK-NEXT: [[MUL_NEG:%.*]] = shl <2 x i32> [[Y:%.*]], <i32 3, i32 3>
; CHECK-NEXT: [[SUB:%.*]] = add <2 x i32> [[MUL_NEG]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[SUB]]
;
%mul = mul <2 x i32> %y, <i32 -8, i32 -8>
%sub = sub <2 x i32> %x, %mul
ret <2 x i32> %sub
}
define <2 x i32> @test27vecmixed(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @test27vecmixed(
; CHECK-NEXT: [[MUL_NEG:%.*]] = mul <2 x i32> [[Y:%.*]], <i32 8, i32 -8>
; CHECK-NEXT: [[SUB:%.*]] = add <2 x i32> [[MUL_NEG]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[SUB]]
;
%mul = mul <2 x i32> %y, <i32 -8, i32 8>
%sub = sub <2 x i32> %x, %mul
ret <2 x i32> %sub
}
define i32 @test27commuted(i32 %x, i32 %y) {
; CHECK-LABEL: @test27commuted(
; CHECK-NEXT: [[MUL_NEG:%.*]] = shl i32 [[Y:%.*]], 3
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[MUL_NEG]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[SUB]]
;
%mul = mul i32 -8, %y
%sub = sub i32 %x, %mul
ret i32 %sub
}
define <2 x i32> @test27commutedvec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @test27commutedvec(
; CHECK-NEXT: [[MUL_NEG:%.*]] = mul <2 x i32> [[Y:%.*]], <i32 8, i32 6>
; CHECK-NEXT: [[SUB:%.*]] = add <2 x i32> [[MUL_NEG]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[SUB]]
;
%mul = mul <2 x i32> <i32 -8, i32 -6>, %y
%sub = sub <2 x i32> %x, %mul
ret <2 x i32> %sub
}
define <2 x i32> @test27commutedvecsplat(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @test27commutedvecsplat(
; CHECK-NEXT: [[MUL_NEG:%.*]] = shl <2 x i32> [[Y:%.*]], <i32 3, i32 3>
; CHECK-NEXT: [[SUB:%.*]] = add <2 x i32> [[MUL_NEG]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[SUB]]
;
%mul = mul <2 x i32> <i32 -8, i32 -8>, %y
%sub = sub <2 x i32> %x, %mul
ret <2 x i32> %sub
}
define <2 x i32> @test27commutedvecmixed(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @test27commutedvecmixed(
; CHECK-NEXT: [[MUL_NEG:%.*]] = mul <2 x i32> [[Y:%.*]], <i32 8, i32 -8>
; CHECK-NEXT: [[SUB:%.*]] = add <2 x i32> [[MUL_NEG]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i32> [[SUB]]
;
%mul = mul <2 x i32> <i32 -8, i32 8>, %y
%sub = sub <2 x i32> %x, %mul
ret <2 x i32> %sub
}
define i32 @test28(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @test28(
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[Z:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[TMP1]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[SUB]]
;
%neg = sub i32 0, %z
%mul = mul i32 %neg, %y
%sub = sub i32 %x, %mul
ret i32 %sub
}
define i32 @test28commuted(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @test28commuted(
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[Z:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[TMP1]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[SUB]]
;
%neg = sub i32 0, %z
%mul = mul i32 %y, %neg
%sub = sub i32 %x, %mul
ret i32 %sub
}
define <2 x i64> @test31(<2 x i64> %A) {
; CHECK-LABEL: @test31(
; CHECK-NEXT: [[SUB:%.*]] = add <2 x i64> [[A:%.*]], <i64 3, i64 4>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
%xor = xor <2 x i64> %A, <i64 -1, i64 -1>
%sub = sub <2 x i64> <i64 2, i64 3>, %xor
ret <2 x i64> %sub
}
define <2 x i64> @test32(<2 x i64> %A) {
; CHECK-LABEL: @test32(
; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i64> <i64 3, i64 4>, [[A:%.*]]
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
%add = add <2 x i64> %A, <i64 -1, i64 -1>
%sub = sub <2 x i64> <i64 2, i64 3>, %add
ret <2 x i64> %sub
}
define <2 x i64> @test35(<2 x i64> %A) {
; CHECK-LABEL: @test35(
; CHECK-NEXT: [[SUB:%.*]] = mul <2 x i64> [[A:%.*]], <i64 -2, i64 -3>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
%mul = mul <2 x i64> %A, <i64 3, i64 4>
%sub = sub <2 x i64> %A, %mul
ret <2 x i64> %sub
}
define <2 x i64> @test36(<2 x i64> %A) {
; CHECK-LABEL: @test36(
; CHECK-NEXT: [[SUB:%.*]] = mul <2 x i64> [[A:%.*]], <i64 7, i64 15>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
%shl = shl <2 x i64> %A, <i64 3, i64 4>
%sub = sub <2 x i64> %shl, %A
ret <2 x i64> %sub
}
define <2 x i32> @test37(<2 x i32> %A) {
; CHECK-LABEL: @test37(
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[A:%.*]], <i32 -2147483648, i32 -2147483648>
; CHECK-NEXT: [[DIV_NEG:%.*]] = sext <2 x i1> [[TMP1]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[DIV_NEG]]
;
%div = sdiv <2 x i32> %A, <i32 -2147483648, i32 -2147483648>
%sub = sub nsw <2 x i32> zeroinitializer, %div
ret <2 x i32> %sub
}
define i32 @test38(i32 %A) {
; CHECK-LABEL: @test38(
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[A:%.*]], -2147483648
; CHECK-NEXT: [[DIV_NEG:%.*]] = sext i1 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[DIV_NEG]]
;
%div = sdiv i32 %A, -2147483648
%sub = sub nsw i32 0, %div
ret i32 %sub
}
define i16 @test40(i16 %a, i16 %b) {
; CHECK-LABEL: @test40(
; CHECK-NEXT: [[ASHR:%.*]] = ashr i16 [[A:%.*]], 1
; CHECK-NEXT: [[ASHR1:%.*]] = ashr i16 [[B:%.*]], 1
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i16 [[ASHR]], [[ASHR1]]
; CHECK-NEXT: ret i16 [[SUB]]
;
%ashr = ashr i16 %a, 1
%ashr1 = ashr i16 %b, 1
%sub = sub i16 %ashr, %ashr1
ret i16 %sub
}
define i32 @test41(i16 %a, i16 %b) {
; CHECK-LABEL: @test41(
; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[A:%.*]] to i32
; CHECK-NEXT: [[CONV1:%.*]] = sext i16 [[B:%.*]] to i32
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV1]]
; CHECK-NEXT: ret i32 [[SUB]]
;
%conv = sext i16 %a to i32
%conv1 = sext i16 %b to i32
%sub = sub i32 %conv, %conv1
ret i32 %sub
}
define i4 @test42(i4 %x, i4 %y) {
; CHECK-LABEL: @test42(
; CHECK-NEXT: [[A:%.*]] = and i4 [[Y:%.*]], 7
; CHECK-NEXT: [[B:%.*]] = and i4 [[X:%.*]], 7
; CHECK-NEXT: [[C:%.*]] = sub nsw i4 [[A]], [[B]]
; CHECK-NEXT: ret i4 [[C]]
;
%a = and i4 %y, 7
%b = and i4 %x, 7
%c = sub i4 %a, %b
ret i4 %c
}
define i4 @test43(i4 %x, i4 %y) {
; CHECK-LABEL: @test43(
; CHECK-NEXT: [[A:%.*]] = or i4 [[X:%.*]], -8
; CHECK-NEXT: [[B:%.*]] = and i4 [[Y:%.*]], 7
; CHECK-NEXT: [[C:%.*]] = sub nuw i4 [[A]], [[B]]
; CHECK-NEXT: ret i4 [[C]]
;
%a = or i4 %x, -8
%b = and i4 %y, 7
%c = sub i4 %a, %b
ret i4 %c
}
define i32 @test44(i32 %x) {
; CHECK-LABEL: @test44(
; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[X:%.*]], -32768
; CHECK-NEXT: ret i32 [[SUB]]
;
%sub = sub nsw i32 %x, 32768
ret i32 %sub
}
define i32 @test45(i32 %x, i32 %y) {
; CHECK-LABEL: @test45(
; CHECK-NEXT: [[SUB:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i32 [[SUB]]
;
%or = or i32 %x, %y
%xor = xor i32 %x, %y
%sub = sub i32 %or, %xor
ret i32 %sub
}
define i32 @test45commuted(i32 %x, i32 %y) {
; CHECK-LABEL: @test45commuted(
; CHECK-NEXT: [[SUB:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[SUB]]
;
%or = or i32 %x, %y
%xor = xor i32 %y, %x
%sub = sub i32 %or, %xor
ret i32 %sub
}
define i32 @test46(i32 %x, i32 %y) {
; CHECK-LABEL: @test46(
; CHECK-NEXT: [[X_NOT:%.*]] = xor i32 [[X:%.*]], -1
; CHECK-NEXT: [[SUB:%.*]] = and i32 [[X_NOT]], [[Y:%.*]]
; CHECK-NEXT: ret i32 [[SUB]]
;
%or = or i32 %x, %y
%sub = sub i32 %or, %x
ret i32 %sub
}
define i32 @test46commuted(i32 %x, i32 %y) {
; CHECK-LABEL: @test46commuted(
; CHECK-NEXT: [[X_NOT:%.*]] = xor i32 [[X:%.*]], -1
; CHECK-NEXT: [[SUB:%.*]] = and i32 [[X_NOT]], [[Y:%.*]]
; CHECK-NEXT: ret i32 [[SUB]]
;
%or = or i32 %y, %x
%sub = sub i32 %or, %x
ret i32 %sub
}
define i32 @test47(i1 %A, i32 %B, i32 %C, i32 %D) {
; CHECK-LABEL: @test47(
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[D:%.*]], [[C:%.*]]
; CHECK-NEXT: [[SUB:%.*]] = select i1 [[A:%.*]], i32 [[TMP1]], i32 0
; CHECK-NEXT: ret i32 [[SUB]]
;
%sel0 = select i1 %A, i32 %D, i32 %B
%sel1 = select i1 %A, i32 %C, i32 %B
%sub = sub i32 %sel0, %sel1
ret i32 %sub
}
define i32 @test48(i1 %A, i32 %B, i32 %C, i32 %D) {
; CHECK-LABEL: @test48(
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[D:%.*]], [[C:%.*]]
; CHECK-NEXT: [[SUB:%.*]] = select i1 [[A:%.*]], i32 0, i32 [[TMP1]]
; CHECK-NEXT: ret i32 [[SUB]]
;
%sel0 = select i1 %A, i32 %B, i32 %D
%sel1 = select i1 %A, i32 %B, i32 %C
%sub = sub i32 %sel0, %sel1
ret i32 %sub
}
define i32 @test49(i32 %X) {
; CHECK-LABEL: @test49(
; CHECK-NEXT: [[SUB:%.*]] = sub i32 1, [[X:%.*]]
; CHECK-NEXT: [[RES:%.*]] = and i32 [[SUB]], 64
; CHECK-NEXT: ret i32 [[RES]]
;
%sub = sub i32 129, %X
%res = and i32 %sub, 64
ret i32 %res
}
define i32 @test50(i32 %X) {
; CHECK-LABEL: @test50(
; CHECK-NEXT: [[SUB:%.*]] = sub i32 1, [[X:%.*]]
; CHECK-NEXT: [[RES:%.*]] = and i32 [[SUB]], 127
; CHECK-NEXT: ret i32 [[RES]]
;
%sub = sub i32 129, %X
%res = and i32 %sub, 127
ret i32 %res
}
define i32 @test51(i32 %X) {
; CHECK-LABEL: @test51(
; CHECK-NEXT: [[SUB:%.*]] = sub i32 126, [[X:%.*]]
; CHECK-NEXT: [[RES:%.*]] = and i32 [[SUB]], 64
; CHECK-NEXT: ret i32 [[RES]]
;
%sub = sub i32 254, %X
%res = and i32 %sub, 64
ret i32 %res
}
define i32 @test52(i32 %X) {
; CHECK-LABEL: @test52(
; CHECK-NEXT: [[SUB:%.*]] = sub i32 126, [[X:%.*]]
; CHECK-NEXT: [[RES:%.*]] = and i32 [[SUB]], 127
; CHECK-NEXT: ret i32 [[RES]]
;
%sub = sub i32 254, %X
%res = and i32 %sub, 127
ret i32 %res
}
define <2 x i1> @test53(<2 x i1> %A, <2 x i1> %B) {
; CHECK-LABEL: @test53(
; CHECK-NEXT: [[SUB:%.*]] = xor <2 x i1> [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: ret <2 x i1> [[SUB]]
;
%sub = sub <2 x i1> %A, %B
ret <2 x i1> %sub
}
define i32 @test54(i1 %C) {
; CHECK-LABEL: @test54(
; CHECK-NEXT: [[V:%.*]] = select i1 [[C:%.*]], i32 -877, i32 113
; CHECK-NEXT: ret i32 [[V]]
;
%A = select i1 %C, i32 1000, i32 10
%V = sub i32 123, %A
ret i32 %V
}
define <2 x i32> @test54vec(i1 %C) {
; CHECK-LABEL: @test54vec(
; CHECK-NEXT: [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 -877, i32 -877>, <2 x i32> <i32 113, i32 113>
; CHECK-NEXT: ret <2 x i32> [[V]]
;
%A = select i1 %C, <2 x i32> <i32 1000, i32 1000>, <2 x i32> <i32 10, i32 10>
%V = sub <2 x i32> <i32 123, i32 123>, %A
ret <2 x i32> %V
}
define <2 x i32> @test54vec2(i1 %C) {
; CHECK-LABEL: @test54vec2(
; CHECK-NEXT: [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 -877, i32 -2167>, <2 x i32> <i32 113, i32 303>
; CHECK-NEXT: ret <2 x i32> [[V]]
;
%A = select i1 %C, <2 x i32> <i32 1000, i32 2500>, <2 x i32> <i32 10, i32 30>
%V = sub <2 x i32> <i32 123, i32 333>, %A
ret <2 x i32> %V
}
define i32 @test55(i1 %which) {
; CHECK-LABEL: @test55(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
; CHECK: delay:
; CHECK-NEXT: br label [[FINAL]]
; CHECK: final:
; CHECK-NEXT: [[A_NEG:%.*]] = phi i32 [ -877, [[ENTRY:%.*]] ], [ 113, [[DELAY]] ]
; CHECK-NEXT: ret i32 [[A_NEG]]
;
entry:
br i1 %which, label %final, label %delay
delay:
br label %final
final: