/
Writer.cpp
2544 lines (2186 loc) · 90.9 KB
/
Writer.cpp
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//===- Writer.cpp ---------------------------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#include "Writer.h"
#include "AArch64ErrataFix.h"
#include "CallGraphSort.h"
#include "Config.h"
#include "Filesystem.h"
#include "LinkerScript.h"
#include "MapFile.h"
#include "OutputSections.h"
#include "Relocations.h"
#include "SymbolTable.h"
#include "Symbols.h"
#include "SyntheticSections.h"
#include "Target.h"
#include "lld/Common/Memory.h"
#include "lld/Common/Strings.h"
#include "lld/Common/Threads.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringSwitch.h"
#include <climits>
using namespace llvm;
using namespace llvm::ELF;
using namespace llvm::object;
using namespace llvm::support;
using namespace llvm::support::endian;
using namespace lld;
using namespace lld::elf;
namespace {
// The writer writes a SymbolTable result to a file.
template <class ELFT> class Writer {
public:
Writer() : Buffer(errorHandler().OutputBuffer) {}
typedef typename ELFT::Shdr Elf_Shdr;
typedef typename ELFT::Ehdr Elf_Ehdr;
typedef typename ELFT::Phdr Elf_Phdr;
void run();
private:
void copyLocalSymbols();
void addSectionSymbols();
void forEachRelSec(llvm::function_ref<void(InputSectionBase &)> Fn);
void sortSections();
void resolveShfLinkOrder();
void maybeAddThunks();
void sortInputSections();
void finalizeSections();
void checkExecuteOnly();
void setReservedSymbolSections();
std::vector<PhdrEntry *> createPhdrs();
void removeEmptyPTLoad();
void addPtArmExid(std::vector<PhdrEntry *> &Phdrs);
void assignFileOffsets();
void assignFileOffsetsBinary();
void setPhdrs();
void checkSections();
void fixSectionAlignments();
void openFile();
void writeTrapInstr();
void writeHeader();
void writeSections();
void writeSectionsBinary();
void writeBuildId();
std::unique_ptr<FileOutputBuffer> &Buffer;
void addRelIpltSymbols();
void addStartEndSymbols();
void addStartStopSymbols(OutputSection *Sec);
std::vector<PhdrEntry *> Phdrs;
uint64_t FileSize;
uint64_t SectionHeaderOff;
};
} // anonymous namespace
static bool isSectionPrefix(StringRef Prefix, StringRef Name) {
return Name.startswith(Prefix) || Name == Prefix.drop_back();
}
StringRef elf::getOutputSectionName(const InputSectionBase *S) {
if (Config->Relocatable)
return S->Name;
// This is for --emit-relocs. If .text.foo is emitted as .text.bar, we want
// to emit .rela.text.foo as .rela.text.bar for consistency (this is not
// technically required, but not doing it is odd). This code guarantees that.
if (auto *IS = dyn_cast<InputSection>(S)) {
if (InputSectionBase *Rel = IS->getRelocatedSection()) {
OutputSection *Out = Rel->getOutputSection();
if (S->Type == SHT_RELA)
return Saver.save(".rela" + Out->Name);
return Saver.save(".rel" + Out->Name);
}
}
// This check is for -z keep-text-section-prefix. This option separates text
// sections with prefix ".text.hot", ".text.unlikely", ".text.startup" or
// ".text.exit".
// When enabled, this allows identifying the hot code region (.text.hot) in
// the final binary which can be selectively mapped to huge pages or mlocked,
// for instance.
if (Config->ZKeepTextSectionPrefix)
for (StringRef V :
{".text.hot.", ".text.unlikely.", ".text.startup.", ".text.exit."})
if (isSectionPrefix(V, S->Name))
return V.drop_back();
for (StringRef V :
{".text.", ".rodata.", ".data.rel.ro.", ".data.", ".bss.rel.ro.",
".bss.", ".init_array.", ".fini_array.", ".ctors.", ".dtors.", ".tbss.",
".gcc_except_table.", ".tdata.", ".ARM.exidx.", ".ARM.extab."})
if (isSectionPrefix(V, S->Name))
return V.drop_back();
// CommonSection is identified as "COMMON" in linker scripts.
// By default, it should go to .bss section.
if (S->Name == "COMMON")
return ".bss";
return S->Name;
}
static bool needsInterpSection() {
return !SharedFiles.empty() && !Config->DynamicLinker.empty() &&
Script->needsInterpSection();
}
template <class ELFT> void elf::writeResult() { Writer<ELFT>().run(); }
template <class ELFT> void Writer<ELFT>::removeEmptyPTLoad() {
llvm::erase_if(Phdrs, [&](const PhdrEntry *P) {
if (P->p_type != PT_LOAD)
return false;
if (!P->FirstSec)
return true;
uint64_t Size = P->LastSec->Addr + P->LastSec->Size - P->FirstSec->Addr;
return Size == 0;
});
}
template <class ELFT> static void combineEhFrameSections() {
for (InputSectionBase *&S : InputSections) {
EhInputSection *ES = dyn_cast<EhInputSection>(S);
if (!ES || !ES->Live)
continue;
In.EhFrame->addSection<ELFT>(ES);
S = nullptr;
}
std::vector<InputSectionBase *> &V = InputSections;
V.erase(std::remove(V.begin(), V.end(), nullptr), V.end());
}
static Defined *addOptionalRegular(StringRef Name, SectionBase *Sec,
uint64_t Val, uint8_t StOther = STV_HIDDEN,
uint8_t Binding = STB_GLOBAL) {
Symbol *S = Symtab->find(Name);
if (!S || S->isDefined())
return nullptr;
return Symtab->addDefined(Name, StOther, STT_NOTYPE, Val,
/*Size=*/0, Binding, Sec,
/*File=*/nullptr);
}
static Defined *addAbsolute(StringRef Name) {
return Symtab->addDefined(Name, STV_HIDDEN, STT_NOTYPE, 0, 0, STB_GLOBAL,
nullptr, nullptr);
}
// The linker is expected to define some symbols depending on
// the linking result. This function defines such symbols.
void elf::addReservedSymbols() {
if (Config->EMachine == EM_MIPS) {
// Define _gp for MIPS. st_value of _gp symbol will be updated by Writer
// so that it points to an absolute address which by default is relative
// to GOT. Default offset is 0x7ff0.
// See "Global Data Symbols" in Chapter 6 in the following document:
// ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
ElfSym::MipsGp = addAbsolute("_gp");
// On MIPS O32 ABI, _gp_disp is a magic symbol designates offset between
// start of function and 'gp' pointer into GOT.
if (Symtab->find("_gp_disp"))
ElfSym::MipsGpDisp = addAbsolute("_gp_disp");
// The __gnu_local_gp is a magic symbol equal to the current value of 'gp'
// pointer. This symbol is used in the code generated by .cpload pseudo-op
// in case of using -mno-shared option.
// https://sourceware.org/ml/binutils/2004-12/msg00094.html
if (Symtab->find("__gnu_local_gp"))
ElfSym::MipsLocalGp = addAbsolute("__gnu_local_gp");
}
// The Power Architecture 64-bit v2 ABI defines a TableOfContents (TOC) which
// combines the typical ELF GOT with the small data sections. It commonly
// includes .got .toc .sdata .sbss. The .TOC. symbol replaces both
// _GLOBAL_OFFSET_TABLE_ and _SDA_BASE_ from the 32-bit ABI. It is used to
// represent the TOC base which is offset by 0x8000 bytes from the start of
// the .got section.
// We do not allow _GLOBAL_OFFSET_TABLE_ to be defined by input objects as the
// correctness of some relocations depends on its value.
StringRef GotTableSymName =
(Config->EMachine == EM_PPC64) ? ".TOC." : "_GLOBAL_OFFSET_TABLE_";
if (Symbol *S = Symtab->find(GotTableSymName)) {
if (S->isDefined())
error(toString(S->File) + " cannot redefine linker defined symbol '" +
GotTableSymName + "'");
else
ElfSym::GlobalOffsetTable = Symtab->addDefined(
GotTableSymName, STV_HIDDEN, STT_NOTYPE, Target->GotBaseSymOff,
/*Size=*/0, STB_GLOBAL, Out::ElfHeader,
/*File=*/nullptr);
}
// __ehdr_start is the location of ELF file headers. Note that we define
// this symbol unconditionally even when using a linker script, which
// differs from the behavior implemented by GNU linker which only define
// this symbol if ELF headers are in the memory mapped segment.
addOptionalRegular("__ehdr_start", Out::ElfHeader, 0, STV_HIDDEN);
// __executable_start is not documented, but the expectation of at
// least the Android libc is that it points to the ELF header.
addOptionalRegular("__executable_start", Out::ElfHeader, 0, STV_HIDDEN);
// __dso_handle symbol is passed to cxa_finalize as a marker to identify
// each DSO. The address of the symbol doesn't matter as long as they are
// different in different DSOs, so we chose the start address of the DSO.
addOptionalRegular("__dso_handle", Out::ElfHeader, 0, STV_HIDDEN);
// If linker script do layout we do not need to create any standart symbols.
if (Script->HasSectionsCommand)
return;
auto Add = [](StringRef S, int64_t Pos) {
return addOptionalRegular(S, Out::ElfHeader, Pos, STV_DEFAULT);
};
ElfSym::Bss = Add("__bss_start", 0);
ElfSym::End1 = Add("end", -1);
ElfSym::End2 = Add("_end", -1);
ElfSym::Etext1 = Add("etext", -1);
ElfSym::Etext2 = Add("_etext", -1);
ElfSym::Edata1 = Add("edata", -1);
ElfSym::Edata2 = Add("_edata", -1);
}
static OutputSection *findSection(StringRef Name) {
for (BaseCommand *Base : Script->SectionCommands)
if (auto *Sec = dyn_cast<OutputSection>(Base))
if (Sec->Name == Name)
return Sec;
return nullptr;
}
// Initialize Out members.
template <class ELFT> static void createSyntheticSections() {
// Initialize all pointers with NULL. This is needed because
// you can call lld::elf::main more than once as a library.
memset(&Out::First, 0, sizeof(Out));
auto Add = [](InputSectionBase *Sec) { InputSections.push_back(Sec); };
In.DynStrTab = make<StringTableSection>(".dynstr", true);
In.Dynamic = make<DynamicSection<ELFT>>();
if (Config->AndroidPackDynRelocs) {
In.RelaDyn = make<AndroidPackedRelocationSection<ELFT>>(
Config->IsRela ? ".rela.dyn" : ".rel.dyn");
} else {
In.RelaDyn = make<RelocationSection<ELFT>>(
Config->IsRela ? ".rela.dyn" : ".rel.dyn", Config->ZCombreloc);
}
In.ShStrTab = make<StringTableSection>(".shstrtab", false);
Out::ProgramHeaders = make<OutputSection>("", 0, SHF_ALLOC);
Out::ProgramHeaders->Alignment = Config->Wordsize;
if (needsInterpSection()) {
In.Interp = createInterpSection();
Add(In.Interp);
}
if (Config->Strip != StripPolicy::All) {
In.StrTab = make<StringTableSection>(".strtab", false);
In.SymTab = make<SymbolTableSection<ELFT>>(*In.StrTab);
In.SymTabShndx = make<SymtabShndxSection>();
}
if (Config->BuildId != BuildIdKind::None) {
In.BuildId = make<BuildIdSection>();
Add(In.BuildId);
}
In.Bss = make<BssSection>(".bss", 0, 1);
Add(In.Bss);
// If there is a SECTIONS command and a .data.rel.ro section name use name
// .data.rel.ro.bss so that we match in the .data.rel.ro output section.
// This makes sure our relro is contiguous.
bool HasDataRelRo = Script->HasSectionsCommand && findSection(".data.rel.ro");
In.BssRelRo =
make<BssSection>(HasDataRelRo ? ".data.rel.ro.bss" : ".bss.rel.ro", 0, 1);
Add(In.BssRelRo);
// Add MIPS-specific sections.
if (Config->EMachine == EM_MIPS) {
if (!Config->Shared && Config->HasDynSymTab) {
In.MipsRldMap = make<MipsRldMapSection>();
Add(In.MipsRldMap);
}
if (auto *Sec = MipsAbiFlagsSection<ELFT>::create())
Add(Sec);
if (auto *Sec = MipsOptionsSection<ELFT>::create())
Add(Sec);
if (auto *Sec = MipsReginfoSection<ELFT>::create())
Add(Sec);
}
if (Config->HasDynSymTab) {
In.DynSymTab = make<SymbolTableSection<ELFT>>(*In.DynStrTab);
Add(In.DynSymTab);
InX<ELFT>::VerSym = make<VersionTableSection<ELFT>>();
Add(InX<ELFT>::VerSym);
if (!Config->VersionDefinitions.empty()) {
In.VerDef = make<VersionDefinitionSection>();
Add(In.VerDef);
}
InX<ELFT>::VerNeed = make<VersionNeedSection<ELFT>>();
Add(InX<ELFT>::VerNeed);
if (Config->GnuHash) {
In.GnuHashTab = make<GnuHashTableSection>();
Add(In.GnuHashTab);
}
if (Config->SysvHash) {
In.HashTab = make<HashTableSection>();
Add(In.HashTab);
}
Add(In.Dynamic);
Add(In.DynStrTab);
Add(In.RelaDyn);
}
if (Config->RelrPackDynRelocs) {
In.RelrDyn = make<RelrSection<ELFT>>();
Add(In.RelrDyn);
}
// Add .got. MIPS' .got is so different from the other archs,
// it has its own class.
if (Config->EMachine == EM_MIPS) {
In.MipsGot = make<MipsGotSection>();
Add(In.MipsGot);
} else {
In.Got = make<GotSection>();
Add(In.Got);
}
if (Config->EMachine == EM_PPC64) {
In.PPC64LongBranchTarget = make<PPC64LongBranchTargetSection>();
Add(In.PPC64LongBranchTarget);
}
In.GotPlt = make<GotPltSection>();
Add(In.GotPlt);
In.IgotPlt = make<IgotPltSection>();
Add(In.IgotPlt);
if (Config->GdbIndex) {
In.GdbIndex = GdbIndexSection::create<ELFT>();
Add(In.GdbIndex);
}
// We always need to add rel[a].plt to output if it has entries.
// Even for static linking it can contain R_[*]_IRELATIVE relocations.
In.RelaPlt = make<RelocationSection<ELFT>>(
Config->IsRela ? ".rela.plt" : ".rel.plt", false /*Sort*/);
Add(In.RelaPlt);
// The RelaIplt immediately follows .rel.plt (.rel.dyn for ARM) to ensure
// that the IRelative relocations are processed last by the dynamic loader.
// We cannot place the iplt section in .rel.dyn when Android relocation
// packing is enabled because that would cause a section type mismatch.
// However, because the Android dynamic loader reads .rel.plt after .rel.dyn,
// we can get the desired behaviour by placing the iplt section in .rel.plt.
In.RelaIplt = make<RelocationSection<ELFT>>(
(Config->EMachine == EM_ARM && !Config->AndroidPackDynRelocs)
? ".rel.dyn"
: In.RelaPlt->Name,
false /*Sort*/);
Add(In.RelaIplt);
In.Plt = make<PltSection>(false);
Add(In.Plt);
In.Iplt = make<PltSection>(true);
Add(In.Iplt);
// .note.GNU-stack is always added when we are creating a re-linkable
// object file. Other linkers are using the presence of this marker
// section to control the executable-ness of the stack area, but that
// is irrelevant these days. Stack area should always be non-executable
// by default. So we emit this section unconditionally.
if (Config->Relocatable)
Add(make<GnuStackSection>());
if (!Config->Relocatable) {
if (Config->EhFrameHdr) {
In.EhFrameHdr = make<EhFrameHeader>();
Add(In.EhFrameHdr);
}
In.EhFrame = make<EhFrameSection>();
Add(In.EhFrame);
}
if (In.SymTab)
Add(In.SymTab);
if (In.SymTabShndx)
Add(In.SymTabShndx);
Add(In.ShStrTab);
if (In.StrTab)
Add(In.StrTab);
if (Config->EMachine == EM_ARM && !Config->Relocatable)
// Add a sentinel to terminate .ARM.exidx. It helps an unwinder
// to find the exact address range of the last entry.
Add(make<ARMExidxSentinelSection>());
}
// The main function of the writer.
template <class ELFT> void Writer<ELFT>::run() {
// Create linker-synthesized sections such as .got or .plt.
// Such sections are of type input section.
createSyntheticSections<ELFT>();
if (!Config->Relocatable)
combineEhFrameSections<ELFT>();
// We want to process linker script commands. When SECTIONS command
// is given we let it create sections.
Script->processSectionCommands();
// Linker scripts controls how input sections are assigned to output sections.
// Input sections that were not handled by scripts are called "orphans", and
// they are assigned to output sections by the default rule. Process that.
Script->addOrphanSections();
if (Config->Discard != DiscardPolicy::All)
copyLocalSymbols();
if (Config->CopyRelocs)
addSectionSymbols();
// Now that we have a complete set of output sections. This function
// completes section contents. For example, we need to add strings
// to the string table, and add entries to .got and .plt.
// finalizeSections does that.
finalizeSections();
checkExecuteOnly();
if (errorCount())
return;
Script->assignAddresses();
// If -compressed-debug-sections is specified, we need to compress
// .debug_* sections. Do it right now because it changes the size of
// output sections.
for (OutputSection *Sec : OutputSections)
Sec->maybeCompress<ELFT>();
Script->allocateHeaders(Phdrs);
// Remove empty PT_LOAD to avoid causing the dynamic linker to try to mmap a
// 0 sized region. This has to be done late since only after assignAddresses
// we know the size of the sections.
removeEmptyPTLoad();
if (!Config->OFormatBinary)
assignFileOffsets();
else
assignFileOffsetsBinary();
setPhdrs();
if (Config->Relocatable)
for (OutputSection *Sec : OutputSections)
Sec->Addr = 0;
if (Config->CheckSections)
checkSections();
// It does not make sense try to open the file if we have error already.
if (errorCount())
return;
// Write the result down to a file.
openFile();
if (errorCount())
return;
if (!Config->OFormatBinary) {
writeTrapInstr();
writeHeader();
writeSections();
} else {
writeSectionsBinary();
}
// Backfill .note.gnu.build-id section content. This is done at last
// because the content is usually a hash value of the entire output file.
writeBuildId();
if (errorCount())
return;
// Handle -Map and -cref options.
writeMapFile();
writeCrossReferenceTable();
if (errorCount())
return;
if (auto E = Buffer->commit())
error("failed to write to the output file: " + toString(std::move(E)));
}
static bool shouldKeepInSymtab(SectionBase *Sec, StringRef SymName,
const Symbol &B) {
if (B.isSection())
return false;
if (Config->Discard == DiscardPolicy::None)
return true;
// In ELF assembly .L symbols are normally discarded by the assembler.
// If the assembler fails to do so, the linker discards them if
// * --discard-locals is used.
// * The symbol is in a SHF_MERGE section, which is normally the reason for
// the assembler keeping the .L symbol.
if (!SymName.startswith(".L") && !SymName.empty())
return true;
if (Config->Discard == DiscardPolicy::Locals)
return false;
return !Sec || !(Sec->Flags & SHF_MERGE);
}
static bool includeInSymtab(const Symbol &B) {
if (!B.isLocal() && !B.IsUsedInRegularObj)
return false;
if (auto *D = dyn_cast<Defined>(&B)) {
// Always include absolute symbols.
SectionBase *Sec = D->Section;
if (!Sec)
return true;
Sec = Sec->Repl;
// Exclude symbols pointing to garbage-collected sections.
if (isa<InputSectionBase>(Sec) && !Sec->Live)
return false;
if (auto *S = dyn_cast<MergeInputSection>(Sec))
if (!S->getSectionPiece(D->Value)->Live)
return false;
return true;
}
return B.Used;
}
// Local symbols are not in the linker's symbol table. This function scans
// each object file's symbol table to copy local symbols to the output.
template <class ELFT> void Writer<ELFT>::copyLocalSymbols() {
if (!In.SymTab)
return;
for (InputFile *File : ObjectFiles) {
ObjFile<ELFT> *F = cast<ObjFile<ELFT>>(File);
for (Symbol *B : F->getLocalSymbols()) {
if (!B->isLocal())
fatal(toString(F) +
": broken object: getLocalSymbols returns a non-local symbol");
auto *DR = dyn_cast<Defined>(B);
// No reason to keep local undefined symbol in symtab.
if (!DR)
continue;
if (!includeInSymtab(*B))
continue;
SectionBase *Sec = DR->Section;
if (!shouldKeepInSymtab(Sec, B->getName(), *B))
continue;
In.SymTab->addSymbol(B);
}
}
}
// Create a section symbol for each output section so that we can represent
// relocations that point to the section. If we know that no relocation is
// referring to a section (that happens if the section is a synthetic one), we
// don't create a section symbol for that section.
template <class ELFT> void Writer<ELFT>::addSectionSymbols() {
for (BaseCommand *Base : Script->SectionCommands) {
auto *Sec = dyn_cast<OutputSection>(Base);
if (!Sec)
continue;
auto I = llvm::find_if(Sec->SectionCommands, [](BaseCommand *Base) {
if (auto *ISD = dyn_cast<InputSectionDescription>(Base))
return !ISD->Sections.empty();
return false;
});
if (I == Sec->SectionCommands.end())
continue;
InputSection *IS = cast<InputSectionDescription>(*I)->Sections[0];
// Relocations are not using REL[A] section symbols.
if (IS->Type == SHT_REL || IS->Type == SHT_RELA)
continue;
// Unlike other synthetic sections, mergeable output sections contain data
// copied from input sections, and there may be a relocation pointing to its
// contents if -r or -emit-reloc are given.
if (isa<SyntheticSection>(IS) && !(IS->Flags & SHF_MERGE))
continue;
auto *Sym =
make<Defined>(IS->File, "", STB_LOCAL, /*StOther=*/0, STT_SECTION,
/*Value=*/0, /*Size=*/0, IS);
In.SymTab->addSymbol(Sym);
}
}
// Today's loaders have a feature to make segments read-only after
// processing dynamic relocations to enhance security. PT_GNU_RELRO
// is defined for that.
//
// This function returns true if a section needs to be put into a
// PT_GNU_RELRO segment.
static bool isRelroSection(const OutputSection *Sec) {
if (!Config->ZRelro)
return false;
uint64_t Flags = Sec->Flags;
// Non-allocatable or non-writable sections don't need RELRO because
// they are not writable or not even mapped to memory in the first place.
// RELRO is for sections that are essentially read-only but need to
// be writable only at process startup to allow dynamic linker to
// apply relocations.
if (!(Flags & SHF_ALLOC) || !(Flags & SHF_WRITE))
return false;
// Once initialized, TLS data segments are used as data templates
// for a thread-local storage. For each new thread, runtime
// allocates memory for a TLS and copy templates there. No thread
// are supposed to use templates directly. Thus, it can be in RELRO.
if (Flags & SHF_TLS)
return true;
// .init_array, .preinit_array and .fini_array contain pointers to
// functions that are executed on process startup or exit. These
// pointers are set by the static linker, and they are not expected
// to change at runtime. But if you are an attacker, you could do
// interesting things by manipulating pointers in .fini_array, for
// example. So they are put into RELRO.
uint32_t Type = Sec->Type;
if (Type == SHT_INIT_ARRAY || Type == SHT_FINI_ARRAY ||
Type == SHT_PREINIT_ARRAY)
return true;
// .got contains pointers to external symbols. They are resolved by
// the dynamic linker when a module is loaded into memory, and after
// that they are not expected to change. So, it can be in RELRO.
if (In.Got && Sec == In.Got->getParent())
return true;
// .toc is a GOT-ish section for PowerPC64. Their contents are accessed
// through r2 register, which is reserved for that purpose. Since r2 is used
// for accessing .got as well, .got and .toc need to be close enough in the
// virtual address space. Usually, .toc comes just after .got. Since we place
// .got into RELRO, .toc needs to be placed into RELRO too.
if (Sec->Name.equals(".toc"))
return true;
// .got.plt contains pointers to external function symbols. They are
// by default resolved lazily, so we usually cannot put it into RELRO.
// However, if "-z now" is given, the lazy symbol resolution is
// disabled, which enables us to put it into RELRO.
if (Sec == In.GotPlt->getParent())
return Config->ZNow;
// .dynamic section contains data for the dynamic linker, and
// there's no need to write to it at runtime, so it's better to put
// it into RELRO.
if (Sec == In.Dynamic->getParent())
return true;
// Sections with some special names are put into RELRO. This is a
// bit unfortunate because section names shouldn't be significant in
// ELF in spirit. But in reality many linker features depend on
// magic section names.
StringRef S = Sec->Name;
return S == ".data.rel.ro" || S == ".bss.rel.ro" || S == ".ctors" ||
S == ".dtors" || S == ".jcr" || S == ".eh_frame" ||
S == ".openbsd.randomdata";
}
// We compute a rank for each section. The rank indicates where the
// section should be placed in the file. Instead of using simple
// numbers (0,1,2...), we use a series of flags. One for each decision
// point when placing the section.
// Using flags has two key properties:
// * It is easy to check if a give branch was taken.
// * It is easy two see how similar two ranks are (see getRankProximity).
enum RankFlags {
RF_NOT_ADDR_SET = 1 << 18,
RF_NOT_ALLOC = 1 << 17,
RF_NOT_INTERP = 1 << 16,
RF_NOT_NOTE = 1 << 15,
RF_WRITE = 1 << 14,
RF_EXEC_WRITE = 1 << 13,
RF_EXEC = 1 << 12,
RF_RODATA = 1 << 11,
RF_NON_TLS_BSS = 1 << 10,
RF_NON_TLS_BSS_RO = 1 << 9,
RF_NOT_TLS = 1 << 8,
RF_BSS = 1 << 7,
RF_PPC_NOT_TOCBSS = 1 << 6,
RF_PPC_TOCL = 1 << 5,
RF_PPC_TOC = 1 << 4,
RF_PPC_GOT = 1 << 3,
RF_PPC_BRANCH_LT = 1 << 2,
RF_MIPS_GPREL = 1 << 1,
RF_MIPS_NOT_GOT = 1 << 0
};
static unsigned getSectionRank(const OutputSection *Sec) {
unsigned Rank = 0;
// We want to put section specified by -T option first, so we
// can start assigning VA starting from them later.
if (Config->SectionStartMap.count(Sec->Name))
return Rank;
Rank |= RF_NOT_ADDR_SET;
// Allocatable sections go first to reduce the total PT_LOAD size and
// so debug info doesn't change addresses in actual code.
if (!(Sec->Flags & SHF_ALLOC))
return Rank | RF_NOT_ALLOC;
// Put .interp first because some loaders want to see that section
// on the first page of the executable file when loaded into memory.
if (Sec->Name == ".interp")
return Rank;
Rank |= RF_NOT_INTERP;
// Put .note sections (which make up one PT_NOTE) at the beginning so that
// they are likely to be included in a core file even if core file size is
// limited. In particular, we want a .note.gnu.build-id and a .note.tag to be
// included in a core to match core files with executables.
if (Sec->Type == SHT_NOTE)
return Rank;
Rank |= RF_NOT_NOTE;
// Sort sections based on their access permission in the following
// order: R, RX, RWX, RW. This order is based on the following
// considerations:
// * Read-only sections come first such that they go in the
// PT_LOAD covering the program headers at the start of the file.
// * Read-only, executable sections come next.
// * Writable, executable sections follow such that .plt on
// architectures where it needs to be writable will be placed
// between .text and .data.
// * Writable sections come last, such that .bss lands at the very
// end of the last PT_LOAD.
bool IsExec = Sec->Flags & SHF_EXECINSTR;
bool IsWrite = Sec->Flags & SHF_WRITE;
if (IsExec) {
if (IsWrite)
Rank |= RF_EXEC_WRITE;
else
Rank |= RF_EXEC;
} else if (IsWrite) {
Rank |= RF_WRITE;
} else if (Sec->Type == SHT_PROGBITS) {
// Make non-executable and non-writable PROGBITS sections (e.g .rodata
// .eh_frame) closer to .text. They likely contain PC or GOT relative
// relocations and there could be relocation overflow if other huge sections
// (.dynstr .dynsym) were placed in between.
Rank |= RF_RODATA;
}
// If we got here we know that both A and B are in the same PT_LOAD.
bool IsTls = Sec->Flags & SHF_TLS;
bool IsNoBits = Sec->Type == SHT_NOBITS;
// The first requirement we have is to put (non-TLS) nobits sections last. The
// reason is that the only thing the dynamic linker will see about them is a
// p_memsz that is larger than p_filesz. Seeing that it zeros the end of the
// PT_LOAD, so that has to correspond to the nobits sections.
bool IsNonTlsNoBits = IsNoBits && !IsTls;
if (IsNonTlsNoBits)
Rank |= RF_NON_TLS_BSS;
// We place nobits RelRo sections before plain r/w ones, and non-nobits RelRo
// sections after r/w ones, so that the RelRo sections are contiguous.
bool IsRelRo = isRelroSection(Sec);
if (IsNonTlsNoBits && !IsRelRo)
Rank |= RF_NON_TLS_BSS_RO;
if (!IsNonTlsNoBits && IsRelRo)
Rank |= RF_NON_TLS_BSS_RO;
// The TLS initialization block needs to be a single contiguous block in a R/W
// PT_LOAD, so stick TLS sections directly before the other RelRo R/W
// sections. The TLS NOBITS sections are placed here as they don't take up
// virtual address space in the PT_LOAD.
if (!IsTls)
Rank |= RF_NOT_TLS;
// Within the TLS initialization block, the non-nobits sections need to appear
// first.
if (IsNoBits)
Rank |= RF_BSS;
// Some architectures have additional ordering restrictions for sections
// within the same PT_LOAD.
if (Config->EMachine == EM_PPC64) {
// PPC64 has a number of special SHT_PROGBITS+SHF_ALLOC+SHF_WRITE sections
// that we would like to make sure appear is a specific order to maximize
// their coverage by a single signed 16-bit offset from the TOC base
// pointer. Conversely, the special .tocbss section should be first among
// all SHT_NOBITS sections. This will put it next to the loaded special
// PPC64 sections (and, thus, within reach of the TOC base pointer).
StringRef Name = Sec->Name;
if (Name != ".tocbss")
Rank |= RF_PPC_NOT_TOCBSS;
if (Name == ".toc1")
Rank |= RF_PPC_TOCL;
if (Name == ".toc")
Rank |= RF_PPC_TOC;
if (Name == ".got")
Rank |= RF_PPC_GOT;
if (Name == ".branch_lt")
Rank |= RF_PPC_BRANCH_LT;
}
if (Config->EMachine == EM_MIPS) {
// All sections with SHF_MIPS_GPREL flag should be grouped together
// because data in these sections is addressable with a gp relative address.
if (Sec->Flags & SHF_MIPS_GPREL)
Rank |= RF_MIPS_GPREL;
if (Sec->Name != ".got")
Rank |= RF_MIPS_NOT_GOT;
}
return Rank;
}
static bool compareSections(const BaseCommand *ACmd, const BaseCommand *BCmd) {
const OutputSection *A = cast<OutputSection>(ACmd);
const OutputSection *B = cast<OutputSection>(BCmd);
if (A->SortRank != B->SortRank)
return A->SortRank < B->SortRank;
if (!(A->SortRank & RF_NOT_ADDR_SET))
return Config->SectionStartMap.lookup(A->Name) <
Config->SectionStartMap.lookup(B->Name);
return false;
}
void PhdrEntry::add(OutputSection *Sec) {
LastSec = Sec;
if (!FirstSec)
FirstSec = Sec;
p_align = std::max(p_align, Sec->Alignment);
if (p_type == PT_LOAD)
Sec->PtLoad = this;
}
// The beginning and the ending of .rel[a].plt section are marked
// with __rel[a]_iplt_{start,end} symbols if it is a statically linked
// executable. The runtime needs these symbols in order to resolve
// all IRELATIVE relocs on startup. For dynamic executables, we don't
// need these symbols, since IRELATIVE relocs are resolved through GOT
// and PLT. For details, see http://www.airs.com/blog/archives/403.
template <class ELFT> void Writer<ELFT>::addRelIpltSymbols() {
if (Config->Relocatable || needsInterpSection())
return;
// By default, __rela_iplt_{start,end} belong to a dummy section 0
// because .rela.plt might be empty and thus removed from output.
// We'll override Out::ElfHeader with In.RelaIplt later when we are
// sure that .rela.plt exists in output.
ElfSym::RelaIpltStart = addOptionalRegular(
Config->IsRela ? "__rela_iplt_start" : "__rel_iplt_start",
Out::ElfHeader, 0, STV_HIDDEN, STB_WEAK);
ElfSym::RelaIpltEnd = addOptionalRegular(
Config->IsRela ? "__rela_iplt_end" : "__rel_iplt_end",
Out::ElfHeader, 0, STV_HIDDEN, STB_WEAK);
}
template <class ELFT>
void Writer<ELFT>::forEachRelSec(
llvm::function_ref<void(InputSectionBase &)> Fn) {
// Scan all relocations. Each relocation goes through a series
// of tests to determine if it needs special treatment, such as
// creating GOT, PLT, copy relocations, etc.
// Note that relocations for non-alloc sections are directly
// processed by InputSection::relocateNonAlloc.
for (InputSectionBase *IS : InputSections)
if (IS->Live && isa<InputSection>(IS) && (IS->Flags & SHF_ALLOC))
Fn(*IS);
for (EhInputSection *ES : In.EhFrame->Sections)
Fn(*ES);
}
// This function generates assignments for predefined symbols (e.g. _end or
// _etext) and inserts them into the commands sequence to be processed at the
// appropriate time. This ensures that the value is going to be correct by the
// time any references to these symbols are processed and is equivalent to
// defining these symbols explicitly in the linker script.
template <class ELFT> void Writer<ELFT>::setReservedSymbolSections() {
if (ElfSym::GlobalOffsetTable) {
// The _GLOBAL_OFFSET_TABLE_ symbol is defined by target convention usually
// to the start of the .got or .got.plt section.
InputSection *GotSection = In.GotPlt;
if (!Target->GotBaseSymInGotPlt)
GotSection = In.MipsGot ? cast<InputSection>(In.MipsGot)
: cast<InputSection>(In.Got);
ElfSym::GlobalOffsetTable->Section = GotSection;
}
// .rela_iplt_{start,end} mark the start and the end of .rela.plt section.
if (ElfSym::RelaIpltStart && !In.RelaIplt->empty()) {
ElfSym::RelaIpltStart->Section = In.RelaIplt;
ElfSym::RelaIpltEnd->Section = In.RelaIplt;
ElfSym::RelaIpltEnd->Value = In.RelaIplt->getSize();
}
PhdrEntry *Last = nullptr;
PhdrEntry *LastRO = nullptr;
for (PhdrEntry *P : Phdrs) {
if (P->p_type != PT_LOAD)
continue;
Last = P;
if (!(P->p_flags & PF_W))
LastRO = P;
}
if (LastRO) {
// _etext is the first location after the last read-only loadable segment.
if (ElfSym::Etext1)
ElfSym::Etext1->Section = LastRO->LastSec;
if (ElfSym::Etext2)
ElfSym::Etext2->Section = LastRO->LastSec;
}
if (Last) {
// _edata points to the end of the last mapped initialized section.
OutputSection *Edata = nullptr;
for (OutputSection *OS : OutputSections) {
if (OS->Type != SHT_NOBITS)
Edata = OS;
if (OS == Last->LastSec)
break;
}
if (ElfSym::Edata1)
ElfSym::Edata1->Section = Edata;
if (ElfSym::Edata2)
ElfSym::Edata2->Section = Edata;
// _end is the first location after the uninitialized data region.
if (ElfSym::End1)
ElfSym::End1->Section = Last->LastSec;