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AArch64LegalizerInfo.cpp
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AArch64LegalizerInfo.cpp
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//===- AArch64LegalizerInfo.cpp ----------------------------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file implements the targeting of the Machinelegalizer class for
/// AArch64.
/// \todo This should be generated by TableGen.
//===----------------------------------------------------------------------===//
#include "AArch64LegalizerInfo.h"
#include "AArch64RegisterBankInfo.h"
#include "AArch64Subtarget.h"
#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsAArch64.h"
#include "llvm/IR/Type.h"
#include "llvm/Support/MathExtras.h"
#include <initializer_list>
#define DEBUG_TYPE "aarch64-legalinfo"
using namespace llvm;
using namespace LegalizeActions;
using namespace LegalizeMutations;
using namespace LegalityPredicates;
using namespace MIPatternMatch;
AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
: ST(&ST) {
using namespace TargetOpcode;
const LLT p0 = LLT::pointer(0, 64);
const LLT s8 = LLT::scalar(8);
const LLT s16 = LLT::scalar(16);
const LLT s32 = LLT::scalar(32);
const LLT s64 = LLT::scalar(64);
const LLT s128 = LLT::scalar(128);
const LLT v16s8 = LLT::fixed_vector(16, 8);
const LLT v8s8 = LLT::fixed_vector(8, 8);
const LLT v4s8 = LLT::fixed_vector(4, 8);
const LLT v8s16 = LLT::fixed_vector(8, 16);
const LLT v4s16 = LLT::fixed_vector(4, 16);
const LLT v2s16 = LLT::fixed_vector(2, 16);
const LLT v2s32 = LLT::fixed_vector(2, 32);
const LLT v4s32 = LLT::fixed_vector(4, 32);
const LLT v2s64 = LLT::fixed_vector(2, 64);
const LLT v2p0 = LLT::fixed_vector(2, p0);
std::initializer_list<LLT> PackedVectorAllTypeList = {/* Begin 128bit types */
v16s8, v8s16, v4s32,
v2s64, v2p0,
/* End 128bit types */
/* Begin 64bit types */
v8s8, v4s16, v2s32};
const TargetMachine &TM = ST.getTargetLowering()->getTargetMachine();
// FIXME: support subtargets which have neon/fp-armv8 disabled.
if (!ST.hasNEON() || !ST.hasFPARMv8()) {
getLegacyLegalizerInfo().computeTables();
return;
}
// Some instructions only support s16 if the subtarget has full 16-bit FP
// support.
const bool HasFP16 = ST.hasFullFP16();
const LLT &MinFPScalar = HasFP16 ? s16 : s32;
const bool HasCSSC = ST.hasCSSC();
const bool HasRCPC3 = ST.hasRCPC3();
getActionDefinitionsBuilder(
{G_IMPLICIT_DEF, G_FREEZE, G_CONSTANT_FOLD_BARRIER})
.legalFor({p0, s8, s16, s32, s64})
.legalFor(PackedVectorAllTypeList)
.widenScalarToNextPow2(0)
.clampScalar(0, s8, s64)
.fewerElementsIf(
[=](const LegalityQuery &Query) {
return Query.Types[0].isVector() &&
(Query.Types[0].getElementType() != s64 ||
Query.Types[0].getNumElements() != 2);
},
[=](const LegalityQuery &Query) {
LLT EltTy = Query.Types[0].getElementType();
if (EltTy == s64)
return std::make_pair(0, LLT::fixed_vector(2, 64));
return std::make_pair(0, EltTy);
});
getActionDefinitionsBuilder(G_PHI)
.legalFor({p0, s16, s32, s64})
.legalFor(PackedVectorAllTypeList)
.widenScalarToNextPow2(0)
.clampScalar(0, s16, s64)
// Maximum: sN * k = 128
.clampMaxNumElements(0, s8, 16)
.clampMaxNumElements(0, s16, 8)
.clampMaxNumElements(0, s32, 4)
.clampMaxNumElements(0, s64, 2)
.clampMaxNumElements(0, p0, 2);
getActionDefinitionsBuilder(G_BSWAP)
.legalFor({s32, s64, v4s32, v2s32, v2s64})
.widenScalarToNextPow2(0)
.clampScalar(0, s32, s64);
getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
.legalFor({s32, s64, v2s32, v4s32, v4s16, v8s16, v16s8, v8s8})
.scalarizeIf(
[=](const LegalityQuery &Query) {
return Query.Opcode == G_MUL && Query.Types[0] == v2s64;
},
0)
.legalFor({v2s64})
.widenScalarToNextPow2(0)
.clampScalar(0, s32, s64)
.clampMaxNumElements(0, s8, 16)
.clampMaxNumElements(0, s16, 8)
.clampNumElements(0, v2s32, v4s32)
.clampNumElements(0, v2s64, v2s64)
.minScalarOrEltIf(
[=](const LegalityQuery &Query) {
return Query.Types[0].getNumElements() <= 2;
},
0, s32)
.minScalarOrEltIf(
[=](const LegalityQuery &Query) {
return Query.Types[0].getNumElements() <= 4;
},
0, s16)
.minScalarOrEltIf(
[=](const LegalityQuery &Query) {
return Query.Types[0].getNumElements() <= 16;
},
0, s8)
.moreElementsToNextPow2(0);
getActionDefinitionsBuilder({G_SHL, G_ASHR, G_LSHR})
.customIf([=](const LegalityQuery &Query) {
const auto &SrcTy = Query.Types[0];
const auto &AmtTy = Query.Types[1];
return !SrcTy.isVector() && SrcTy.getSizeInBits() == 32 &&
AmtTy.getSizeInBits() == 32;
})
.legalFor({
{s32, s32},
{s32, s64},
{s64, s64},
{v8s8, v8s8},
{v16s8, v16s8},
{v4s16, v4s16},
{v8s16, v8s16},
{v2s32, v2s32},
{v4s32, v4s32},
{v2s64, v2s64},
})
.widenScalarToNextPow2(0)
.clampScalar(1, s32, s64)
.clampScalar(0, s32, s64)
.clampNumElements(0, v2s32, v4s32)
.clampNumElements(0, v2s64, v2s64)
.moreElementsToNextPow2(0)
.minScalarSameAs(1, 0);
getActionDefinitionsBuilder(G_PTR_ADD)
.legalFor({{p0, s64}, {v2p0, v2s64}})
.clampScalar(1, s64, s64);
getActionDefinitionsBuilder(G_PTRMASK).legalFor({{p0, s64}});
getActionDefinitionsBuilder({G_SDIV, G_UDIV})
.legalFor({s32, s64})
.libcallFor({s128})
.clampScalar(0, s32, s64)
.widenScalarToNextPow2(0)
.scalarize(0);
getActionDefinitionsBuilder({G_SREM, G_UREM, G_SDIVREM, G_UDIVREM})
.lowerFor({s8, s16, s32, s64, v2s64, v4s32, v2s32})
.widenScalarOrEltToNextPow2(0)
.clampScalarOrElt(0, s32, s64)
.clampNumElements(0, v2s32, v4s32)
.clampNumElements(0, v2s64, v2s64)
.moreElementsToNextPow2(0);
getActionDefinitionsBuilder({G_SMULO, G_UMULO})
.widenScalarToNextPow2(0, /*Min = */ 32)
.clampScalar(0, s32, s64)
.lower();
getActionDefinitionsBuilder({G_SMULH, G_UMULH})
.legalFor({s64, v8s16, v16s8, v4s32})
.lower();
auto &MinMaxActions = getActionDefinitionsBuilder(
{G_SMIN, G_SMAX, G_UMIN, G_UMAX});
if (HasCSSC)
MinMaxActions
.legalFor({s32, s64, v8s8, v16s8, v4s16, v8s16, v2s32, v4s32})
// Making clamping conditional on CSSC extension as without legal types we
// lower to CMP which can fold one of the two sxtb's we'd otherwise need
// if we detect a type smaller than 32-bit.
.minScalar(0, s32);
else
MinMaxActions
.legalFor({v8s8, v16s8, v4s16, v8s16, v2s32, v4s32});
MinMaxActions
.clampNumElements(0, v8s8, v16s8)
.clampNumElements(0, v4s16, v8s16)
.clampNumElements(0, v2s32, v4s32)
// FIXME: This sholdn't be needed as v2s64 types are going to
// be expanded anyway, but G_ICMP doesn't support splitting vectors yet
.clampNumElements(0, v2s64, v2s64)
.lower();
getActionDefinitionsBuilder(
{G_SADDE, G_SSUBE, G_UADDE, G_USUBE, G_SADDO, G_SSUBO, G_UADDO, G_USUBO})
.legalFor({{s32, s32}, {s64, s32}})
.clampScalar(0, s32, s64)
.clampScalar(1, s32, s64)
.widenScalarToNextPow2(0);
getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FNEG})
.legalFor({MinFPScalar, s32, s64, v2s64, v4s32, v2s32})
.clampScalar(0, MinFPScalar, s64)
.clampNumElements(0, v2s32, v4s32)
.clampNumElements(0, v2s64, v2s64);
getActionDefinitionsBuilder(G_FREM).libcallFor({s32, s64});
getActionDefinitionsBuilder({G_FCEIL, G_FABS, G_FSQRT, G_FFLOOR, G_FRINT,
G_FMA, G_INTRINSIC_TRUNC, G_INTRINSIC_ROUND,
G_FNEARBYINT, G_INTRINSIC_LRINT})
// If we don't have full FP16 support, then scalarize the elements of
// vectors containing fp16 types.
.fewerElementsIf(
[=, &ST](const LegalityQuery &Query) {
const auto &Ty = Query.Types[0];
return Ty.isVector() && Ty.getElementType() == s16 &&
!ST.hasFullFP16();
},
[=](const LegalityQuery &Query) { return std::make_pair(0, s16); })
// If we don't have full FP16 support, then widen s16 to s32 if we
// encounter it.
.widenScalarIf(
[=, &ST](const LegalityQuery &Query) {
return Query.Types[0] == s16 && !ST.hasFullFP16();
},
[=](const LegalityQuery &Query) { return std::make_pair(0, s32); })
.legalFor({s16, s32, s64, v2s32, v4s32, v2s64, v2s16, v4s16, v8s16});
getActionDefinitionsBuilder(
{G_FCOS, G_FSIN, G_FLOG10, G_FLOG, G_FLOG2, G_FEXP, G_FEXP2, G_FPOW})
// We need a call for these, so we always need to scalarize.
.scalarize(0)
// Regardless of FP16 support, widen 16-bit elements to 32-bits.
.minScalar(0, s32)
.libcallFor({s32, s64, v2s32, v4s32, v2s64});
getActionDefinitionsBuilder(G_INSERT)
.legalIf(all(typeInSet(0, {s32, s64, p0}),
typeInSet(1, {s8, s16, s32}), smallerThan(1, 0)))
.widenScalarToNextPow2(0)
.clampScalar(0, s32, s64)
.widenScalarToNextPow2(1)
.minScalar(1, s8)
.maxScalarIf(typeInSet(0, {s32}), 1, s16)
.maxScalarIf(typeInSet(0, {s64, p0}), 1, s32);
getActionDefinitionsBuilder(G_EXTRACT)
.legalIf(all(typeInSet(0, {s16, s32, s64, p0}),
typeInSet(1, {s32, s64, s128, p0}), smallerThan(0, 1)))
.widenScalarToNextPow2(1)
.clampScalar(1, s32, s128)
.widenScalarToNextPow2(0)
.minScalar(0, s16)
.maxScalarIf(typeInSet(1, {s32}), 0, s16)
.maxScalarIf(typeInSet(1, {s64, p0}), 0, s32)
.maxScalarIf(typeInSet(1, {s128}), 0, s64);
for (unsigned Op : {G_SEXTLOAD, G_ZEXTLOAD}) {
auto &Actions = getActionDefinitionsBuilder(Op);
if (Op == G_SEXTLOAD)
Actions.lowerIf(atomicOrderingAtLeastOrStrongerThan(0, AtomicOrdering::Unordered));
// Atomics have zero extending behavior.
Actions
.legalForTypesWithMemDesc({{s32, p0, s8, 8},
{s32, p0, s16, 8},
{s32, p0, s32, 8},
{s64, p0, s8, 2},
{s64, p0, s16, 2},
{s64, p0, s32, 4},
{s64, p0, s64, 8},
{p0, p0, s64, 8},
{v2s32, p0, s64, 8}})
.widenScalarToNextPow2(0)
.clampScalar(0, s32, s64)
// TODO: We could support sum-of-pow2's but the lowering code doesn't know
// how to do that yet.
.unsupportedIfMemSizeNotPow2()
// Lower anything left over into G_*EXT and G_LOAD
.lower();
}
auto IsPtrVecPred = [=](const LegalityQuery &Query) {
const LLT &ValTy = Query.Types[0];
if (!ValTy.isVector())
return false;
const LLT EltTy = ValTy.getElementType();
return EltTy.isPointer() && EltTy.getAddressSpace() == 0;
};
getActionDefinitionsBuilder(G_LOAD)
.customIf([=](const LegalityQuery &Query) {
return HasRCPC3 && Query.Types[0] == s128 &&
Query.MMODescrs[0].Ordering == AtomicOrdering::Acquire;
})
.customIf([=](const LegalityQuery &Query) {
return Query.Types[0] == s128 &&
Query.MMODescrs[0].Ordering != AtomicOrdering::NotAtomic;
})
.legalForTypesWithMemDesc({{s8, p0, s8, 8},
{s16, p0, s16, 8},
{s32, p0, s32, 8},
{s64, p0, s64, 8},
{p0, p0, s64, 8},
{s128, p0, s128, 8},
{v8s8, p0, s64, 8},
{v16s8, p0, s128, 8},
{v4s16, p0, s64, 8},
{v8s16, p0, s128, 8},
{v2s32, p0, s64, 8},
{v4s32, p0, s128, 8},
{v2s64, p0, s128, 8}})
// These extends are also legal
.legalForTypesWithMemDesc({{s32, p0, s8, 8}, {s32, p0, s16, 8}})
.widenScalarToNextPow2(0, /* MinSize = */ 8)
.lowerIfMemSizeNotByteSizePow2()
.clampScalar(0, s8, s64)
.narrowScalarIf(
[=](const LegalityQuery &Query) {
// Clamp extending load results to 32-bits.
return Query.Types[0].isScalar() &&
Query.Types[0] != Query.MMODescrs[0].MemoryTy &&
Query.Types[0].getSizeInBits() > 32;
},
changeTo(0, s32))
.clampMaxNumElements(0, s8, 16)
.clampMaxNumElements(0, s16, 8)
.clampMaxNumElements(0, s32, 4)
.clampMaxNumElements(0, s64, 2)
.clampMaxNumElements(0, p0, 2)
.customIf(IsPtrVecPred)
.scalarizeIf(typeIs(0, v2s16), 0);
getActionDefinitionsBuilder(G_STORE)
.customIf([=](const LegalityQuery &Query) {
return HasRCPC3 && Query.Types[0] == s128 &&
Query.MMODescrs[0].Ordering == AtomicOrdering::Release;
})
.customIf([=](const LegalityQuery &Query) {
return Query.Types[0] == s128 &&
Query.MMODescrs[0].Ordering != AtomicOrdering::NotAtomic;
})
.legalForTypesWithMemDesc(
{{s8, p0, s8, 8}, {s16, p0, s8, 8}, // truncstorei8 from s16
{s32, p0, s8, 8}, // truncstorei8 from s32
{s64, p0, s8, 8}, // truncstorei8 from s64
{s16, p0, s16, 8}, {s32, p0, s16, 8}, // truncstorei16 from s32
{s64, p0, s16, 8}, // truncstorei16 from s64
{s32, p0, s8, 8}, {s32, p0, s16, 8}, {s32, p0, s32, 8},
{s64, p0, s64, 8}, {s64, p0, s32, 8}, // truncstorei32 from s64
{p0, p0, s64, 8}, {s128, p0, s128, 8}, {v16s8, p0, s128, 8},
{v8s8, p0, s64, 8}, {v4s16, p0, s64, 8}, {v8s16, p0, s128, 8},
{v2s32, p0, s64, 8}, {v4s32, p0, s128, 8}, {v2s64, p0, s128, 8}})
.clampScalar(0, s8, s64)
.lowerIf([=](const LegalityQuery &Query) {
return Query.Types[0].isScalar() &&
Query.Types[0] != Query.MMODescrs[0].MemoryTy;
})
// Maximum: sN * k = 128
.clampMaxNumElements(0, s8, 16)
.clampMaxNumElements(0, s16, 8)
.clampMaxNumElements(0, s32, 4)
.clampMaxNumElements(0, s64, 2)
.clampMaxNumElements(0, p0, 2)
.lowerIfMemSizeNotPow2()
.customIf(IsPtrVecPred)
.scalarizeIf(typeIs(0, v2s16), 0);
// Constants
getActionDefinitionsBuilder(G_CONSTANT)
.legalFor({p0, s8, s16, s32, s64})
.widenScalarToNextPow2(0)
.clampScalar(0, s8, s64);
getActionDefinitionsBuilder(G_FCONSTANT)
.legalIf([=](const LegalityQuery &Query) {
const auto &Ty = Query.Types[0];
if (HasFP16 && Ty == s16)
return true;
return Ty == s32 || Ty == s64 || Ty == s128;
})
.clampScalar(0, MinFPScalar, s128);
getActionDefinitionsBuilder(G_ICMP)
.legalFor({{s32, s32},
{s32, s64},
{s32, p0},
{v4s32, v4s32},
{v2s32, v2s32},
{v2s64, v2s64},
{v2s64, v2p0},
{v4s16, v4s16},
{v8s16, v8s16},
{v8s8, v8s8},
{v16s8, v16s8}})
.widenScalarOrEltToNextPow2(1)
.clampScalar(1, s32, s64)
.clampScalar(0, s32, s32)
.minScalarEltSameAsIf(
[=](const LegalityQuery &Query) {
const LLT &Ty = Query.Types[0];
const LLT &SrcTy = Query.Types[1];
return Ty.isVector() && !SrcTy.getElementType().isPointer() &&
Ty.getElementType() != SrcTy.getElementType();
},
0, 1)
.minScalarOrEltIf(
[=](const LegalityQuery &Query) { return Query.Types[1] == v2s16; },
1, s32)
.minScalarOrEltIf(
[=](const LegalityQuery &Query) { return Query.Types[1] == v2p0; }, 0,
s64)
.clampNumElements(0, v2s32, v4s32);
getActionDefinitionsBuilder(G_FCMP)
// If we don't have full FP16 support, then scalarize the elements of
// vectors containing fp16 types.
.fewerElementsIf(
[=](const LegalityQuery &Query) {
const auto &Ty = Query.Types[0];
return Ty.isVector() && Ty.getElementType() == s16 && !HasFP16;
},
[=](const LegalityQuery &Query) { return std::make_pair(0, s16); })
// If we don't have full FP16 support, then widen s16 to s32 if we
// encounter it.
.widenScalarIf(
[=](const LegalityQuery &Query) {
return Query.Types[0] == s16 && !HasFP16;
},
[=](const LegalityQuery &Query) { return std::make_pair(0, s32); })
.legalFor({{s16, s16},
{s32, s32},
{s32, s64},
{v4s32, v4s32},
{v2s32, v2s32},
{v2s64, v2s64},
{v4s16, v4s16},
{v8s16, v8s16}})
.widenScalarOrEltToNextPow2(1)
.clampScalar(1, s32, s64)
.clampScalar(0, s32, s32)
.minScalarEltSameAsIf(
[=](const LegalityQuery &Query) {
const LLT &Ty = Query.Types[0];
const LLT &SrcTy = Query.Types[1];
return Ty.isVector() && !SrcTy.getElementType().isPointer() &&
Ty.getElementType() != SrcTy.getElementType();
},
0, 1)
.clampNumElements(0, v2s32, v4s32);
// Extensions
auto ExtLegalFunc = [=](const LegalityQuery &Query) {
unsigned DstSize = Query.Types[0].getSizeInBits();
if (DstSize == 128 && !Query.Types[0].isVector())
return false; // Extending to a scalar s128 needs narrowing.
// Make sure that we have something that will fit in a register, and
// make sure it's a power of 2.
if (DstSize < 8 || DstSize > 128 || !isPowerOf2_32(DstSize))
return false;
const LLT &SrcTy = Query.Types[1];
// Make sure we fit in a register otherwise. Don't bother checking that
// the source type is below 128 bits. We shouldn't be allowing anything
// through which is wider than the destination in the first place.
unsigned SrcSize = SrcTy.getSizeInBits();
if (SrcSize < 8 || !isPowerOf2_32(SrcSize))
return false;
return true;
};
getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
.legalIf(ExtLegalFunc)
.clampScalar(0, s64, s64); // Just for s128, others are handled above.
getActionDefinitionsBuilder(G_TRUNC)
.minScalarOrEltIf(
[=](const LegalityQuery &Query) { return Query.Types[0].isVector(); },
0, s8)
.customIf([=](const LegalityQuery &Query) {
LLT DstTy = Query.Types[0];
LLT SrcTy = Query.Types[1];
return DstTy == v8s8 && SrcTy.getSizeInBits() > 128;
})
.alwaysLegal();
getActionDefinitionsBuilder(G_SEXT_INREG)
.legalFor({s32, s64})
.legalFor(PackedVectorAllTypeList)
.lower();
// FP conversions
getActionDefinitionsBuilder(G_FPTRUNC)
.legalFor(
{{s16, s32}, {s16, s64}, {s32, s64}, {v4s16, v4s32}, {v2s32, v2s64}})
.clampMaxNumElements(0, s32, 2);
getActionDefinitionsBuilder(G_FPEXT)
.legalFor(
{{s32, s16}, {s64, s16}, {s64, s32}, {v4s32, v4s16}, {v2s64, v2s32}})
.clampMaxNumElements(0, s64, 2);
// Conversions
getActionDefinitionsBuilder({G_FPTOSI, G_FPTOUI})
.legalForCartesianProduct({s32, s64, v2s64, v4s32, v2s32})
.widenScalarToNextPow2(0)
.clampScalar(0, s32, s64)
.widenScalarToNextPow2(1)
.clampScalar(1, s32, s64);
getActionDefinitionsBuilder({G_SITOFP, G_UITOFP})
.legalForCartesianProduct({s32, s64, v2s64, v4s32, v2s32})
.clampScalar(1, s32, s64)
.minScalarSameAs(1, 0)
.clampScalar(0, s32, s64)
.widenScalarToNextPow2(0);
// Control-flow
getActionDefinitionsBuilder(G_BRCOND)
.legalFor({s32})
.clampScalar(0, s32, s32);
getActionDefinitionsBuilder(G_BRINDIRECT).legalFor({p0});
getActionDefinitionsBuilder(G_SELECT)
.legalFor({{s32, s32}, {s64, s32}, {p0, s32}})
.widenScalarToNextPow2(0)
.clampScalar(0, s32, s64)
.clampScalar(1, s32, s32)
.minScalarEltSameAsIf(all(isVector(0), isVector(1)), 1, 0)
.lowerIf(isVector(0));
// Pointer-handling
getActionDefinitionsBuilder(G_FRAME_INDEX).legalFor({p0});
if (TM.getCodeModel() == CodeModel::Small)
getActionDefinitionsBuilder(G_GLOBAL_VALUE).custom();
else
getActionDefinitionsBuilder(G_GLOBAL_VALUE).legalFor({p0});
getActionDefinitionsBuilder(G_PTRTOINT)
.legalFor({{s64, p0}, {v2s64, v2p0}})
.widenScalarToNextPow2(0, 64)
.clampScalar(0, s64, s64);
getActionDefinitionsBuilder(G_INTTOPTR)
.unsupportedIf([&](const LegalityQuery &Query) {
return Query.Types[0].getSizeInBits() != Query.Types[1].getSizeInBits();
})
.legalFor({{p0, s64}, {v2p0, v2s64}});
// Casts for 32 and 64-bit width type are just copies.
// Same for 128-bit width type, except they are on the FPR bank.
getActionDefinitionsBuilder(G_BITCAST)
// FIXME: This is wrong since G_BITCAST is not allowed to change the
// number of bits but it's what the previous code described and fixing
// it breaks tests.
.legalForCartesianProduct({s8, s16, s32, s64, s128, v16s8, v8s8, v4s8,
v8s16, v4s16, v2s16, v4s32, v2s32, v2s64,
v2p0});
getActionDefinitionsBuilder(G_VASTART).legalFor({p0});
// va_list must be a pointer, but most sized types are pretty easy to handle
// as the destination.
getActionDefinitionsBuilder(G_VAARG)
.customForCartesianProduct({s8, s16, s32, s64, p0}, {p0})
.clampScalar(0, s8, s64)
.widenScalarToNextPow2(0, /*Min*/ 8);
getActionDefinitionsBuilder(G_ATOMIC_CMPXCHG_WITH_SUCCESS)
.lowerIf(
all(typeInSet(0, {s8, s16, s32, s64, s128}), typeIs(2, p0)));
getActionDefinitionsBuilder(G_ATOMIC_CMPXCHG)
.customIf([](const LegalityQuery &Query) {
return Query.Types[0].getSizeInBits() == 128;
})
.clampScalar(0, s32, s64)
.legalIf(all(typeInSet(0, {s32, s64}), typeIs(1, p0)));
getActionDefinitionsBuilder(
{G_ATOMICRMW_XCHG, G_ATOMICRMW_ADD, G_ATOMICRMW_SUB, G_ATOMICRMW_AND,
G_ATOMICRMW_OR, G_ATOMICRMW_XOR, G_ATOMICRMW_MIN, G_ATOMICRMW_MAX,
G_ATOMICRMW_UMIN, G_ATOMICRMW_UMAX})
.clampScalar(0, s32, s64)
.legalIf(all(typeInSet(0, {s32, s64}), typeIs(1, p0)));
getActionDefinitionsBuilder(G_BLOCK_ADDR).legalFor({p0});
// Merge/Unmerge
for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0;
getActionDefinitionsBuilder(Op)
.widenScalarToNextPow2(LitTyIdx, 8)
.widenScalarToNextPow2(BigTyIdx, 32)
.clampScalar(LitTyIdx, s8, s64)
.clampScalar(BigTyIdx, s32, s128)
.legalIf([=](const LegalityQuery &Q) {
switch (Q.Types[BigTyIdx].getSizeInBits()) {
case 32:
case 64:
case 128:
break;
default:
return false;
}
switch (Q.Types[LitTyIdx].getSizeInBits()) {
case 8:
case 16:
case 32:
case 64:
return true;
default:
return false;
}
});
}
getActionDefinitionsBuilder(G_EXTRACT_VECTOR_ELT)
.unsupportedIf([=](const LegalityQuery &Query) {
const LLT &EltTy = Query.Types[1].getElementType();
return Query.Types[0] != EltTy;
})
.minScalar(2, s64)
.legalIf([=](const LegalityQuery &Query) {
const LLT &VecTy = Query.Types[1];
return VecTy == v2s16 || VecTy == v4s16 || VecTy == v8s16 ||
VecTy == v4s32 || VecTy == v2s64 || VecTy == v2s32 ||
VecTy == v8s8 || VecTy == v16s8 || VecTy == v2s32 ||
VecTy == v2p0;
})
.minScalarOrEltIf(
[=](const LegalityQuery &Query) {
// We want to promote to <M x s1> to <M x s64> if that wouldn't
// cause the total vec size to be > 128b.
return Query.Types[1].getNumElements() <= 2;
},
0, s64)
.minScalarOrEltIf(
[=](const LegalityQuery &Query) {
return Query.Types[1].getNumElements() <= 4;
},
0, s32)
.minScalarOrEltIf(
[=](const LegalityQuery &Query) {
return Query.Types[1].getNumElements() <= 8;
},
0, s16)
.minScalarOrEltIf(
[=](const LegalityQuery &Query) {
return Query.Types[1].getNumElements() <= 16;
},
0, s8)
.minScalarOrElt(0, s8) // Worst case, we need at least s8.
.clampMaxNumElements(1, s64, 2)
.clampMaxNumElements(1, s32, 4)
.clampMaxNumElements(1, s16, 8)
.clampMaxNumElements(1, p0, 2);
getActionDefinitionsBuilder(G_INSERT_VECTOR_ELT)
.legalIf(typeInSet(0, {v16s8, v8s8, v8s16, v4s16, v4s32, v2s32, v2s64}));
getActionDefinitionsBuilder(G_BUILD_VECTOR)
.legalFor({{v8s8, s8},
{v16s8, s8},
{v2s16, s16},
{v4s16, s16},
{v8s16, s16},
{v2s32, s32},
{v4s32, s32},
{v2p0, p0},
{v2s64, s64}})
.clampNumElements(0, v4s32, v4s32)
.clampNumElements(0, v2s64, v2s64)
.minScalarOrElt(0, s8)
.minScalarSameAs(1, 0);
getActionDefinitionsBuilder(G_BUILD_VECTOR_TRUNC).lower();
getActionDefinitionsBuilder(G_CTLZ)
.legalForCartesianProduct(
{s32, s64, v8s8, v16s8, v4s16, v8s16, v2s32, v4s32})
.scalarize(1)
.widenScalarToNextPow2(1, /*Min=*/32)
.clampScalar(1, s32, s64)
.scalarSameSizeAs(0, 1);
getActionDefinitionsBuilder(G_CTLZ_ZERO_UNDEF).lower();
// TODO: Custom lowering for v2s32, v4s32, v2s64.
getActionDefinitionsBuilder(G_BITREVERSE)
.legalFor({s32, s64, v8s8, v16s8})
.widenScalarToNextPow2(0, /*Min = */ 32)
.clampScalar(0, s32, s64);
getActionDefinitionsBuilder(G_CTTZ_ZERO_UNDEF).lower();
getActionDefinitionsBuilder(G_CTTZ)
.lowerIf(isVector(0))
.widenScalarToNextPow2(1, /*Min=*/32)
.clampScalar(1, s32, s64)
.scalarSameSizeAs(0, 1)
.legalIf([=](const LegalityQuery &Query) {
return (HasCSSC && typeInSet(0, {s32, s64})(Query));
})
.customIf([=](const LegalityQuery &Query) {
return (!HasCSSC && typeInSet(0, {s32, s64})(Query));
});
getActionDefinitionsBuilder(G_SHUFFLE_VECTOR)
.legalIf([=](const LegalityQuery &Query) {
const LLT &DstTy = Query.Types[0];
const LLT &SrcTy = Query.Types[1];
// For now just support the TBL2 variant which needs the source vectors
// to be the same size as the dest.
if (DstTy != SrcTy)
return false;
return llvm::is_contained({v2s32, v4s32, v2s64, v2p0, v16s8, v8s16},
DstTy);
})
// G_SHUFFLE_VECTOR can have scalar sources (from 1 x s vectors), we
// just want those lowered into G_BUILD_VECTOR
.lowerIf([=](const LegalityQuery &Query) {
return !Query.Types[1].isVector();
})
.moreElementsIf(
[](const LegalityQuery &Query) {
return Query.Types[0].isVector() && Query.Types[1].isVector() &&
Query.Types[0].getNumElements() >
Query.Types[1].getNumElements();
},
changeTo(1, 0))
.moreElementsToNextPow2(0)
.clampNumElements(0, v4s32, v4s32)
.clampNumElements(0, v2s64, v2s64)
.moreElementsIf(
[](const LegalityQuery &Query) {
return Query.Types[0].isVector() && Query.Types[1].isVector() &&
Query.Types[0].getNumElements() <
Query.Types[1].getNumElements();
},
changeTo(0, 1));
getActionDefinitionsBuilder(G_CONCAT_VECTORS)
.legalFor({{v4s32, v2s32}, {v8s16, v4s16}, {v16s8, v8s8}});
getActionDefinitionsBuilder(G_JUMP_TABLE).legalFor({{p0}, {s64}});
getActionDefinitionsBuilder(G_BRJT).legalIf([=](const LegalityQuery &Query) {
return Query.Types[0] == p0 && Query.Types[1] == s64;
});
getActionDefinitionsBuilder(G_DYN_STACKALLOC).lower();
if (ST.hasMOPS()) {
// G_BZERO is not supported. Currently it is only emitted by
// PreLegalizerCombiner for G_MEMSET with zero constant.
getActionDefinitionsBuilder(G_BZERO).unsupported();
getActionDefinitionsBuilder(G_MEMSET)
.legalForCartesianProduct({p0}, {s64}, {s64})
.customForCartesianProduct({p0}, {s8}, {s64})
.immIdx(0); // Inform verifier imm idx 0 is handled.
getActionDefinitionsBuilder({G_MEMCPY, G_MEMMOVE})
.legalForCartesianProduct({p0}, {p0}, {s64})
.immIdx(0); // Inform verifier imm idx 0 is handled.
// G_MEMCPY_INLINE does not have a tailcall immediate
getActionDefinitionsBuilder(G_MEMCPY_INLINE)
.legalForCartesianProduct({p0}, {p0}, {s64});
} else {
getActionDefinitionsBuilder({G_BZERO, G_MEMCPY, G_MEMMOVE, G_MEMSET})
.libcall();
}
// FIXME: Legal vector types are only legal with NEON.
auto &ABSActions = getActionDefinitionsBuilder(G_ABS);
if (HasCSSC)
ABSActions
.legalFor({s32, s64});
ABSActions
.legalFor(PackedVectorAllTypeList)
.lowerIf(isScalar(0));
getActionDefinitionsBuilder(G_VECREDUCE_FADD)
// We only have FADDP to do reduction-like operations. Lower the rest.
.legalFor({{s32, v2s32}, {s64, v2s64}})
.clampMaxNumElements(1, s64, 2)
.clampMaxNumElements(1, s32, 2)
.lower();
getActionDefinitionsBuilder(G_VECREDUCE_ADD)
.legalFor(
{{s8, v16s8}, {s16, v8s16}, {s32, v4s32}, {s32, v2s32}, {s64, v2s64}})
.clampMaxNumElements(1, s64, 2)
.clampMaxNumElements(1, s32, 4)
.lower();
getActionDefinitionsBuilder(
{G_VECREDUCE_OR, G_VECREDUCE_AND, G_VECREDUCE_XOR})
// Try to break down into smaller vectors as long as they're at least 64
// bits. This lets us use vector operations for some parts of the
// reduction.
.fewerElementsIf(
[=](const LegalityQuery &Q) {
LLT SrcTy = Q.Types[1];
if (SrcTy.isScalar())
return false;
if (!isPowerOf2_32(SrcTy.getNumElements()))
return false;
// We can usually perform 64b vector operations.
return SrcTy.getSizeInBits() > 64;
},
[=](const LegalityQuery &Q) {
LLT SrcTy = Q.Types[1];
return std::make_pair(1, SrcTy.divide(2));
})
.scalarize(1)
.lower();
getActionDefinitionsBuilder({G_UADDSAT, G_USUBSAT})
.lowerIf([=](const LegalityQuery &Q) { return Q.Types[0].isScalar(); });
getActionDefinitionsBuilder({G_FSHL, G_FSHR}).lower();
getActionDefinitionsBuilder(G_ROTR)
.legalFor({{s32, s64}, {s64, s64}})
.customIf([=](const LegalityQuery &Q) {
return Q.Types[0].isScalar() && Q.Types[1].getScalarSizeInBits() < 64;
})
.lower();
getActionDefinitionsBuilder(G_ROTL).lower();
getActionDefinitionsBuilder({G_SBFX, G_UBFX})
.customFor({{s32, s32}, {s64, s64}});
auto always = [=](const LegalityQuery &Q) { return true; };
auto &CTPOPActions = getActionDefinitionsBuilder(G_CTPOP);
if (HasCSSC)
CTPOPActions
.legalFor({{s32, s32},
{s64, s64},
{v8s8, v8s8},
{v16s8, v16s8}})
.customFor({{s128, s128},
{v2s64, v2s64},
{v2s32, v2s32},
{v4s32, v4s32},
{v4s16, v4s16},
{v8s16, v8s16}});
else
CTPOPActions
.legalFor({{v8s8, v8s8},
{v16s8, v16s8}})
.customFor({{s32, s32},
{s64, s64},
{s128, s128},
{v2s64, v2s64},
{v2s32, v2s32},
{v4s32, v4s32},
{v4s16, v4s16},
{v8s16, v8s16}});
CTPOPActions
.clampScalar(0, s32, s128)
.widenScalarToNextPow2(0)
.minScalarEltSameAsIf(always, 1, 0)
.maxScalarEltSameAsIf(always, 1, 0);
// TODO: Vector types.
getActionDefinitionsBuilder({G_SADDSAT, G_SSUBSAT}).lowerIf(isScalar(0));
// TODO: Vector types.
getActionDefinitionsBuilder({G_FMAXNUM, G_FMINNUM})
.legalFor({MinFPScalar, s32, s64})
.libcallFor({s128})
.minScalar(0, MinFPScalar);
getActionDefinitionsBuilder({G_FMAXIMUM, G_FMINIMUM})
.legalFor({MinFPScalar, s32, s64, v2s32, v4s32, v2s64})
.legalIf([=](const LegalityQuery &Query) {
const auto &Ty = Query.Types[0];
return (Ty == v8s16 || Ty == v4s16) && HasFP16;
})
.minScalar(0, MinFPScalar)
.clampNumElements(0, v4s16, v8s16)
.clampNumElements(0, v2s32, v4s32)
.clampNumElements(0, v2s64, v2s64);
// TODO: Libcall support for s128.
// TODO: s16 should be legal with full FP16 support.
getActionDefinitionsBuilder({G_LROUND, G_LLROUND})
.legalFor({{s64, s32}, {s64, s64}});
// TODO: Custom legalization for vector types.
// TODO: Custom legalization for mismatched types.
// TODO: s16 support.
getActionDefinitionsBuilder(G_FCOPYSIGN).customFor({{s32, s32}, {s64, s64}});
getActionDefinitionsBuilder(G_FMAD).lower();
getLegacyLegalizerInfo().computeTables();
verify(*ST.getInstrInfo());
}
bool AArch64LegalizerInfo::legalizeCustom(LegalizerHelper &Helper,
MachineInstr &MI) const {
MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
MachineRegisterInfo &MRI = *MIRBuilder.getMRI();
GISelChangeObserver &Observer = Helper.Observer;
switch (MI.getOpcode()) {
default:
// No idea what to do.
return false;
case TargetOpcode::G_VAARG:
return legalizeVaArg(MI, MRI, MIRBuilder);
case TargetOpcode::G_LOAD:
case TargetOpcode::G_STORE:
return legalizeLoadStore(MI, MRI, MIRBuilder, Observer);
case TargetOpcode::G_SHL:
case TargetOpcode::G_ASHR:
case TargetOpcode::G_LSHR:
return legalizeShlAshrLshr(MI, MRI, MIRBuilder, Observer);
case TargetOpcode::G_GLOBAL_VALUE:
return legalizeSmallCMGlobalValue(MI, MRI, MIRBuilder, Observer);
case TargetOpcode::G_TRUNC:
return legalizeVectorTrunc(MI, Helper);
case TargetOpcode::G_SBFX:
case TargetOpcode::G_UBFX:
return legalizeBitfieldExtract(MI, MRI, Helper);
case TargetOpcode::G_ROTR:
return legalizeRotate(MI, MRI, Helper);
case TargetOpcode::G_CTPOP:
return legalizeCTPOP(MI, MRI, Helper);
case TargetOpcode::G_ATOMIC_CMPXCHG:
return legalizeAtomicCmpxchg128(MI, MRI, Helper);
case TargetOpcode::G_CTTZ:
return legalizeCTTZ(MI, Helper);
case TargetOpcode::G_BZERO:
case TargetOpcode::G_MEMCPY:
case TargetOpcode::G_MEMMOVE:
case TargetOpcode::G_MEMSET:
return legalizeMemOps(MI, Helper);
case TargetOpcode::G_FCOPYSIGN:
return legalizeFCopySign(MI, Helper);
}
llvm_unreachable("expected switch to return");
}
bool AArch64LegalizerInfo::legalizeRotate(MachineInstr &MI,
MachineRegisterInfo &MRI,
LegalizerHelper &Helper) const {
// To allow for imported patterns to match, we ensure that the rotate amount
// is 64b with an extension.
Register AmtReg = MI.getOperand(2).getReg();
LLT AmtTy = MRI.getType(AmtReg);
(void)AmtTy;
assert(AmtTy.isScalar() && "Expected a scalar rotate");