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[AArch64] Convert tests to opaque pointers (NFC)
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@nikic
nikic committed Feb 5, 2024
1 parent 84ea236 commit 1ee315a
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Showing 184 changed files with 3,550 additions and 3,558 deletions.
22 changes: 11 additions & 11 deletions llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
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Expand Up @@ -25,16 +25,16 @@
entry:
ret void
}
define void @phiPropagation(i32* %src, i32* %dst, i1 %cond) {
define void @phiPropagation(ptr %src, ptr %dst, i1 %cond) {
entry:
%srcVal = load i32, i32* %src
%srcVal = load i32, ptr %src
br i1 %cond, label %end, label %then
then:
%res = add i32 %srcVal, 36
br label %end
end:
%toStore = phi i32 [ %srcVal, %entry ], [ %res, %then ]
store i32 %toStore, i32* %dst
store i32 %toStore, ptr %dst
ret void
}
define void @defaultMappingUseRepairPhysReg() {
Expand Down Expand Up @@ -71,26 +71,26 @@
define void @copy_s128_from_load() { ret void }
define void @copy_fp16() { ret void }

define i64 @greedyWithChainOfComputation(i64 %arg1, <2 x i32>* %addr) {
define i64 @greedyWithChainOfComputation(i64 %arg1, ptr %addr) {
%varg1 = bitcast i64 %arg1 to <2 x i32>
%varg2 = load <2 x i32>, <2 x i32>* %addr
%varg2 = load <2 x i32>, ptr %addr
%vres = or <2 x i32> %varg1, %varg2
%res = bitcast <2 x i32> %vres to i64
ret i64 %res
}

define i64 @floatingPointLoad(i64 %arg1, double* %addr) {
define i64 @floatingPointLoad(i64 %arg1, ptr %addr) {
%varg1 = bitcast i64 %arg1 to double
%varg2 = load double, double* %addr
%varg2 = load double, ptr %addr
%vres = fadd double %varg1, %varg2
%res = bitcast double %vres to i64
ret i64 %res
}

define void @floatingPointStore(i64 %arg1, double* %addr) {
define void @floatingPointStore(i64 %arg1, ptr %addr) {
%varg1 = bitcast i64 %arg1 to double
%vres = fadd double %varg1, %varg1
store double %vres, double* %addr
store double %vres, ptr %addr
ret void
}

Expand All @@ -106,8 +106,8 @@
define half @passFp16ViaAllocas(half %p) {
entry:
%p.addr = alloca half, align 2
store half %p, half* %p.addr, align 2
%0 = load half, half* %p.addr, align 2
store half %p, ptr %p.addr, align 2
%0 = load half, ptr %p.addr, align 2
ret half %0
}
...
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12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AArch64/GlobalISel/combine-ext-debugloc.mir
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Expand Up @@ -10,17 +10,17 @@

@.str = external dso_local unnamed_addr constant [4 x i8], align 1

define void @main() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg !4 {
define void @main() personality ptr @__gxx_personality_v0 !dbg !4 {
entry:
%tobool = trunc i8 undef to i1
%conv = zext i1 %tobool to i32
call void (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %conv), !dbg !8
%0 = load i32, i32* undef, align 4, !dbg !9
call void (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
call void (ptr, ...) @printf(ptr @.str, i32 %conv), !dbg !8
%0 = load i32, ptr undef, align 4, !dbg !9
call void (ptr, ...) @printf(ptr @.str, i32 %0)
ret void
}

declare void @printf(i8*, ...)
declare void @printf(ptr, ...)
declare i32 @__gxx_personality_v0(...)

!llvm.dbg.cu = !{!0}
Expand Down Expand Up @@ -67,7 +67,7 @@ body: |
G_STORE %8(s64), %7(p0), debug-location !8 :: (store (s64) into stack, align 1)
BL @printf, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x0, debug-location !8
ADJCALLSTACKUP 8, 0, implicit-def $sp, implicit $sp, debug-location !8
%13:_(s64) = G_LOAD %10(p0), debug-location !9 :: (load (s32) from `i32* undef`)
%13:_(s64) = G_LOAD %10(p0), debug-location !9 :: (load (s32) from `ptr undef`)
ADJCALLSTACKDOWN 8, 0, implicit-def $sp, implicit $sp
$x0 = COPY %4(p0)
%11:_(p0) = COPY $sp
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/GlobalISel/combine-sext-debugloc.mir
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Expand Up @@ -8,14 +8,14 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-unknown"

define i64 @main(i8 %pat) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg !4 {
define i64 @main(i8 %pat) personality ptr @__gxx_personality_v0 !dbg !4 {
entry:
%sext.1 = zext i8 %pat to i16, !dbg !8
%sext.zext.1 = sext i16 %sext.1 to i64, !dbg !9
ret i64 %sext.zext.1
}

declare void @printf(i8*, ...)
declare void @printf(ptr, ...)

declare i32 @__gxx_personality_v0(...)

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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/GlobalISel/fp128-legalize-crash-pr35690.mir
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Expand Up @@ -6,8 +6,8 @@
define fp128 @x(fp128 %a) {
entry:
%a.addr = alloca fp128, align 16
store fp128 %a, fp128* %a.addr, align 16
%0 = load fp128, fp128* %a.addr, align 16
store fp128 %a, ptr %a.addr, align 16
%0 = load fp128, ptr %a.addr, align 16
%sub = fsub fp128 0xL00000000000000008000000000000000, %0
ret fp128 %sub
}
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir
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Expand Up @@ -7,7 +7,7 @@
target triple = "aarch64"

; Function Attrs: noinline nounwind optnone
define void @fp16_to_gpr([2 x half], [2 x half]* %addr) {
define void @fp16_to_gpr([2 x half], ptr %addr) {
ret void
}

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10 changes: 5 additions & 5 deletions llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy-forced.mir
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Expand Up @@ -4,13 +4,13 @@
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-darwin"

declare void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1 immarg) #0
declare void @llvm.memcpy.inline.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #0

define void @test_memcpy_inline(i32* nocapture %dst, i32* nocapture readonly %src) local_unnamed_addr {
define void @test_memcpy_inline(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 143, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memcpy.inline.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 143, i1 false)
ret void
}

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52 changes: 26 additions & 26 deletions llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
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Expand Up @@ -4,54 +4,54 @@
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-darwin"

define void @test_memcpy1(i32* nocapture %dst, i32* nocapture readonly %src, i64 %len) local_unnamed_addr #0 {
define void @test_memcpy1(ptr nocapture %dst, ptr nocapture readonly %src, i64 %len) local_unnamed_addr #0 {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 %len, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 %len, i1 false)
ret void
}

declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1 immarg) #1
declare void @llvm.memcpy.p1i8.p2i8.i64(i8 addrspace(1)* nocapture writeonly, i8 addrspace(2)* nocapture readonly, i64, i1 immarg) #1
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #1
declare void @llvm.memcpy.p1.p2.i64(ptr addrspace(1) nocapture writeonly, ptr addrspace(2) nocapture readonly, i64, i1 immarg) #1

define void @test_memcpy2_const(i32* nocapture %dst, i32* nocapture readonly %src) local_unnamed_addr #0 {
define void @test_memcpy2_const(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #0 {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 72, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 72, i1 false)
ret void
}

define void @test_memcpy2_const_optsize(i32* nocapture %dst, i32* nocapture readonly %src) local_unnamed_addr #2 {
define void @test_memcpy2_const_optsize(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #2 {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 72, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 72, i1 false)
ret void
}

define void @test_memcpy2_const_minsize(i32* nocapture %dst, i32* nocapture readonly %src) local_unnamed_addr #3 {
define void @test_memcpy2_const_minsize(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #3 {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 72, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 72, i1 false)
ret void
}

define void @test_memcpy3_const_arrays_unaligned(i32* nocapture %dst, i32* nocapture readonly %src) local_unnamed_addr #0 {
define void @test_memcpy3_const_arrays_unaligned(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #0 {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 143, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 143, i1 false)
ret void
}

define void @test_memcpy_addrspace(i32 addrspace(1)* nocapture %dst, i32 addrspace(2)* nocapture readonly %src) local_unnamed_addr #0 {
define void @test_memcpy_addrspace(ptr addrspace(1) nocapture %dst, ptr addrspace(2) nocapture readonly %src) local_unnamed_addr #0 {
entry:
%0 = bitcast i32 addrspace(1)* %dst to i8 addrspace(1)*
%1 = bitcast i32 addrspace(2)* %src to i8 addrspace(2)*
tail call void @llvm.memcpy.p1i8.p2i8.i64(i8 addrspace(1)* align 4 %0, i8 addrspace(2)* align 4 %1, i64 72, i1 false)
%0 = bitcast ptr addrspace(1) %dst to ptr addrspace(1)
%1 = bitcast ptr addrspace(2) %src to ptr addrspace(2)
tail call void @llvm.memcpy.p1.p2.i64(ptr addrspace(1) align 4 %0, ptr addrspace(2) align 4 %1, i64 72, i1 false)
ret void
}

Expand Down
44 changes: 22 additions & 22 deletions llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
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Expand Up @@ -4,46 +4,46 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64"

define void @test_memmove1(i32* nocapture %dst, i32* nocapture readonly %src, i64 %len) local_unnamed_addr #0 {
define void @test_memmove1(ptr nocapture %dst, ptr nocapture readonly %src, i64 %len) local_unnamed_addr #0 {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 %len, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memmove.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 %len, i1 false)
ret void
}

declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1 immarg) #1
declare void @llvm.memmove.p1i8.p2i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(2)* nocapture readonly, i64, i1 immarg) #1
declare void @llvm.memmove.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1 immarg) #1
declare void @llvm.memmove.p1.p2.i64(ptr addrspace(1) nocapture, ptr addrspace(2) nocapture readonly, i64, i1 immarg) #1

define void @test_memmove2_const(i32* nocapture %dst, i32* nocapture readonly %src) local_unnamed_addr #0 {
define void @test_memmove2_const(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #0 {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 48, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memmove.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 48, i1 false)
ret void
}

define void @test_memmove3_const_toolarge(i32* nocapture %dst, i32* nocapture readonly %src) local_unnamed_addr #0 {
define void @test_memmove3_const_toolarge(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #0 {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 96, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memmove.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 96, i1 false)
ret void
}

define void @test_memmove4_const_unaligned(i32* nocapture %dst, i32* nocapture readonly %src) local_unnamed_addr #0 {
define void @test_memmove4_const_unaligned(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #0 {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 52, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memmove.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 52, i1 false)
ret void
}

define void @test_memmove_addrspace(i32 addrspace(1)* nocapture %dst, i32 addrspace(2)* nocapture readonly %src) local_unnamed_addr #0 {
define void @test_memmove_addrspace(ptr addrspace(1) nocapture %dst, ptr addrspace(2) nocapture readonly %src) local_unnamed_addr #0 {
entry:
%0 = bitcast i32 addrspace(1)* %dst to i8 addrspace(1)*
%1 = bitcast i32 addrspace(2)* %src to i8 addrspace(2)*
tail call void @llvm.memmove.p1i8.p2i8.i64(i8 addrspace(1)* align 4 %0, i8 addrspace(2)* align 4 %1, i64 8, i1 false)
%0 = bitcast ptr addrspace(1) %dst to ptr addrspace(1)
%1 = bitcast ptr addrspace(2) %src to ptr addrspace(2)
tail call void @llvm.memmove.p1.p2.i64(ptr addrspace(1) align 4 %0, ptr addrspace(2) align 4 %1, i64 8, i1 false)
ret void
}

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30 changes: 15 additions & 15 deletions llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
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Expand Up @@ -4,51 +4,51 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64"

define void @test_ms1(i8* nocapture %dst, i32 %c, i32 %len) local_unnamed_addr #0 {
define void @test_ms1(ptr nocapture %dst, i32 %c, i32 %len) local_unnamed_addr #0 {
entry:
%0 = trunc i32 %c to i8
%conv = zext i32 %len to i64
tail call void @llvm.memset.p0i8.i64(i8* align 1 %dst, i8 %0, i64 %conv, i1 false)
tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 %0, i64 %conv, i1 false)
ret void
}

declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg) #1
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

define void @test_ms2_const(i8* nocapture %dst, i32 %c) local_unnamed_addr #0 {
define void @test_ms2_const(ptr nocapture %dst, i32 %c) local_unnamed_addr #0 {
entry:
%0 = trunc i32 %c to i8
tail call void @llvm.memset.p0i8.i64(i8* align 1 %dst, i8 %0, i64 16, i1 false)
tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 %0, i64 16, i1 false)
ret void
}

define void @test_zero_const(i8* nocapture %dst) local_unnamed_addr #0 {
define void @test_zero_const(ptr nocapture %dst) local_unnamed_addr #0 {
entry:
tail call void @llvm.memset.p0i8.i64(i8* align 1 %dst, i8 0, i64 64, i1 false)
tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 0, i64 64, i1 false)
ret void
}

define void @test_ms3_const_both(i8* nocapture %dst) local_unnamed_addr #0 {
define void @test_ms3_const_both(ptr nocapture %dst) local_unnamed_addr #0 {
entry:
tail call void @llvm.memset.p0i8.i64(i8* align 1 %dst, i8 64, i64 16, i1 false)
tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 64, i64 16, i1 false)
ret void
}

define void @test_ms_vector(i8* nocapture %dst, i32 %c) local_unnamed_addr #0 {
define void @test_ms_vector(ptr nocapture %dst, i32 %c) local_unnamed_addr #0 {
entry:
%0 = trunc i32 %c to i8
tail call void @llvm.memset.p0i8.i64(i8* align 1 %dst, i8 %0, i64 16, i1 false)
tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 %0, i64 16, i1 false)
ret void
}

define void @test_ms4_const_both_unaligned(i8* nocapture %dst) local_unnamed_addr #0 {
define void @test_ms4_const_both_unaligned(ptr nocapture %dst) local_unnamed_addr #0 {
entry:
tail call void @llvm.memset.p0i8.i64(i8* align 1 %dst, i8 64, i64 18, i1 false)
tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 64, i64 18, i1 false)
ret void
}

define void @minsize(i8* nocapture %dst) minsize { unreachable }
define void @minsize(ptr nocapture %dst) minsize { unreachable }

declare void @llvm.stackprotector(i8*, i8**) #2
declare void @llvm.stackprotector(ptr, ptr) #2

attributes #0 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cyclone" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm,+zcz" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { argmemonly nounwind }
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18 changes: 9 additions & 9 deletions llvm/test/CodeGen/AArch64/GlobalISel/inline-small-memcpy.mir
View file
Expand Up @@ -4,21 +4,21 @@
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-darwin"

declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1 immarg) #1
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #1

define void @test_small_memcpy(i32* nocapture %dst, i32* nocapture readonly %src) {
define void @test_small_memcpy(ptr nocapture %dst, ptr nocapture readonly %src) {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 32, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 32, i1 false)
ret void
}

define void @test_large_memcpy(i32* nocapture %dst, i32* nocapture readonly %src) {
define void @test_large_memcpy(ptr nocapture %dst, ptr nocapture readonly %src) {
entry:
%0 = bitcast i32* %dst to i8*
%1 = bitcast i32* %src to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 36, i1 false)
%0 = bitcast ptr %dst to ptr
%1 = bitcast ptr %src to ptr
tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 36, i1 false)
ret void
}

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