Aarch64: support rN register names

[m-gupta]

Bugzilla Link	36862
Resolution	FIXED
Resolved on	Jun 11, 2018 16:18
Version	unspecified
OS	Linux
Blocks	#35997
CC	@kbeyls,@lalozano,@nickdesaulniers,@smithp35,@stephenhines,@tstellar
Fixed by commit(s)	r328829 r329669

Extended Description

Verbatim copied from https://bugs.chromium.org/p/chromium/issues/detail?id=824526

The upstream kernel commit f2d3b2e8759a ("arm/arm64: smccc: Implement SMCCC v1.1 inline primitive")
(https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f2d3b2e8759a5833df6f022e42df2d581e6d843c) uses the names "r0", "r1", ... for the general purpose registers that are usually known as "x0", "x1", ...

Use of the rN register names for arm64 is supported by gcc, but not by clang, in consequence upstream kernels and v4.14 (LTS/CrOS) currently don't build with clang for arm64.

Kernel maintainers don't seem to be inclined to use the xN names, probably also because the code in question is shared between arm64 and arm32, and arm32 registers are named rN.

"I'd say this is really a bug in Clang. Architecturally, the register in AArch64 state is still named "r0"; "x0"/"w0" are assembler operands which additionally encode the size of the corresponding access to r0."

https://lkml.org/lkml/2018/3/1/186

Maintainers might accept a fix, but expect LLVM to work on supporting rN register names for arm64 in future releases:

"It would be preferable to see evidence of the llvm community committing to fix this before we consider merging a bodge into Linux for it."

[m-gupta]

assigned to @m-gupta

[m-gupta]

I am testing a patch to handle this.

[smithp35]

Can you be a bit more specific about where in GCC "rn" is acceptable? It is certainly not true in the general case, for example:

int function(void)
{
asm("mov r0,r0\n");
return 0;
}

Error: operand 1 should be an integer register -- 'mov r0,r0'

From the kernel patch it looks like that this is only being used in restricted cases, for example register constraints. Do you have a list of what can and can't be given as "r"?

I think that if we can get to a point where we know where "r" is accepted and where it isn't, and if all the cases of where "r" is used, it doesn't matter whether the register is "x" or "w", and if we can add tests to make sure that allowing use of "r" doesn't leak into places where it shouldn't then I think this should be ok. I'm just one person though, to sample the community I suggest including the wider community including people that may use inline asm on non linux platforms, for example should this leak out into Darwin or not?

[m-gupta]

I am not aware of the requirements on "r" in GCC. Although on lkml https://lkml.org/lkml/2018/3/1/286 , this was posted as an example:

void foo(void)
{
register unsigned long reg0 asm("r0") = 0;
register unsigned int reg1 asm("r1") = 1;

asm volatile("hvc #​0" : : "r" (reg0), "r" (reg1));

}
results in:

Disassembly of section .text:

0000000000000000 :
0: d2800000 mov x0, #​0x0 // #​0
4: 52800021 mov w1, #​0x1 // #​1
8: d4000002 hvc #0x0
c: d65f03c0 ret

[m-gupta]

Peter,
My machine's gcc (6.3 and 7.2) actually works with the example you posted.

$ aarch64-linux-gnu-gcc -S aarch64_regs.c -o -
.arch armv8-a
.file "aarch64_regs.c"
.text
.align 2
.global function
.type function, %function
function:
#APP
// 3 "aarch64_regs2.c" 1
mov r0, r0

// 0 "" 2
#NO_APP
mov w0, 0
ret
.size function, .-function
.ident "GCC: (Debian 7.2.0-7) 7.2.0"
.section .note.GNU-stack,"",@progbits

[smithp35]

I've got an older gcc, 5.4, to hand (at a conference right now). It does give the same output when -S is used, however try assembling that with aarch64-linux-gnu-as (binutils 2.26.1), I think you'll see the same error that I do?

It is rare that GNU inline assembler is written down in any one place. I think the chances of getting a change accepted to clang will be larger if there is a good idea of when "r" is accepted and when it isn't. We may have to look into GCC to find this out.

At a first approximation it looks like "r" is acceptable when the compiler will choose the size of the register so that the assembler only sees "w" or "x".

[m-gupta]

I believe, assembler will only see w or x (from the example on lkml).

[m-gupta]

Submitted as https://reviews.llvm.org/rL328829

[m-gupta]

Marked this as a blocker for llvm 6.0.1 release.