Would it be relevant to support FP operations out-of-the-box (like in the IIT Delhi versions) ?

[zdimension]

i.e. FP arithmetic blocks and wiring, potentially with variable format (ability to choose mantissa / exponent width)

[maehne]

Floating point operations are expensive to implement in terms of hardware resources. Therefore, I would be wary supporting them in Logisim-evolution, because it might send the wrong signal to students learning about digital design. However, supporting representing fixed-point values and basic arithmetic operations could be interesting -- especially if those signals could then be displayed as analog step waveforms.

[MarcinOrlowski]

@egkoppel could you please join this discussion (also @BFH-ktt1)? From one hand @maehne is correct but from other, I tend to believe @egkoppel is also aware of that, so it may be good to hear his rationale behind his PR #722 . The fact that FP is expensive does not automatically mean we should not support it.

[maehne]

I agree that it would be helpful to discuss with @egkoppel his rationale here to then decide how to proceed with PR #722.

[egkoppel]

I initially came across the IITD version when looking for a way to simulate FP without the complexity and speed cost of having to simulate it from basic logic gates. However, it appeared to be fairly out of date, as well as lacking some features useful for working with FP, such an being able to directly input an FP value and have it converted to IEEE754 format.

[maehne]

Thanks for this rationale @egkoppel. If people find it useful, I am not opposed to integrate your PR #722. Maybe, a warning could be added to the components' documentation that a gate-level implementation consumes a lot of hardware resources.

[R3dst0ne]

The PR #722 adds FP components.