-
Notifications
You must be signed in to change notification settings - Fork 52
/
rtl8192d_hal_init.c
2618 lines (2265 loc) · 69.8 KB
/
rtl8192d_hal_init.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8192D_HAL_INIT_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_byteorder.h>
#include <rtw_efuse.h>
#include <hal_intf.h>
#ifdef CONFIG_USB_HCI
#include <usb_hal.h>
#endif
#include <rtl8192d_hal.h>
atomic_t GlobalMutexForGlobalAdapterList = ATOMIC_INIT(0);
atomic_t GlobalMutexForMac0_2G_Mac1_5G = ATOMIC_INIT(0);
atomic_t GlobalMutexForPowerAndEfuse = ATOMIC_INIT(0);
atomic_t GlobalMutexForPowerOnAndPowerOff = ATOMIC_INIT(0);
atomic_t GlobalMutexForFwDownload = ATOMIC_INIT(0);
#ifdef CONFIG_DUALMAC_CONCURRENT
atomic_t GlobalCounterForMutex = ATOMIC_INIT(0);
BOOLEAN GlobalFirstConfigurationForNormalChip = _TRUE;
#endif
static BOOLEAN _IsFWDownloaded(PADAPTER Adapter)
{
return ((rtw_read32(Adapter, REG_MCUFWDL) & MCUFWDL_RDY) ? _TRUE : _FALSE);
}
static VOID _FWDownloadEnable(PADAPTER Adapter, BOOLEAN enable)
{
#if 0
u32 value32 = rtw_read32(Adapter, REG_MCUFWDL);
if(enable){
value32 |= MCUFWDL_EN;
}
else{
value32 &= ~MCUFWDL_EN;
}
rtw_write32(Adapter, REG_MCUFWDL, value32);
#else
u8 tmp;
if(enable) {
#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
u8 val;
if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
#endif
// 8051 enable
tmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp|0x04);
// MCU firmware download enable.
tmp = rtw_read8(Adapter, REG_MCUFWDL);
rtw_write8(Adapter, REG_MCUFWDL, tmp|0x01);
// 8051 reset
tmp = rtw_read8(Adapter, REG_MCUFWDL+2);
rtw_write8(Adapter, REG_MCUFWDL+2, tmp&0xf7);
}
else
{
// MCU firmware download enable.
tmp = rtw_read8(Adapter, REG_MCUFWDL);
rtw_write8(Adapter, REG_MCUFWDL, tmp&0xfe);
// Reserved for fw extension. 0x81[7] is used for mac0 status ,so don't write this reg here
//rtw_write8(Adapter, REG_MCUFWDL+1, 0x00);
}
#endif
}
#ifdef CONFIG_USB_HCI
static int _BlockWrite_92d(PADAPTER Adapter, PVOID buffer, u32 size)
{
int ret = _SUCCESS;
u32 blockSize8 = sizeof(u64);
u32 blocksize4 = sizeof(u32);
u32 blockSize = 64;
u8* bufferPtr = (u8*)buffer;
u32* pu4BytePtr = (u32*)buffer;
u32 i, offset, blockCount, remainSize,remain8,remain4,blockCount8,blockCount4;
blockCount = size / blockSize;
remain8 = size % blockSize;
for(i = 0 ; i < blockCount ; i++){
offset = i * blockSize;
ret = rtw_writeN(Adapter, (FW_8192D_START_ADDRESS + offset), 64,(bufferPtr + offset));
if(ret == _FAIL)
goto exit;
}
if(remain8){
offset = blockCount * blockSize;
blockCount8=remain8/blockSize8;
remain4=remain8%blockSize8;
//RT_TRACE(COMP_INIT,DBG_LOUD,("remain4 size %x blockcount %x blockCount8 %x\n",remain4,blockCount,blockCount8));
for(i = 0 ; i < blockCount8 ; i++){
ret = rtw_writeN(Adapter, (FW_8192D_START_ADDRESS + offset+i*blockSize8), 8,(bufferPtr + offset+i*blockSize8));
if(ret == _FAIL)
goto exit;
}
if(remain4){
offset=blockCount * blockSize+blockCount8*blockSize8;
blockCount4=remain4/blocksize4;
remainSize=remain8%blocksize4;
for(i = 0 ; i < blockCount4 ; i++){
ret = rtw_write32(Adapter, (FW_8192D_START_ADDRESS + offset+i*blocksize4), cpu_to_le32(*(pu4BytePtr+ offset/4+i)));
if(ret == _FAIL)
goto exit;
}
if(remainSize){
offset=blockCount * blockSize+blockCount8*blockSize8+blockCount4*blocksize4;
for(i = 0 ; i < remainSize ; i++){
ret = rtw_write8(Adapter, (FW_8192D_START_ADDRESS + offset + i), *(bufferPtr +offset+ i));
if(ret == _FAIL)
goto exit;
}
}
}
}
exit:
return ret;
}
#endif
#ifndef CONFIG_USB_HCI
static int
_BlockWrite(
PADAPTER Adapter,
PVOID buffer,
u32 size
)
{
int ret = _SUCCESS;
u32 blockSize = sizeof(u32); // Use 4-byte write to download FW
u8* bufferPtr = (u8*)buffer;
u32* pu4BytePtr = (u32*)buffer;
u32 i, offset, blockCount, remainSize;
#ifdef CONFIG_PCI_HCI
u8 remainFW[4] = {0, 0, 0, 0};
u8 *p = NULL;
#endif
blockCount = size / blockSize;
remainSize = size % blockSize;
for(i = 0 ; i < blockCount ; i++){
offset = i * blockSize;
ret = rtw_write32(Adapter, (FW_8192D_START_ADDRESS + offset), cpu_to_le32(*(pu4BytePtr + i)));
if(ret == _FAIL)
goto exit;
}
#ifdef CONFIG_PCI_HCI
p = (u8*)((u32*)(bufferPtr + blockCount * blockSize));
if (remainSize) {
switch (remainSize) {
case 0:
break;
case 3:
remainFW[2]=*(p+2);
case 2:
remainFW[1]=*(p+1);
case 1:
remainFW[0]=*(p);
ret = rtw_write32(Adapter, (FW_8192D_START_ADDRESS + blockCount * blockSize),
le32_to_cpu(*(u32*)remainFW));
}
return ret;
}
#endif
if(remainSize){
offset = blockCount * blockSize;
bufferPtr += offset;
for(i = 0 ; i < remainSize ; i++){
ret = rtw_write8(Adapter, (FW_8192D_START_ADDRESS + offset + i), *(bufferPtr + i));
if(ret == _FAIL)
goto exit;
}
}
exit:
return ret;
}
#endif //CONFIG_USB_HCI
static int
_PageWrite(
PADAPTER Adapter,
u32 page,
PVOID buffer,
u32 size
)
{
u8 value8;
u8 u8Page = (u8) (page & 0x07) ;
value8 = (rtw_read8(Adapter, REG_MCUFWDL+2)& 0xF8 ) | u8Page ;
rtw_write8(Adapter, REG_MCUFWDL+2,value8);
#ifdef CONFIG_USB_HCI
return _BlockWrite_92d(Adapter,buffer,size);
#else
return _BlockWrite(Adapter,buffer,size);
#endif
}
#ifdef CONFIG_PCI_HCI
static VOID
_FillDummy(
u8* pFwBuf,
u32* pFwLen
)
{
u32 FwLen = *pFwLen;
u8 remain = (u8)(FwLen%4);
remain = (remain==0)?0:(4-remain);
while(remain>0)
{
pFwBuf[FwLen] = 0;
FwLen++;
remain--;
}
*pFwLen = FwLen;
}
#endif //CONFIG_PCI_HCI
static int _WriteFW(
PADAPTER Adapter,
PVOID buffer,
u32 size
)
{
int ret = _SUCCESS;
// Since we need dynamic decide method of download fw, so we call this function to get chip version.
// We can remove _ReadChipVersion from ReadAdapterInfo8192C later.
u32 pageNums,remainSize ;
u32 page,offset;
u8* bufferPtr = (u8*)buffer;
pageNums = size / MAX_PAGE_SIZE ;
remainSize = size % MAX_PAGE_SIZE;
for(page = 0; page < pageNums; page++){
offset = page *MAX_PAGE_SIZE;
ret = _PageWrite(Adapter,page, (bufferPtr+offset),MAX_PAGE_SIZE);
if(ret == _FAIL)
goto exit;
}
if(remainSize){
offset = pageNums *MAX_PAGE_SIZE;
page = pageNums;
ret = _PageWrite(Adapter,page, (bufferPtr+offset),remainSize);
if(ret == _FAIL)
goto exit;
}
DBG_8192C("_WriteFW Done- for Normal chip.\n");
exit:
return ret;
}
int _FWFreeToGo_92D(PADAPTER Adapter)
{
u32 counter = 0;
u32 value32;
// polling CheckSum report
do{
value32 = rtw_read32(Adapter, REG_MCUFWDL);
}while((counter ++ < POLLING_READY_TIMEOUT_COUNT) && (!(value32 & FWDL_ChkSum_rpt )));
if(counter >= POLLING_READY_TIMEOUT_COUNT){
DBG_8192C("chksum report faill ! REG_MCUFWDL:0x%08x .\n",value32);
return _FAIL;
}
DBG_8192C("Checksum report OK ! REG_MCUFWDL:0x%08x .\n",value32);
value32 = rtw_read32(Adapter, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
rtw_write32(Adapter, REG_MCUFWDL, value32);
return _SUCCESS;
}
VOID rtl8192d_FirmwareSelfReset(PADAPTER Adapter)
{
u8 u1bTmp;
int Delay = 300;
rtw_write8(Adapter, REG_FSIMR, 0x00);
// 2010/08/25 MH Accordign to RD alfred's suggestion, we need to disable other
// HRCV INT to influence 8051 reset.
rtw_write8(Adapter, REG_FWIMR, 0x20);
// 2011/02/15 MH According to Alex's suggestion, close mask to prevent incorrect FW write operation.
rtw_write8(Adapter, REG_FTIMR, 0x00);
//0x1cf=0x20. Inform 8051 to reset. 2009.12.25. tynli_test
rtw_write8(Adapter, REG_HMETFR+3, 0x20);
u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
while(u1bTmp&BIT2) {
Delay--;
if (Delay == 0)
break;
mdelay(1);
u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
}
if((u1bTmp&BIT2) && (Delay == 0)) {
// pr_info("FirmwareDownload92C(): Fail!!!!!! 0x03 = %x\n", u1bTmp);
rtw_write8(Adapter, REG_FWIMR, 0x00);
//debug reset fail
/* printk("FirmwareDownload Fail: 0x1c = %x, 0x130=>%08x, 0x134=>%08x, 0x138=>%08x, 0x1c4=>%08x\n, 0x1cc=>%08x, , 0x80=>%08x , 0x1c0=>%08x \n",
rtw_read32(Adapter, 0x1c),
rtw_read32(Adapter, 0x130),
rtw_read32(Adapter, 0x134),
rtw_read32(Adapter, 0x138),
rtw_read32(Adapter, 0x1c4),
rtw_read32(Adapter, 0x1cc),
rtw_read32(Adapter, 0x80),
rtw_read32(Adapter, 0x1c0)); */
}
}
//
// description :polling fw ready
//
int _FWInit(PADAPTER Adapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u32 counter = 0;
DBG_8192C("FW already have download ; \n");
// polling for FW ready
counter = 0;
do
{
if(pHalData->interfaceIndex==0){
if(rtw_read8(Adapter, FW_MAC0_ready) & mac0_ready){
DBG_8192C("Polling FW ready success!! FW_MAC0_ready:0x%x .\n",rtw_read8(Adapter, FW_MAC0_ready));
return _SUCCESS;
}
rtw_udelay_os(5);
}
else{
if(rtw_read8(Adapter, FW_MAC1_ready) &mac1_ready){
DBG_8192C("Polling FW ready success!! FW_MAC1_ready:0x%x .\n",rtw_read8(Adapter, FW_MAC1_ready));
return _SUCCESS;
}
rtw_udelay_os(5);
}
}while(counter++ < POLLING_READY_TIMEOUT_COUNT);
if(pHalData->interfaceIndex==0){
DBG_8192C("Polling FW ready fail!! MAC0 FW init not ready:0x%x .\n",rtw_read8(Adapter, FW_MAC0_ready) );
}
else{
DBG_8192C("Polling FW ready fail!! MAC1 FW init not ready:0x%x .\n",rtw_read8(Adapter, FW_MAC1_ready) );
}
DBG_8192C("Polling FW ready fail!! REG_MCUFWDL:0x%x .\n",rtw_read32(Adapter, REG_MCUFWDL));
return _FAIL;
}
#ifdef CONFIG_FILE_FWIMG
extern char *rtw_fw_file_path;
u8 FwBuffer8192D[FW_8192D_SIZE];
#endif //CONFIG_FILE_FWIMG
//
// Description:
// Download 8192C firmware code.
//
//
int FirmwareDownload92D(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw)
{
int rtStatus = _SUCCESS;
u8 writeFW_retry = 0;
u32 fwdl_start_time;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
s8 R92DFwImageFileName[] ={RTL8192D_FW_IMG};
u8* FwImage;
u32 FwImageLen;
char* pFwImageFileName;
#ifdef CONFIG_WOWLAN
u8* FwImageWoWLAN;
u32 FwImageWoWLANLen;
#endif //CONFIG_WOWLAN
PRT_FIRMWARE_92D pFirmware = NULL;
PRT_8192D_FIRMWARE_HDR pFwHdr = NULL;
u8 *pFirmwareBuf;
u32 FirmwareLen;
u8 value;
u32 count;
BOOLEAN bFwDownloaded = _FALSE,bFwDownloadInProcess = _FALSE;
if(Adapter->bSurpriseRemoved){
return _FAIL;
}
pFirmware = (PRT_FIRMWARE_92D)rtw_zvmalloc(sizeof(RT_FIRMWARE_92D));
if(!pFirmware)
{
rtStatus = _FAIL;
goto Exit;
}
pFwImageFileName = R92DFwImageFileName;
FwImage = (u8 *)Rtl8192D_FwImageArray;
FwImageLen = Rtl8192D_FwImageArrayLength;
#ifdef CONFIG_WOWLAN
FwImageWoWLAN= Rtl8192D_FwWWImageArray;
FwImageWoWLANLen =DUWWImgArrayLength ;
#endif //CONFIG_WOWLAN
DBG_8192C(" ===> FirmwareDownload92D() fw:Rtl8192D_FwImageArray\n");
#ifdef CONFIG_FILE_FWIMG
if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE)
{
DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path);
pFirmware->eFWSource = FW_SOURCE_IMG_FILE; // We should decided by Reg.
}
else
#endif //CONFIG_FILE_FWIMG
{
DBG_871X("%s accquire FW from embedded image\n", __FUNCTION__);
pFirmware->eFWSource = FW_SOURCE_HEADER_FILE;
}
switch(pFirmware->eFWSource)
{
case FW_SOURCE_IMG_FILE:
#ifdef CONFIG_FILE_FWIMG
rtStatus = rtw_retrive_from_file(rtw_fw_file_path, FwBuffer8192D, FW_8192D_SIZE);
pFirmware->ulFwLength = rtStatus>=0?rtStatus:0;
pFirmware->szFwBuffer = FwBuffer8192D;
#endif //CONFIG_FILE_FWIMG
if(pFirmware->ulFwLength <= 0)
{
rtStatus = _FAIL;
goto Exit;
}
break;
case FW_SOURCE_HEADER_FILE:
#if 0
if(ImgArrayLength > FW_8192C_SIZE){
rtStatus = _FAIL;
//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE) );
goto Exit;
}
#endif
pFirmware->szFwBuffer = FwImage;
pFirmware->ulFwLength = FwImageLen;
#ifdef CONFIG_WOWLAN
if(bUsedWoWLANFw)
{
pFirmware->szWoWLANFwBuffer=FwImageWoWLAN;
pFirmware->ulWoWLANFwLength = FwImageWoWLANLen;
}
#endif //CONFIG_WOWLAN
break;
}
#ifdef DBG_FW_STORE_FILE_PATH //used to store firmware to file...
if(pFirmware->ulFwLength > 0)
{
rtw_store_to_file(DBG_FW_STORE_FILE_PATH, pFirmware->szFwBuffer, pFirmware->ulFwLength);
}
#endif
#ifdef CONFIG_WOWLAN
if(bUsedWoWLANFw) {
pFirmwareBuf = pFirmware->szWoWLANFwBuffer;
FirmwareLen = pFirmware->ulWoWLANFwLength;
pFwHdr = (PRT_8192D_FIRMWARE_HDR)pFirmware->szWoWLANFwBuffer;
}
else
#endif //CONFIG_WOWLAN
{
pFirmwareBuf = pFirmware->szFwBuffer;
FirmwareLen = pFirmware->ulFwLength;
// To Check Fw header. Added by tynli. 2009.12.04.
pFwHdr = (PRT_8192D_FIRMWARE_HDR)pFirmware->szFwBuffer;
}
pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version);
pHalData->FirmwareSubVersion = le16_to_cpu(pFwHdr->Subversion);
DBG_8192C(" FirmwareVersion(%#x), Signature(%#x)\n", pHalData->FirmwareVersion, le16_to_cpu(pFwHdr->Signature));
if(IS_FW_HEADER_EXIST(pFwHdr))
{
//DBG_8192C("Shift 32 bytes for FW header!!\n");
pFirmwareBuf = pFirmwareBuf + 32;
FirmwareLen = FirmwareLen -32;
}
#ifdef CONFIG_WOWLAN
//write 0x5 BIT(3), don't suspend to reset MAC
if(bUsedWoWLANFw)
{
u8 test;
test = rtw_read8(Adapter, REG_APS_FSMCO+1);
test &= ~BIT(3);
rtw_write8(Adapter, REG_APS_FSMCO+1, test);
}
#endif //CONFIG_WOWLAN
ACQUIRE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY ||
pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)
{
bFwDownloaded = _IsFWDownloaded(Adapter);
if((rtw_read8(Adapter, 0x1f)&BIT5) == BIT5)
bFwDownloadInProcess = _TRUE;
else
bFwDownloadInProcess = _FALSE;
}
if(bFwDownloaded)
{
RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
goto Exit;
}
else if(bFwDownloadInProcess)
{
RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
for(count=0;count<5000;count++)
{
rtw_udelay_os(500);
ACQUIRE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
bFwDownloaded = _IsFWDownloaded(Adapter);
if((rtw_read8(Adapter, 0x1f)&BIT5) == BIT5)
bFwDownloadInProcess = _TRUE;
else
bFwDownloadInProcess = _FALSE;
RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
if(bFwDownloaded)
goto Exit;
else if(!bFwDownloadInProcess)
break;
else
DBG_8192C("Wait for another mac download fw \n");
}
ACQUIRE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
value=rtw_read8(Adapter, 0x1f);
value|=BIT5;
rtw_write8(Adapter, 0x1f,value);
RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
}
else
{
value=rtw_read8(Adapter, 0x1f);
value|=BIT5;
rtw_write8(Adapter, 0x1f,value);
RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
}
// Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself,
// or it will cause download Fw fail. 2010.02.01. by tynli.
if(rtw_read8(Adapter, REG_MCUFWDL)&BIT7) //8051 RAM code
{
DBG_871X("Firmware self reset\n");
rtl8192d_FirmwareSelfReset(Adapter);
rtw_write8(Adapter, REG_MCUFWDL, 0x00);
}
_FWDownloadEnable(Adapter, _TRUE);
fwdl_start_time = rtw_get_current_time();
while(1) {
//reset the FWDL chksum
rtw_write8(Adapter, REG_MCUFWDL, rtw_read8(Adapter, REG_MCUFWDL)|FWDL_ChkSum_rpt);
rtStatus = _WriteFW(Adapter, pFirmwareBuf, FirmwareLen);
if (rtStatus == _SUCCESS || Adapter->bDriverStopped ||
Adapter->bSurpriseRemoved || (writeFW_retry++ >= 3 &&
rtw_get_passing_time_ms(fwdl_start_time) > 500))
break;
}
_FWDownloadEnable(Adapter, _FALSE);
DBG_871X("%s writeFW_retry:%u, time after fwdl_start_time:%ums\n", __FUNCTION__
, writeFW_retry
, rtw_get_passing_time_ms(fwdl_start_time)
);
if(_SUCCESS != rtStatus){
pr_info("DL Firmware failed!\n");
goto Exit;
}
ACQUIRE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
rtStatus=_FWFreeToGo_92D(Adapter);
// download fw over,clear 0x1f[5]
value=rtw_read8(Adapter, 0x1f);
value&=(~BIT5);
rtw_write8(Adapter, 0x1f,value);
RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
if(_SUCCESS != rtStatus){
DBG_8192C("Firmware is not ready to run!\n");
goto Exit;
}
Exit:
rtStatus =_FWInit(Adapter);
if(pFirmware) {
rtw_vmfree((u8*)pFirmware, sizeof(RT_FIRMWARE_92D));
}
//RT_TRACE(COMP_INIT, DBG_LOUD, (" <=== FirmwareDownload91C()\n"));
return rtStatus;
}
#ifdef CONFIG_WOWLAN
VOID InitializeFirmwareVars92D(PADAPTER Adapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct pwrctrl_priv *pwrpriv;
pwrpriv = &Adapter->pwrctrlpriv;
// Init Fw LPS related.
Adapter->pwrctrlpriv.bFwCurrentInPSMode = _FALSE;
pwrpriv->bkeepfwalive = _TRUE;
//Init H2C counter. by tynli. 2009.12.09.
pHalData->LastHMEBoxNum = 0;
}
//===========================================
//
// Description: Prepare some information to Fw for WoWLAN.
// (1) Download wowlan Fw.
// (2) Download RSVD page packets.
// (3) Enable AP offload if needed.
//
// 2011.04.12 by tynli.
//
VOID SetFwRelatedForWoWLAN8192DU(PADAPTER padapter, u8 bHostIsGoingtoSleep)
{
int status=_FAIL;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u8 bRecover = _FALSE;
if(bHostIsGoingtoSleep)
{
//
// 1. Before WoWLAN we need to re-download WoWLAN Fw.
//
status = FirmwareDownload92D(padapter, bHostIsGoingtoSleep);
if(status != _SUCCESS)
{
DBG_8192C("ConfigFwRelatedForWoWLAN8192DU(): Re-Download Firmware failed!!\n");
return;
}
else
{
DBG_8192C("ConfigFwRelatedForWoWLAN8192DU(): Re-Download Firmware Success !!\n");
}
//
// 2. Re-Init the variables about Fw related setting.
//
InitializeFirmwareVars92D(padapter);
}
}
#endif //CONFIG_WOWLAN
//"chnl" begins from 0. It's not a real channel.
//"channel_info[chnl]" is a real channel.
static u8 Hal_GetChnlGroupfromArray(u8 chnl)
{
u8 group=0;
u8 channel_info[59] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165};
if (channel_info[chnl] <= 3) // Chanel 1-3
group = 0;
else if (channel_info[chnl] <= 9) // Channel 4-9
group = 1;
else if(channel_info[chnl] <=14) // Channel 10-14
group = 2;
// For TX_POWER_FOR_5G_BAND
else if(channel_info[chnl] <= 44)
group = 3;
else if(channel_info[chnl] <= 54)
group = 4;
else if(channel_info[chnl] <= 64)
group = 5;
else if(channel_info[chnl] <= 112)
group = 6;
else if(channel_info[chnl] <= 126)
group = 7;
else if(channel_info[chnl] <= 140)
group = 8;
else if(channel_info[chnl] <= 153)
group = 9;
else if(channel_info[chnl] <= 159)
group = 10;
else
group = 11;
return group;
}
VOID rtl8192d_ReadChipVersion(PADAPTER Adapter)
{
u32 value32;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
VERSION_8192D ChipVersion = VERSION_TEST_CHIP_88C;
value32 = rtw_read32(Adapter, REG_SYS_CFG);
DBG_871X("ReadChipVersion8192D 0xF0 = 0x%x \n", value32);
ChipVersion = (VERSION_8192D)(VERSION_NORMAL_CHIP_92D_SINGLEPHY | CHIP_92D);
//Decide TestChip or NormalChip here.
//92D's RF_type will be decided when the reg0x2c is filled.
if (!(value32 & 0x000f0000))
{ //Test or Normal Chip: hardward id 0xf0[19:16] =0 test chip
ChipVersion = VERSION_TEST_CHIP_92D_SINGLEPHY;
DBG_871X("TEST CHIP!!!\n");
}
else
{
ChipVersion = (VERSION_8192D)( ChipVersion | NORMAL_CHIP);
DBG_871X("Normal CHIP!!!\n");
}
pHalData->VersionID = ChipVersion;
}
//-------------------------------------------------------------------------
//
// Channel Plan
//
//-------------------------------------------------------------------------
VOID rtl8192d_EfuseParseChnlPlan(PADAPTER Adapter, u8 *hwinfo, BOOLEAN AutoLoadFail)
{
Adapter->mlmepriv.ChannelPlan = hal_com_get_channel_plan(
Adapter
, hwinfo?hwinfo[EEPROM_CHANNEL_PLAN]:0xFF
, Adapter->registrypriv.channel_plan
, RT_CHANNEL_DOMAIN_WORLD_WIDE_5G
, AutoLoadFail
);
DBG_871X("mlmepriv.ChannelPlan = 0x%02x\n" , Adapter->mlmepriv.ChannelPlan);
}
//-------------------------------------------------------------------------
//
// EEPROM Power index mapping
//
//-------------------------------------------------------------------------
static VOID hal_ReadPowerValueFromPROM92D(PADAPTER Adapter, PTxPowerInfo pwrInfo,
u8 *PROMContent, BOOLEAN AutoLoadFail)
{
u32 rfPath, eeAddr, group, offset1,offset2=0;
u8 i = 0;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
_rtw_memset(pwrInfo, 0, sizeof(TxPowerInfo));
if(AutoLoadFail){
for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
if(group< CHANNEL_GROUP_MAX_2G)
{
pwrInfo->CCKIndex[rfPath][group] = EEPROM_Default_TxPowerLevel_2G;
pwrInfo->HT40_1SIndex[rfPath][group] = EEPROM_Default_TxPowerLevel_2G;
}
else
{
pwrInfo->HT40_1SIndex[rfPath][group] = EEPROM_Default_TxPowerLevel_5G;
}
pwrInfo->HT40_2SIndexDiff[rfPath][group] = EEPROM_Default_HT40_2SDiff;
pwrInfo->HT20IndexDiff[rfPath][group] = EEPROM_Default_HT20_Diff;
pwrInfo->OFDMIndexDiff[rfPath][group] = EEPROM_Default_LegacyHTTxPowerDiff;
pwrInfo->HT40MaxOffset[rfPath][group] = EEPROM_Default_HT40_PwrMaxOffset;
pwrInfo->HT20MaxOffset[rfPath][group] = EEPROM_Default_HT20_PwrMaxOffset;
}
}
for(i = 0; i < 3; i++)
{
pwrInfo->TSSI_A_5G[i] = EEPROM_Default_TSSI;
pwrInfo->TSSI_B_5G[i] = EEPROM_Default_TSSI;
}
pHalData->bNOPG = _TRUE;
return;
}
//Maybe autoload OK,buf the tx power index vlaue is not filled.
//If we find it,we set it default value.
for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
for(group = 0 ; group < CHANNEL_GROUP_MAX_2G; group++){
eeAddr = EEPROM_CCK_TX_PWR_INX_2G + (rfPath * 3) + group;
pwrInfo->CCKIndex[rfPath][group] =
(PROMContent[eeAddr] == 0xFF)?(eeAddr>0x7B?EEPROM_Default_TxPowerLevel_5G:EEPROM_Default_TxPowerLevel_2G):PROMContent[eeAddr];
if(PROMContent[eeAddr] == 0xFF)
pHalData->bNOPG = _TRUE;
}
}
for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
offset1 = group / 3;
offset2 = group % 3;
eeAddr = EEPROM_HT40_1S_TX_PWR_INX_2G+ (rfPath * 3) + offset2 + offset1*21;
pwrInfo->HT40_1SIndex[rfPath][group] =
(PROMContent[eeAddr] == 0xFF)?(eeAddr>0x7B?EEPROM_Default_TxPowerLevel_5G:EEPROM_Default_TxPowerLevel_2G):PROMContent[eeAddr];
}
}
//These just for 92D efuse offset.
for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
offset1 = group / 3;
offset2 = group % 3;
if(PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G+ offset2 + offset1*21] != 0xFF)
pwrInfo->HT40_2SIndexDiff[rfPath][group] =
(PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G+ offset2 + offset1*21] >> (rfPath * 4)) & 0xF;
//RT_TRACE(COMP_INIT,DBG_LOUD,
// ("ht40_2sdiff:group:%d,%x:0x%x.\n",group,EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G+ offset2 + offset1*21,PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G+ offset2 + offset1*21]));
else
pwrInfo->HT40_2SIndexDiff[rfPath][group] = EEPROM_Default_HT40_2SDiff;
if(PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF_2G + offset2 + offset1*21] != 0xFF)
{
pwrInfo->HT20IndexDiff[rfPath][group] =
(PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF_2G+ offset2 + offset1*21] >> (rfPath * 4)) & 0xF;
if(pwrInfo->HT20IndexDiff[rfPath][group] & BIT3) //4bit sign number to 8 bit sign number
pwrInfo->HT20IndexDiff[rfPath][group] |= 0xF0;
}
else
{
pwrInfo->HT20IndexDiff[rfPath][group] = EEPROM_Default_HT20_Diff;
}
if(PROMContent[EEPROM_OFDM_TX_PWR_INX_DIFF_2G + offset2 + offset1*21] != 0xFF)
pwrInfo->OFDMIndexDiff[rfPath][group] =
(PROMContent[EEPROM_OFDM_TX_PWR_INX_DIFF_2G + offset2 + offset1*21] >> (rfPath * 4)) & 0xF;
else
pwrInfo->OFDMIndexDiff[rfPath][group] = EEPROM_Default_LegacyHTTxPowerDiff;
if(PROMContent[EEPROM_HT40_MAX_PWR_OFFSET_2G + offset2 + offset1*21] != 0xFF)
pwrInfo->HT40MaxOffset[rfPath][group] =
(PROMContent[EEPROM_HT40_MAX_PWR_OFFSET_2G + offset2 + offset1*21] >> (rfPath * 4)) & 0xF;
else
pwrInfo->HT40MaxOffset[rfPath][group] = EEPROM_Default_HT40_PwrMaxOffset;
if(PROMContent[EEPROM_HT20_MAX_PWR_OFFSET_2G + offset2 + offset1*21] != 0xFF)
pwrInfo->HT20MaxOffset[rfPath][group] =
(PROMContent[EEPROM_HT20_MAX_PWR_OFFSET_2G + offset2 + offset1*21] >> (rfPath * 4)) & 0xF;
else
pwrInfo->HT20MaxOffset[rfPath][group] = EEPROM_Default_HT20_PwrMaxOffset;
}
}
if(PROMContent[EEPROM_TSSI_A_5G] != 0xFF){
//5GL
pwrInfo->TSSI_A_5G[0] = PROMContent[EEPROM_TSSI_A_5G] & 0x3F; //[0:5]
pwrInfo->TSSI_B_5G[0] = PROMContent[EEPROM_TSSI_B_5G] & 0x3F;
//5GM
pwrInfo->TSSI_A_5G[1] = PROMContent[EEPROM_TSSI_AB_5G] & 0x3F;
pwrInfo->TSSI_B_5G[1] = (PROMContent[EEPROM_TSSI_AB_5G] & 0xC0) >> 6 |
(PROMContent[EEPROM_TSSI_AB_5G+1] & 0x0F) << 2;
//5GH
pwrInfo->TSSI_A_5G[2] = (PROMContent[EEPROM_TSSI_AB_5G+1] & 0xF0) >> 4 |
(PROMContent[EEPROM_TSSI_AB_5G+2] & 0x03) << 4;
pwrInfo->TSSI_B_5G[2] = (PROMContent[EEPROM_TSSI_AB_5G+2] & 0xFC) >> 2 ;
}
else
{
for(i = 0; i < 3; i++)
{
pwrInfo->TSSI_A_5G[i] = EEPROM_Default_TSSI;
pwrInfo->TSSI_B_5G[i] = EEPROM_Default_TSSI;
}
}
}
VOID
rtl8192d_ReadTxPowerInfo(
PADAPTER Adapter,
u8* PROMContent,
BOOLEAN AutoLoadFail
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
TxPowerInfo pwrInfo;
u32 rfPath, ch, group;
u8 pwr, diff,tempval[2], i;
hal_ReadPowerValueFromPROM92D(Adapter, &pwrInfo, PROMContent, AutoLoadFail);
if(!AutoLoadFail)
{
pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_OPT1]&0x7); //bit0~2
pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER]&0x1f;
pHalData->CrystalCap = PROMContent[EEPROM_XTAL_K];
tempval[0] = PROMContent[EEPROM_IQK_DELTA]&0x03;
tempval[1] = (PROMContent[EEPROM_LCK_DELTA]&0x0C) >> 2;
pHalData->bTXPowerDataReadFromEEPORM = _TRUE;
if(IS_92D_D_CUT(pHalData->VersionID)||IS_92D_E_CUT(pHalData->VersionID))
{
pHalData->InternalPA5G[0] = !((PROMContent[EEPROM_TSSI_A_5G] & BIT6) >> 6);
pHalData->InternalPA5G[1] = !((PROMContent[EEPROM_TSSI_B_5G] & BIT6) >> 6);
DBG_8192C("Is D/E cut,Internal PA0 %d Internal PA1 %d\n",pHalData->InternalPA5G[0],pHalData->InternalPA5G[1]);
}
pHalData->EEPROMC9 = PROMContent[EEPROM_RF_OPT6];
pHalData->EEPROMCC = PROMContent[EEPROM_RF_OPT7];
}
else
{
pHalData->EEPROMRegulatory = 0;
pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
pHalData->CrystalCap = EEPROM_Default_CrystalCap;
tempval[0] = tempval[1] = 3;
}
pHalData->PAMode = PA_MODE_INTERNAL_SP3T;
if(pHalData->EEPROMC9 == 0xFF || AutoLoadFail)
{
switch(pHalData->PAMode)
{
//external pa
case 0:
pHalData->EEPROMC9 = EEPROM_Default_externalPA_C9;
pHalData->EEPROMCC = EEPROM_Default_externalPA_CC;
pHalData->InternalPA5G[0] = _FALSE;
pHalData->InternalPA5G[1] = _FALSE;
break;
// internal pa - SP3T