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The driver has been handy thanks!
In making some changes for my particular application I noticed something odd with a register set.
Is it intentional, or was something else intended?
In MPU6886.cpp register MPU6886_INT_PIN_CFG (0x37) is set to 0x22.
So setting to 1 the bit1 position.
The driver has been handy thanks!
In making some changes for my particular application I noticed something odd with a register set.
Is it intentional, or was something else intended?
In MPU6886.cpp register MPU6886_INT_PIN_CFG (0x37) is set to 0x22.
So setting to 1 the bit1 position.
However the datasheet https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/MPU-6886-000193%2Bv1.1_GHIC_en.pdf
suggests the bottom bits are Reserved.
What was intended?
Thanks again.
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