thor: I/O APIC IRQs don't start off masked

[64]

This causes some spurious unacknowledged IRQs on my PC.

We should start IRQs masked here:

managarm/kernel/thor/arch/x86/pic.cpp

Lines 730 to 735 in 1173d90

	_chip->_storeRegister(kIoApicInts + _index * 2 + 1,
	static_cast<uint32_t>(pin_word2::destination(0)));
	_chip->_storeRegister(kIoApicInts + _index * 2,
	static_cast<uint32_t>(pin_word1::vector(_vector)
	| pin_word1::deliveryMode(0) | pin_word1::levelTriggered(_levelTriggered)
	| pin_word1::activeLow(_activeLow)));

Then the driver responsible can unmask it when it's ready. For PCI devices, it makes sense to do this in enableIrq(), but for non-PCI devices I'm not sure.

[circutrider21]

I thought limine left all IRQs masked, since afaik, it's in the stivale spec. Were you using multiboot by any chance?

[qookei]

Were you using multiboot by any chance?

We use multiboot 1/2.

[circutrider21]

Ahh, that explains it then

[ArsenArsen]

isn't stivale gone anyway

[qookei]

Then the driver responsible can unmask it when it's ready. For PCI devices, it makes sense to do this in enableIrq(), but for non-PCI devices I'm not sure.

Once we get around to reporting all devices via the HW protocol, it could be done in the same way.