CHK, DIVU, DIVS trap case cycles differs from Musashi

[marhel]

Since 80adcfc we differ from Musashi for instructions taking trap paths (CHK, DIVS, DIVU for now). This is on purpose, as we think Musashi incorrectly includes instruction cycles even in the trap case, which we no longer do.

Consider a PR to Musashi to fix this (could probably try do deduct instruction cycles just before taking the trap) or adding some config to our QC to ignore cycle count differences on some ops.

[marhel]

I think if we don't open PRs, we should at least consider opening issues in Musashi for the various differing cycle counts (now also the Scc + reg instructions) in order to keep track of them and increase the off chance that someone else fixes that in Musashi ;)

[emoon]

Indeed

[emoon]

I think it would be fine for now to open issues and maybe do some fixes later.

[marhel]

Now we have multiple workarounds for this in place - we now both ignore cycles when an CHK or 0DIV exception occurs, and have gotten a few PRs accepted for undoing the instruction cycles in TRAP/TRAP#n exceptions. The former could perhaps be removed once we verify that the cycle result for the exception cases are as expected.

[marhel]

I forgot to mention that even after the PRs, ignoring cycles are still needed, because there are still differences, because Musashi does not take EA-calculation time into account for TRAP/TRAP#n, and thus returns a constant value regardless of EA-mode of the instruction.

[emoon]

Ah I see