forked from kaigai/nvme-kmod
/
nvme_strom.c
2369 lines (2115 loc) · 59.2 KB
/
nvme_strom.c
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/*
* NVMe-Strom
*
* A Linux kernel driver to support SSD-to-GPU direct stream.
*
*
*
*
*/
#include <asm/cpufeature.h>
#include <asm/uaccess.h>
#ifdef CONFIG_X86_64
#include <asm/i387.h>
#endif
#include <linux/buffer_head.h>
#include <linux/crc32c.h>
#include <linux/file.h>
#include <linux/fs.h>
#include <linux/kallsyms.h>
#include <linux/kernel.h>
#include <linux/magic.h>
#include <linux/major.h>
#include <linux/moduleparam.h>
#include <linux/nvme.h>
#include <linux/proc_fs.h>
#include <linux/sched.h>
#include <linux/version.h>
#include <generated/utsrelease.h>
#include "nv-p2p.h"
#include "nvme_strom.h"
/* turn on/off debug message */
static int nvme_strom_debug = 1;
module_param(nvme_strom_debug, int, 0644);
MODULE_PARM_DESC(nvme_strom_debug, "");
/* check the target kernel to build */
#if defined(RHEL_MAJOR) && (RHEL_MAJOR == 7)
#define STROM_TARGET_KERNEL_RHEL7 1
#else
#error Not a supported Linux kernel
#endif
/* utility macros */
#define Assert(cond) \
do { \
if (!(cond)) { \
panic("assertion failure (" #cond ") at %s:%d, %s\n", \
__FILE__, __LINE__, __FUNCTION__); \
} \
} while(0)
#define lengthof(array) (sizeof (array) / sizeof ((array)[0]))
#define Max(a,b) ((a) > (b) ? (a) : (b))
#define Min(a,b) ((a) < (b) ? (a) : (b))
/* message verbosity control */
static int verbose = 0;
module_param(verbose, int, 1);
MODULE_PARM_DESC(verbose, "turn on/off debug message");
#define prDebug(fmt, ...) \
do { \
if (verbose > 1) \
printk(KERN_ALERT "nvme-strom(%s:%d): " fmt "\n", \
__FUNCTION__, __LINE__, ##__VA_ARGS__); \
else if (verbose) \
printk(KERN_ALERT "nvme-strom: " fmt "\n", ##__VA_ARGS__); \
} while(0)
#define prInfo(fmt, ...) \
do { \
if (verbose) \
printk(KERN_INFO "nvme-strom: " fmt "\n", ##__VA_ARGS__); \
} while(0)
#define prNotice(fmt, ...) \
do { \
printk(KERN_NOTICE "nvme-strom: " fmt "\n", ##__VA_ARGS__); \
} while(0)
#define prWarn(fmt, ...) \
do { \
printk(KERN_WARNING "nvme-strom: " fmt "\n", ##__VA_ARGS__); \
} while(0)
#define prError(fmt, ...) \
do { \
printk(KERN_ERR "nvme-strom: " fmt "\n", ##__VA_ARGS__); \
} while(0)
/* routines for extra symbols */
#include "extra_ksyms.c"
/*
* for boundary alignment requirement
*/
#define GPU_BOUND_SHIFT 16
#define GPU_BOUND_SIZE ((u64)1 << GPU_BOUND_SHIFT)
#define GPU_BOUND_OFFSET (GPU_BOUND_SIZE-1)
#define GPU_BOUND_MASK (~GPU_BOUND_OFFSET)
/* procfs entry of "/proc/nvme-strom" */
static struct proc_dir_entry *nvme_strom_proc = NULL;
/*
* ================================================================
*
* Routines to map/unmap GPU device memory segment
*
* ================================================================
*/
struct mapped_gpu_memory
{
struct list_head chain; /* chain to the strom_mgmem_slots[] */
int hindex; /* index of the hash slot */
int refcnt; /* number of the concurrent tasks */
kuid_t owner; /* effective user-id who mapped this
* device memory */
unsigned long handle; /* identifier of this entry */
unsigned long map_address;/* virtual address of the device memory
* (note: just for message output) */
unsigned long map_offset; /* offset from the H/W page boundary */
unsigned long map_length; /* length of the mapped area */
struct task_struct *wait_task; /* task waiting for DMA completion */
size_t gpu_page_sz;/* page size in bytes; note that
* 'page_size' of nvidia_p2p_page_table_t
* is one of NVIDIA_P2P_PAGE_SIZE_* */
size_t gpu_page_shift; /* log2 of gpu_page_sz */
nvidia_p2p_page_table_t *page_table;
/*
* NOTE: User supplied virtual address of device memory may not be
* aligned to the hardware page boundary of GPUs. So, we may need to
* map the least device memory that wraps the region (vaddress ...
* vaddress + length) entirely.
* The 'map_offset' is offset of the 'vaddress' from the head of H/W
* page boundary. So, if application wants to kick DMA to the location
* where handle=1234 and offset=2000 and map_offset=500, the driver
* will set up DMA towards the offset=2500 from the head of mapped
* physical pages.
*/
/*
* NOTE: Once a mapped_gpu_memory is registered, it can be released
* on random timing, by cuFreeMem(), process termination and etc...
* If refcnt > 0, it means someone's P2P DMA is in-progress, so
* cleanup routine (that shall be called by nvidia driver) has to
* wait for completion of these operations. However, mapped_gpu_memory
* shall be released immediately not to use this region any more.
*/
};
typedef struct mapped_gpu_memory mapped_gpu_memory;
#define MAPPED_GPU_MEMORY_NSLOTS 48
static spinlock_t strom_mgmem_locks[MAPPED_GPU_MEMORY_NSLOTS];
static struct list_head strom_mgmem_slots[MAPPED_GPU_MEMORY_NSLOTS];
/*
* strom_mapped_gpu_memory_index - index of strom_mgmem_mutex/slots
*/
static inline int
strom_mapped_gpu_memory_index(unsigned long handle)
{
u32 hash = arch_fast_hash(&handle, sizeof(unsigned long),
0x20140702);
return hash % MAPPED_GPU_MEMORY_NSLOTS;
}
/*
* strom_get_mapped_gpu_memory
*/
static mapped_gpu_memory *
strom_get_mapped_gpu_memory(unsigned long handle)
{
int index = strom_mapped_gpu_memory_index(handle);
spinlock_t *lock = &strom_mgmem_locks[index];
struct list_head *slot = &strom_mgmem_slots[index];
unsigned long flags;
mapped_gpu_memory *mgmem;
spin_lock_irqsave(lock, flags);
list_for_each_entry(mgmem, slot, chain)
{
if (mgmem->handle == handle &&
uid_eq(mgmem->owner, current_euid()))
{
/* sanity checks */
Assert((unsigned long)mgmem == handle);
Assert(mgmem->hindex == index);
mgmem->refcnt++;
spin_unlock_irqrestore(lock, flags);
return mgmem;
}
}
spin_unlock_irqrestore(lock, flags);
prError("P2P GPU Memory (handle=%lx) not found", handle);
return NULL; /* not found */
}
/*
* strom_put_mapped_gpu_memory
*/
static void
strom_put_mapped_gpu_memory(mapped_gpu_memory *mgmem)
{
int index = mgmem->hindex;
spinlock_t *lock = &strom_mgmem_locks[index];
unsigned long flags;
spin_lock_irqsave(lock, flags);
Assert(mgmem->refcnt > 0);
if (--mgmem->refcnt == 0)
{
if (mgmem->wait_task != NULL)
{
wake_up_process(mgmem->wait_task);
mgmem->wait_task = NULL;
}
}
spin_unlock_irqrestore(lock, flags);
}
/*
* callback_release_mapped_gpu_memory
*/
static void
callback_release_mapped_gpu_memory(void *private)
{
mapped_gpu_memory *mgmem = private;
spinlock_t *lock = &strom_mgmem_locks[mgmem->hindex];
unsigned long handle = mgmem->handle;
unsigned long flags;
int rc;
/* sanity check */
Assert((unsigned long)mgmem == handle);
spin_lock_irqsave(lock, flags);
/*
* Detach this mapped GPU memory from the global list first, if
* application didn't unmap explicitly.
*/
if (mgmem->chain.next || mgmem->chain.prev)
{
list_del(&mgmem->chain);
memset(&mgmem->chain, 0, sizeof(struct list_head));
}
/*
* wait for completion of the concurrent DMA tasks, if any tasks
* are running.
*/
if (mgmem->refcnt > 0)
{
struct task_struct *wait_task_saved = mgmem->wait_task;
mgmem->wait_task = current;
/* sleep until refcnt == 0 */
set_current_state(TASK_UNINTERRUPTIBLE);
spin_unlock_irqrestore(lock, flags);
schedule();
if (wait_task_saved)
wake_up_process(wait_task_saved);
spin_lock_irqsave(lock, flags);
Assert(mgmem->refcnt == 0);
}
spin_unlock_irqrestore(lock, flags);
/*
* OK, no concurrent task does not use this mapped GPU memory region
* at this point. So, we can release the page table and relevant safely.
*/
rc = __nvidia_p2p_free_page_table(mgmem->page_table);
if (rc)
prError("nvidia_p2p_free_page_table (handle=0x%lx, rc=%d)",
handle, rc);
kfree(mgmem);
prNotice("P2P GPU Memory (handle=%p) was released", (void *)handle);
module_put(THIS_MODULE);
}
/*
* ioctl_map_gpu_memory
*
* ioctl(2) handler for STROM_IOCTL__MAP_GPU_MEMORY
*/
static int
ioctl_map_gpu_memory(StromCmd__MapGpuMemory __user *uarg)
{
StromCmd__MapGpuMemory karg;
mapped_gpu_memory *mgmem;
unsigned long map_address;
unsigned long map_offset;
unsigned long handle;
unsigned long flags;
uint32_t entries;
int rc;
if (copy_from_user(&karg, uarg, sizeof(karg)))
return -EFAULT;
mgmem = kmalloc(sizeof(mapped_gpu_memory), GFP_KERNEL);
if (!mgmem)
return -ENOMEM;
map_address = karg.vaddress & GPU_BOUND_MASK;
map_offset = karg.vaddress & GPU_BOUND_OFFSET;
handle = (unsigned long) mgmem;
INIT_LIST_HEAD(&mgmem->chain);
mgmem->hindex = strom_mapped_gpu_memory_index(handle);
mgmem->refcnt = 0;
mgmem->owner = current_euid();
mgmem->handle = handle;
mgmem->map_address = map_address;
mgmem->map_offset = map_offset;
mgmem->map_length = map_offset + karg.length;
mgmem->wait_task = NULL;
rc = __nvidia_p2p_get_pages(0, /* p2p_token; deprecated */
0, /* va_space_token; deprecated */
mgmem->map_address,
mgmem->map_length,
&mgmem->page_table,
callback_release_mapped_gpu_memory,
mgmem);
if (rc)
{
prError("failed on nvidia_p2p_get_pages(addr=%p, len=%zu), rc=%d",
(void *)map_address, (size_t)map_offset + karg.length, rc);
goto error_1;
}
/* page size in bytes */
switch (mgmem->page_table->page_size)
{
case NVIDIA_P2P_PAGE_SIZE_4KB:
mgmem->gpu_page_sz = 4 * 1024;
mgmem->gpu_page_shift = 12;
break;
case NVIDIA_P2P_PAGE_SIZE_64KB:
mgmem->gpu_page_sz = 64 * 1024;
mgmem->gpu_page_shift = 16;
break;
case NVIDIA_P2P_PAGE_SIZE_128KB:
mgmem->gpu_page_sz = 128 * 1024;
mgmem->gpu_page_shift = 17;
break;
default:
rc = -EINVAL;
goto error_2;
}
/* return the handle of mapped_gpu_memory */
entries = mgmem->page_table->entries;
if (put_user(mgmem->handle, &uarg->handle) ||
put_user(mgmem->gpu_page_sz, &uarg->gpu_page_sz) ||
put_user(entries, &uarg->gpu_npages))
{
rc = -EFAULT;
goto error_2;
}
prNotice("P2P GPU Memory (handle=%p) mapped "
"(version=%u, page_size=%zu, entries=%u)",
(void *)mgmem->handle,
mgmem->page_table->version,
mgmem->gpu_page_sz,
mgmem->page_table->entries);
/*
* Warning message if mapped device memory is not aligned well
*/
if ((mgmem->map_offset & (PAGE_SIZE - 1)) != 0 ||
(mgmem->map_length & (PAGE_SIZE - 1)) != 0)
{
prWarn("Gpu memory mapping (handle=%lx) is not aligned well "
"(map_offset=%lx map_length=%lx). "
"It may be inconvenient to submit DMA requests",
mgmem->handle,
mgmem->map_offset,
mgmem->map_length);
}
__module_get(THIS_MODULE);
/* attach this mapped_gpu_memory */
spin_lock_irqsave(&strom_mgmem_locks[mgmem->hindex], flags);
list_add(&mgmem->chain, &strom_mgmem_slots[mgmem->hindex]);
spin_unlock_irqrestore(&strom_mgmem_locks[mgmem->hindex], flags);
return 0;
error_2:
__nvidia_p2p_put_pages(0, 0, mgmem->map_address, mgmem->page_table);
error_1:
kfree(mgmem);
return rc;
}
/*
* ioctl_unmap_gpu_memory
*
* ioctl(2) handler for STROM_IOCTL__UNMAP_GPU_MEMORY
*/
static int
ioctl_unmap_gpu_memory(StromCmd__UnmapGpuMemory __user *uarg)
{
StromCmd__UnmapGpuMemory karg;
mapped_gpu_memory *mgmem;
spinlock_t *lock;
struct list_head *slot;
unsigned long flags;
int i, rc;
if (copy_from_user(&karg, uarg, sizeof(karg)))
return -EFAULT;
i = strom_mapped_gpu_memory_index(karg.handle);
lock = &strom_mgmem_locks[i];
slot = &strom_mgmem_slots[i];
spin_lock_irqsave(lock, flags);
list_for_each_entry(mgmem, slot, chain)
{
/*
* NOTE: I'm not 100% certain whether PID is the right check to
* determine availability of the virtual address of GPU device.
* So, this behavior may be changed in the later version.
*/
if (mgmem->handle == karg.handle &&
uid_eq(mgmem->owner, current_euid()))
{
list_del(&mgmem->chain);
memset(&mgmem->chain, 0, sizeof(struct list_head));
spin_unlock_irqrestore(lock, flags);
rc = __nvidia_p2p_put_pages(0, 0,
mgmem->map_address,
mgmem->page_table);
if (rc)
prError("failed on nvidia_p2p_put_pages: %d", rc);
return rc;
}
}
spin_unlock_irqrestore(lock, flags);
prError("no mapped GPU memory found (handle: %lx)", karg.handle);
return -ENOENT;
}
/*
* ioctl_list_gpu_memory
*
* ioctl(2) handler for STROM_IOCTL__LIST_GPU_MEMORY
*/
static int
ioctl_list_gpu_memory(StromCmd__ListGpuMemory __user *uarg)
{
StromCmd__ListGpuMemory karg;
spinlock_t *lock;
struct list_head *slot;
unsigned long flags;
mapped_gpu_memory *mgmem;
int i, j;
int retval = 0;
if (copy_from_user(&karg, uarg,
offsetof(StromCmd__ListGpuMemory, handles)))
return -EFAULT;
karg.nitems = 0;
for (i=0; i < MAPPED_GPU_MEMORY_NSLOTS; i++)
{
lock = &strom_mgmem_locks[i];
slot = &strom_mgmem_slots[i];
spin_lock_irqsave(lock, flags);
list_for_each_entry(mgmem, slot, chain)
{
j = karg.nitems++;
if (j < karg.nrooms)
{
if (put_user(mgmem->handle, &uarg->handles[j]))
retval = -EFAULT;
}
else
retval = -ENOBUFS;
}
spin_unlock_irqrestore(lock, flags);
}
/* write back */
if (copy_to_user(uarg, &karg,
offsetof(StromCmd__ListGpuMemory, handles)))
retval = -EFAULT;
return retval;
}
/*
* ioctl_info_gpu_memory
*
* ioctl(2) handler for STROM_IOCTL__INFO_GPU_MEMORY
*/
static int
ioctl_info_gpu_memory(StromCmd__InfoGpuMemory __user *uarg)
{
StromCmd__InfoGpuMemory karg;
mapped_gpu_memory *mgmem;
nvidia_p2p_page_table_t *page_table;
size_t length;
int i, rc = 0;
length = offsetof(StromCmd__InfoGpuMemory, paddrs);
if (copy_from_user(&karg, uarg, length))
return -EFAULT;
mgmem = strom_get_mapped_gpu_memory(karg.handle);
if (!mgmem)
return -ENOENT;
page_table = mgmem->page_table;
karg.nitems = page_table->entries;
karg.version = page_table->version;
karg.gpu_page_sz = mgmem->gpu_page_sz;
karg.owner = __kuid_val(mgmem->owner);
karg.map_offset = mgmem->map_offset;
karg.map_length = mgmem->map_length;
if (copy_to_user((void __user *)uarg, &karg, length))
rc = -EFAULT;
else
{
for (i=0; i < page_table->entries; i++)
{
if (i >= karg.nrooms)
{
rc = -ENOBUFS;
break;
}
if (put_user(page_table->pages[i]->physical_address,
&uarg->paddrs[i]))
{
rc = -EFAULT;
break;
}
}
}
strom_put_mapped_gpu_memory(mgmem);
return rc;
}
/*
* ioctl_check_file - checks whether the supplied file descriptor is
* capable to perform P2P DMA from NVMe SSD.
* Here are various requirement on filesystem / devices.
*
* - application has permission to read the file.
* - filesystem has to be Ext4 or XFS, because Linux has no portable way
* to identify device blocks underlying a particular range of the file.
* - block device of the file has to be NVMe-SSD, managed by the inbox
* driver of Linux. RAID configuration is not available to use.
* - file has to be larger than or equal to PAGE_SIZE, because Ext4/XFS
* are capable to have file contents inline, for very small files.
*/
#define XFS_SB_MAGIC 0x58465342
static int
source_file_is_supported(struct file *filp, struct nvme_ns **p_nvme_ns)
{
struct inode *f_inode = filp->f_inode;
struct super_block *i_sb = f_inode->i_sb;
struct file_system_type *s_type = i_sb->s_type;
struct block_device *s_bdev = i_sb->s_bdev;
struct gendisk *bd_disk = s_bdev->bd_disk;
struct nvme_ns *nvme_ns = (struct nvme_ns *)bd_disk->private_data;
const char *dname;
int rc;
/*
* must have READ permission of the source file
*/
if ((filp->f_mode & FMODE_READ) == 0)
{
prError("process (pid=%u) has no permission to read file",
current->pid);
return -EACCES;
}
/*
* check whether it is on supported filesystem
*
* MEMO: Linux VFS has no reliable way to lookup underlying block
* number of individual files (and, may be impossible in some
* filesystems), so our module solves file offset <--> block number
* on a part of supported filesystems.
*
* supported: ext4, xfs
*/
if (!((i_sb->s_magic == EXT4_SUPER_MAGIC &&
strcmp(s_type->name, "ext4") == 0 &&
s_type->owner == mod_ext4_get_block) ||
(i_sb->s_magic == XFS_SB_MAGIC &&
strcmp(s_type->name, "xfs") == 0 &&
s_type->owner == mod_xfs_get_blocks)))
{
prError("file_system_type name=%s, not supported", s_type->name);
return -ENOTSUPP;
}
/*
* check whether the file size is, at least, more than PAGE_SIZE
*
* MEMO: It is a rough alternative to prevent inline files on Ext4/XFS.
* Contents of these files are stored with inode, instead of separate
* data blocks. It usually makes no sense on SSD-to-GPU Direct fature.
*/
spin_lock(&f_inode->i_lock);
if (f_inode->i_size < PAGE_SIZE)
{
unsigned long i_size = f_inode->i_size;
spin_unlock(&f_inode->i_lock);
prError("file size too small (%lu bytes), not suitable", i_size);
return -ENOTSUPP;
}
spin_unlock(&f_inode->i_lock);
/*
* check whether underlying block device is NVMe-SSD
*
* MEMO: Our assumption is, the supplied file is located on NVMe-SSD,
* with other software layer (like dm-based RAID1).
*/
/* 'devext' shall wrap NVMe-SSD device */
if (bd_disk->major != BLOCK_EXT_MAJOR)
{
prError("block device major number = %d, not 'blkext'",
bd_disk->major);
return -ENOTSUPP;
}
/* disk_name should be 'nvme%dn%d' */
dname = bd_disk->disk_name;
if (dname[0] == 'n' &&
dname[1] == 'v' &&
dname[2] == 'm' &&
dname[3] == 'e')
{
const char *pos = dname + 4;
const char *pos_saved = pos;
while (*pos >= '0' && *pos <= '9')
pos++;
if (pos != pos_saved && *pos == 'n')
{
pos_saved = ++pos;
while (*pos >= '0' && *pos <= '9')
pos++;
if (pos != pos_saved && *pos == '\0')
dname = NULL; /* OK, it is NVMe-SSD */
}
}
if (dname)
{
prError("block device '%s' is not supported", dname);
return -ENOTSUPP;
}
/* try to call ioctl */
if (!bd_disk->fops->ioctl)
{
prError("block device '%s' does not provide ioctl",
bd_disk->disk_name);
return -ENOTSUPP;
}
rc = bd_disk->fops->ioctl(s_bdev, 0, NVME_IOCTL_ID, 0UL);
if (rc < 0)
{
prError("ioctl(NVME_IOCTL_ID) on '%s' returned an error: %d",
bd_disk->disk_name, rc);
return -ENOTSUPP;
}
/*
* check block size of the device.
*/
if (i_sb->s_blocksize > PAGE_CACHE_SIZE)
{
prError("block size of '%s' is %zu; larger than PAGE_CACHE_SIZE",
bd_disk->disk_name, (size_t)i_sb->s_blocksize);
return -ENOTSUPP;
}
if (p_nvme_ns)
*p_nvme_ns = nvme_ns;
/* OK, we assume the underlying device is supported NVMe-SSD */
return 0;
}
/*
* strom_get_block - a generic version of get_block_t for the supported
* filesystems. It assumes the target filesystem is already checked by
* source_file_is_supported, so we have minimum checks here.
*/
static inline int
strom_get_block(struct inode *inode, sector_t iblock,
struct buffer_head *bh, int create)
{
struct super_block *i_sb = inode->i_sb;
if (i_sb->s_magic == EXT4_SUPER_MAGIC)
return __ext4_get_block(inode, iblock, bh, create);
else if (i_sb->s_magic == XFS_SB_MAGIC)
return __xfs_get_blocks(inode, iblock, bh, create);
else
return -ENOTSUPP;
}
/*
* ioctl_check_file
*
* ioctl(2) handler for STROM_IOCTL__CHECK_FILE
*/
static int
ioctl_check_file(StromCmd__CheckFile __user *uarg)
{
StromCmd__CheckFile karg;
struct file *filp;
struct nvme_ns *nvme_ns;
int rc;
if (copy_from_user(&karg, uarg, sizeof(karg)))
return -EFAULT;
filp = fget(karg.fdesc);
if (!filp)
return -EBADF;
rc = source_file_is_supported(filp, &nvme_ns);
fput(filp);
return (rc < 0 ? rc : 0);
}
/* ================================================================
*
* Main part for SSD-to-GPU P2P DMA
*
*
*
*
*
* ================================================================
*/
/*
* NOTE: It looks to us Intel 750 SSD does not accept DMA request larger
* than 128KB. However, we are not certain whether it is restriction for
* all the NVMe-SSD devices. Right now, 128KB is a default of the max unit
* length of DMA request.
*/
#define STROM_DMA_SSD2GPU_MAXLEN (128 * 1024)
struct strom_dma_task
{
struct list_head chain;
unsigned long dma_task_id;/* ID of this DMA task */
int hindex; /* index of hash slot */
int refcnt; /* reference counter */
struct file *filp; /* source file */
mapped_gpu_memory *mgmem; /* destination GPU memory segment */
wait_queue_head_t wait_tasks; /* waitq for the tasks that are waiting */
/*
* status of asynchronous tasks
*
* MEMO: Pay attention to error status of the asynchronous tasks.
* Asynchronous task may cause errors on random timing, and kernel
* space wants to inform this status on the next call. On the other
* hands, application may invoke ioctl(2) to reference DMA results,
* but may not. So, we have to keep an error status somewhere, but
* also needs to be released on appropriate timing; to avoid kernel
* memory leak by rude applications.
* If any errors, we attach strom_dma_task structure on file handler
* used for ioctl(2). The error status shall be reclaimed on the
* next time when application wait for a particular DMA task, or
* this file handler is closed.
*/
long dma_status;
struct file *ioctl_filp;
};
typedef struct strom_dma_task strom_dma_task;
struct strom_dma_state
{
strom_dma_task *dtask;
struct nvme_ns *nvme_ns; /* NVMe namespace (=SCSI LUN) */
size_t blocksz; /* blocksize of this partition */
int blocksz_shift; /* log2 of 'blocksz' */
sector_t start_sect; /* first sector of the source partition */
sector_t nr_sects; /* number of sectors of the partition */
/* Contiguous SSD blocks */
sector_t src_block; /* head of the source blocks */
unsigned int nr_blocks; /* # of the contigunous source blocks */
unsigned int max_nblocks;/* upper limit of @nr_blocks */
size_t dest_offset;/* destination offset of the pending req */
/* Current position of the destination GPU page */
char *dest_iomap; /* current mapped destination page */
int dest_index; /* current index of the destination page */
/* Buffer to keep pages in a chunk */
struct page *file_pages[STROM_DMA_SSD2GPU_MAXLEN / PAGE_SIZE + 1];
};
typedef struct strom_dma_state strom_dma_state;
#define STROM_DMA_TASK_NSLOTS 100
static spinlock_t strom_dma_task_locks[STROM_DMA_TASK_NSLOTS];
static struct list_head strom_dma_task_slots[STROM_DMA_TASK_NSLOTS];
static struct list_head failed_dma_task_slots[STROM_DMA_TASK_NSLOTS];
/*
* strom_dma_task_index
*/
static inline int
strom_dma_task_index(unsigned long dma_task_id)
{
u32 hash = arch_fast_hash(&dma_task_id, sizeof(unsigned long),
0x20120106);
return hash % STROM_DMA_TASK_NSLOTS;
}
/*
* strom_create_dma_task
*/
static long
strom_create_dma_task(struct strom_dma_state *dstate,
unsigned long handle,
int fdesc,
struct file *ioctl_filp)
{
mapped_gpu_memory *mgmem;
strom_dma_task *dtask;
struct file *filp;
struct super_block *i_sb;
struct block_device *s_bdev;
struct nvme_ns *nvme_ns;
long retval;
unsigned long flags;
/* ensure the source file is supported */
filp = fget(fdesc);
if (!filp)
{
prError("file descriptor %d of process %u is not available",
fdesc, current->tgid);
return -EBADF;
}
retval = source_file_is_supported(filp, &nvme_ns);
if (retval < 0)
goto error_1;
i_sb = filp->f_inode->i_sb;
s_bdev = i_sb->s_bdev;
/* get destination GPU memory */
mgmem = strom_get_mapped_gpu_memory(handle);
if (!mgmem)
{
retval = -ENOENT;
goto error_1;
}
/* allocate strom_dma_task object */
dtask = kzalloc(sizeof(strom_dma_task), GFP_KERNEL);
if (!dtask)
{
retval = -ENOMEM;
goto error_2;
}
dtask->dma_task_id = (unsigned long) dtask;
dtask->hindex = strom_dma_task_index(dtask->dma_task_id);
dtask->refcnt = 1;
dtask->filp = filp;
dtask->mgmem = mgmem;
init_waitqueue_head(&dtask->wait_tasks);
dtask->dma_status = 0;
dtask->ioctl_filp = get_file(ioctl_filp);
/* OK, this strom_dma_task is now tracked */
spin_lock_irqsave(&strom_dma_task_locks[dtask->hindex], flags);
list_add(&dtask->chain, &strom_dma_task_slots[dtask->hindex]);
spin_unlock_irqrestore(&strom_dma_task_locks[dtask->hindex], flags);
/* Then, setup dma_task_state */
dstate->dtask = dtask;
dstate->nvme_ns = nvme_ns;
dstate->blocksz = i_sb->s_blocksize;
dstate->blocksz_shift = i_sb->s_blocksize_bits;
Assert(dstate->blocksz == (1UL << dstate->blocksz_shift));
dstate->start_sect = s_bdev->bd_part->start_sect;
dstate->nr_sects = s_bdev->bd_part->nr_sects;
dstate->src_block = 0;
dstate->nr_blocks = 0;
dstate->max_nblocks = STROM_DMA_SSD2GPU_MAXLEN >> dstate->blocksz_shift;
dstate->dest_iomap = NULL; /* map on demand */
dstate->dest_index = -1;
return 0;
error_2:
strom_put_mapped_gpu_memory(mgmem);
error_1:
fput(filp);
return retval;
}
/*
* strom_get_dma_task
*/
static strom_dma_task *
strom_get_dma_task(strom_dma_task *dtask)
{
int index = strom_dma_task_index(dtask->dma_task_id);
spinlock_t *lock = &strom_dma_task_locks[index];
unsigned long flags;
spin_lock_irqsave(lock, flags);
Assert(dtask->refcnt > 0);
dtask->refcnt++;
spin_unlock_irqrestore(lock, flags);
return dtask;
}
/*
* strom_put_dma_task
*/
static void
strom_put_dma_task(strom_dma_task *dtask, long dma_status)
{
int index = strom_dma_task_index(dtask->dma_task_id);
spinlock_t *lock = &strom_dma_task_locks[index];
struct list_head *slot;
unsigned long flags;
spin_lock_irqsave(lock, flags);
Assert(dtask->refcnt > 0);
if (dma_status && !dtask->dma_status)
{
Assert(dma_status < 0);
dtask->dma_status = dma_status;
}
if (--dtask->refcnt == 0)
{
struct file *ioctl_filp = dtask->ioctl_filp;
long status = dtask->dma_status;
/* detach from the global hash table */
list_del(&dtask->chain);
/* if any error status, move to the ioctl_filp without kfree() */
if (status)
{
slot = &failed_dma_task_slots[index];
list_add_tail(slot, &dtask->chain);
}
/* wake up all the waiting tasks, if any */
wake_up_all(&dtask->wait_tasks);
/* release relevant resources */
strom_put_mapped_gpu_memory(dtask->mgmem);
fput(dtask->filp);
if (!status)
kfree(dtask);
spin_unlock_irqrestore(lock, flags);
fput(ioctl_filp);
prInfo("DMA task (id=%p) was completed", dtask);
return;
}
spin_unlock_irqrestore(lock, flags);
}
/*
* Slow RAM->GPU synchronous copy