UARTs: required accuracy of the baud rate

[irish-beast]

I'd like to make a change to micropython regarding required accuracy of the generated baud rate.

12Mbaud had become standard and is supported by most usb-uarts and other communications systems. The pyboard (of which I have 3) seems to derive its uart clock from 168MHz yielding baud rates from the clock divides below

div Mbaud
2 84
4 42
6 28
8 21
10 16.8
12 14
14 12

If I ask for say 20Mbaud it will set it to 21Mbaud which is exactly 5% deviation from the desired rate.
If I ask for 19Mbaud: ValueError: set baudrate 21000000 is not within 5% of desired value

I've long heard that uarts can tolerate 5% deviation from the defined baud rate. It basically means that the clocks can drift 1/2 of a bit period over the course of the 10 bits it takes to send an entire frame (start, 8 x payload, stop).

But this is only true if the receive direction has many samples per bit. The actual formula for clock tolerance is

(N-1)//2 / (N*(M-1))

Where N is the number of samples per bit, and M the number of bits per frame. In the receive direction both rising and falling edges of the 168MHz clock sample the Rx line. From the table above N = 2*div. And M=10 unless messing with parity, extra stop bits, or 9 bit payload.

If we plug 16.8Mbaud into the accuracy formula we find with N=20, M=10 the accuracy requirement is exactly 5%
But with 84Mbaud the accuracy requirement is 2.77% and 42Mbaud: 4.16%

Furthermore we have to halve the tolerance. If the sender is 1% too high, and receiver 1% too low the receiver experiences 2% deviation.

I propose to tighten the tolerance accepted on baud rates to: (N-1)//2 / (2*N*(M-1))

Note this probably has not caused any issues up to now because uarts faster than 12Mbaud are unusual. In fact the only ones I know about are the pyboard (and STM32FF CPUs) and the uarts I've designed myself in VHDL.

Just wanted to get feedback before I make the change. I wouldn't want my first pull request rejected. Also have to compile for target hardware instead of just the Unix executable.

[robert-hh]

For me it looks like a good suggestion to tighten the tolerance. As you said, received and sender may be off in opposite directions. We just had the case that even 1% error was too much.
Obviously, at high baud rates the granularity of achievable baud rates gets worse, like your table shows.

[irish-beast]

Ooops, haven't tried much with pyboard, but have run ESP32 uarts at 12Mbaud on micropython.
If you send 0xAA repeatedly you get a square wave at 1/2 the baud rate

[robert-hh]

b.t.w.: I have to lookup which clock is really used for the UART of the PyBoard. The are driven by the APB1 clock, which looks like it's 84MHz. 84MHz / 16 == 5.25Mhz. That's the fastest I can get.

[robert-hh]

20MBaud works at the ESP32. And I prefer 0x55 or "U" for the pattern.

[GitHubsSilverBullet]

The are driven by the APB1 clock, which looks like it's 84MHz. 84MHz / 16 == 5.25Mhz. That's the fastest I can get.

The manual (F4) suggests to set OVER8, DIV 1, resulting in a max. baudrate of 10.5Mbaud. That would be the upper limit possible on a F4.

[robert-hh]

The MP code sets OVER8 to 0.

[GitHubsSilverBullet]

I just checked the 32F1xx and 32F4xx µC.
Don't they both have 4bit fractional dividers?
That'd bring the granularity down to ~50kHz (@12MBaud) and into the 0.5% territory.
@20Mbaud -> 20.06Mbaud resulting in 0.3% deviation.
Or am I missing an important bit?

[irish-beast]

Fractional divide or not you can do 12Mbaud with 0% inaccuracy because 14*12 = 168

Are you suggesting micropython doesn't properly exploit fractional divide, and could be much more arbitrary in its baud rate.
If that is true it would certainly be a worthy improvement

[GitHubsSilverBullet]

Quite right. Slipped through somehow.
Was really talking about your requested 20MBaud. (8+6/16)