exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_7:%WER 10.78 [ 888 / 8234, 113 ins, 107 del, 668 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_6:%WER 10.92 [ 899 / 8234, 106 ins, 116 del, 677 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_5:%WER 11.00 [ 906 / 8234, 98 ins, 118 del, 690 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_8:%WER 11.00 [ 906 / 8234, 134 ins, 97 del, 675 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_9:%WER 11.15 [ 918 / 8234, 142 ins, 97 del, 679 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_10:%WER 11.34 [ 934 / 8234, 152 ins, 91 del, 691 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_4:%WER 11.36 [ 935 / 8234, 90 ins, 131 del, 714 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_11:%WER 11.67 [ 961 / 8234, 168 ins, 90 del, 703 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_12:%WER 11.82 [ 973 / 8234, 175 ins, 90 del, 708 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_13:%WER 12.02 [ 990 / 8234, 182 ins, 94 del, 714 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_3:%WER 12.16 [ 1001 / 8234, 85 ins, 156 del, 760 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_14:%WER 12.33 [ 1015 / 8234, 194 ins, 92 del, 729 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_15:%WER 12.52 [ 1031 / 8234, 198 ins, 91 del, 742 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_16:%WER 12.56 [ 1034 / 8234, 202 ins, 88 del, 744 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_17:%WER 12.90 [ 1062 / 8234, 211 ins, 85 del, 766 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_18:%WER 13.06 [ 1075 / 8234, 217 ins, 85 del, 773 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_2:%WER 13.13 [ 1081 / 8234, 88 ins, 173 del, 820 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_19:%WER 13.29 [ 1094 / 8234, 219 ins, 86 del, 789 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_20:%WER 13.48 [ 1110 / 8234, 223 ins, 85 del, 802 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_tgpr/wer_1:%WER 13.98 [ 1151 / 8234, 94 ins, 181 del, 876 sub ]
exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_7:%WER 10.19 [ 839 / 8234, 114 ins, 94 del, 631 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_8:%WER 10.40 [ 856 / 8234, 129 ins, 94 del, 633 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_6:%WER 10.42 [ 858 / 8234, 104 ins, 108 del, 646 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_9:%WER 10.47 [ 862 / 8234, 135 ins, 90 del, 637 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_5:%WER 10.66 [ 878 / 8234, 98 ins, 117 del, 663 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_10:%WER 10.76 [ 886 / 8234, 144 ins, 89 del, 653 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_4:%WER 10.91 [ 898 / 8234, 87 ins, 129 del, 682 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_11:%WER 11.05 [ 910 / 8234, 154 ins, 84 del, 672 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_12:%WER 11.31 [ 931 / 8234, 166 ins, 87 del, 678 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_13:%WER 11.55 [ 951 / 8234, 175 ins, 85 del, 691 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_3:%WER 11.55 [ 951 / 8234, 85 ins, 141 del, 725 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_14:%WER 11.71 [ 964 / 8234, 185 ins, 83 del, 696 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_15:%WER 11.95 [ 984 / 8234, 191 ins, 82 del, 711 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_16:%WER 12.06 [ 993 / 8234, 195 ins, 82 del, 716 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_2:%WER 12.18 [ 1003 / 8234, 84 ins, 155 del, 764 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_17:%WER 12.27 [ 1010 / 8234, 199 ins, 81 del, 730 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_18:%WER 12.48 [ 1028 / 8234, 207 ins, 79 del, 742 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_19:%WER 12.70 [ 1046 / 8234, 215 ins, 78 del, 753 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_20:%WER 12.89 [ 1061 / 8234, 220 ins, 78 del, 763 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_dev93_const_tg/wer_1:%WER 13.06 [ 1075 / 8234, 92 ins, 171 del, 812 sub ]
exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_6:%WER 7.51 [ 424 / 5643, 64 ins, 36 del, 324 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_7:%WER 7.62 [ 430 / 5643, 70 ins, 33 del, 327 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_8:%WER 7.66 [ 432 / 5643, 75 ins, 28 del, 329 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_9:%WER 7.76 [ 438 / 5643, 85 ins, 27 del, 326 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_10:%WER 7.81 [ 441 / 5643, 91 ins, 26 del, 324 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_5:%WER 7.81 [ 441 / 5643, 60 ins, 42 del, 339 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_11:%WER 7.89 [ 445 / 5643, 98 ins, 24 del, 323 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_12:%WER 7.90 [ 446 / 5643, 98 ins, 22 del, 326 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_13:%WER 7.96 [ 449 / 5643, 104 ins, 21 del, 324 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_14:%WER 8.08 [ 456 / 5643, 106 ins, 21 del, 329 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_15:%WER 8.24 [ 465 / 5643, 110 ins, 21 del, 334 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_16:%WER 8.54 [ 482 / 5643, 119 ins, 22 del, 341 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_4:%WER 8.67 [ 489 / 5643, 62 ins, 53 del, 374 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_17:%WER 8.70 [ 491 / 5643, 122 ins, 21 del, 348 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_18:%WER 8.77 [ 495 / 5643, 123 ins, 21 del, 351 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_19:%WER 8.81 [ 497 / 5643, 123 ins, 21 del, 353 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_20:%WER 8.88 [ 501 / 5643, 123 ins, 21 del, 357 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_3:%WER 9.46 [ 534 / 5643, 63 ins, 55 del, 416 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_2:%WER 10.58 [ 597 / 5643, 64 ins, 66 del, 467 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_tgpr/wer_1:%WER 11.59 [ 654 / 5643, 69 ins, 74 del, 511 sub ]
exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_8:%WER 7.11 [ 401 / 5643, 68 ins, 31 del, 302 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_9:%WER 7.12 [ 402 / 5643, 71 ins, 29 del, 302 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_7:%WER 7.18 [ 405 / 5643, 66 ins, 36 del, 303 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_10:%WER 7.28 [ 411 / 5643, 80 ins, 26 del, 305 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_6:%WER 7.34 [ 414 / 5643, 63 ins, 39 del, 312 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_11:%WER 7.37 [ 416 / 5643, 84 ins, 25 del, 307 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_5:%WER 7.48 [ 422 / 5643, 60 ins, 39 del, 323 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_12:%WER 7.51 [ 424 / 5643, 89 ins, 24 del, 311 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_13:%WER 7.60 [ 429 / 5643, 93 ins, 22 del, 314 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_14:%WER 7.78 [ 439 / 5643, 100 ins, 23 del, 316 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_15:%WER 7.89 [ 445 / 5643, 102 ins, 23 del, 320 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_16:%WER 7.94 [ 448 / 5643, 105 ins, 23 del, 320 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_4:%WER 8.06 [ 455 / 5643, 61 ins, 50 del, 344 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_17:%WER 8.15 [ 460 / 5643, 109 ins, 22 del, 329 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_18:%WER 8.31 [ 469 / 5643, 114 ins, 22 del, 333 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_19:%WER 8.40 [ 474 / 5643, 114 ins, 21 del, 339 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_20:%WER 8.58 [ 484 / 5643, 119 ins, 20 del, 345 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_3:%WER 8.68 [ 490 / 5643, 63 ins, 54 del, 373 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_2:%WER 9.45 [ 533 / 5643, 61 ins, 65 del, 407 sub ] exp_back/blstm_proj_4_320_320_0.001_l1r1_d0.9_ex72_moet10.0_usm0_psm0_bs32_hf0.7/decode_eval92_const_tg/wer_1:%WER 10.37 [ 585 / 5643, 64 ins, 73 del, 448 sub ]
Due to the non-deterministic in tensorflow GPU operation. In addition to one time results, we also give 5 times results (run the same script with same hyper-parameters multiple times)
- baseline model results using trigram lm without pruning. (./run_wsj_phn.sh --num_experts 0 --moe_temp 0)
| dev93 | eval92 |
|---|---|
| 10.70 | 7.51 |
| 10.76 | 7.43 |
| 11.28 | 7.32 |
| 10.94 | 7.76 |
| 11.12 | 7.68 |
- treatment model results using trigram lm without pruning (./run_wsj_phn.sh )
| dev93 | eval92 |
|---|---|
| 10.65 | 7.14 |
| 10.30 | 7.12 |
| 10.18 | 7.18 |
| 9.89 | 7.44 |
| 10.35 | 7.27 |
- overall comparison of baseline with treatment
| model | dev93-mean(std) | eval92-mean(std) |
|---|---|---|
| baseline | 10.96(0.22) | 7.54(0.17) |
| treatment | 10.27(0.25) | 7.23(0.12) |