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NIOS II controlled hardware ODE solver implemented on Cyclone IV FPGA

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mohamedtareq24/ODE_solver_NIOS_II

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ODE solver controlled by NIOS II soft processor that I used to simlaute a spring mass damper system

The system consistes of 3 main blocks

  • ODE solver to numercally calculate the responce of spring-mass-damper system (2nd order ODE)
  • NIOS II processor with JTAG-UART IP & PIOs that will be programmed to provied inputs through a NIOS II terminal opend in host PC
  • VGA interface to output system's responce

the system used 2_16 fixed point repersntaion

Design procedure

  • Simualting hardware using MATLAB

  • Designing the solver in verilog HDL

  • Simulating the verilog module using ModelSim until MATLAB outputs matched Verilog module output

  • Addind NIOS II core, JTAG UART & PIOs using Intel platform designer and genratin the HDL
  • Integrating the system

- Codeing the C program for the NIOS II to configure the ODE-Solver inputs