forked from ocaml/ocaml
/
proc.ml
356 lines (299 loc) · 12 KB
/
proc.ml
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
(**************************************************************************)
(* *)
(* OCaml *)
(* *)
(* Benedikt Meurer, University of Siegen *)
(* *)
(* Copyright 1998 Institut National de Recherche en Informatique et *)
(* en Automatique. *)
(* Copyright 2012 Benedikt Meurer. *)
(* *)
(* All rights reserved. This file is distributed under the terms of *)
(* the GNU Lesser General Public License version 2.1, with the *)
(* special exception on linking described in the file LICENSE. *)
(* *)
(**************************************************************************)
(* Description of the ARM processor *)
open Misc
open Cmm
open Reg
open Arch
open Mach
(* Instruction selection *)
let word_addressed = false
(* Registers available for register allocation *)
(* Integer register map:
r0 - r3 general purpose (not preserved)
r4 - r7 general purpose (preserved)
r8 trap pointer (preserved)
r9 platform register, usually reserved
r10 allocation pointer (preserved)
r11 allocation limit (preserved)
r12 intra-procedural scratch register (not preserved)
r13 stack pointer
r14 return address
r15 program counter
Floating-point register map (VFPv{2,3}):
d0 - d7 general purpose (not preserved)
d8 - d15 general purpose (preserved)
d16 - d31 general purpose (not preserved), VFPv3 only
*)
let int_reg_name =
[| "r0"; "r1"; "r2"; "r3"; "r4"; "r5"; "r6"; "r7"; "r12" |]
let float_reg_name =
[| "d0"; "d1"; "d2"; "d3"; "d4"; "d5"; "d6"; "d7";
"d8"; "d9"; "d10"; "d11"; "d12"; "d13"; "d14"; "d15";
"d16"; "d17"; "d18"; "d19"; "d20"; "d21"; "d22"; "d23";
"d24"; "d25"; "d26"; "d27"; "d28"; "d29"; "d30"; "d31" |]
(* We have three register classes:
0 for integer registers
1 for VFPv2 and VFPv3-D16
2 for VFPv3
This way we can choose between VFPv2/VFPv3-D16 and VFPv3
at (ocamlopt) runtime using command line switches.
*)
let num_register_classes = 3
let register_class r =
match (r.typ, !fpu) with
| (Val | Int | Addr), _ -> 0
| Float, VFPv2 -> 1
| Float, VFPv3_D16 -> 1
| Float, _ -> 2
let num_available_registers =
[| 9; 16; 32 |]
let first_available_register =
[| 0; 100; 100 |]
let register_name r =
if r < 100 then int_reg_name.(r) else float_reg_name.(r - 100)
let rotate_registers = true
(* Representation of hard registers by pseudo-registers *)
let hard_int_reg =
let v = Array.make 9 Reg.dummy in
for i = 0 to 8 do
v.(i) <- Reg.at_location Int (Reg i)
done;
v
let hard_float_reg =
let v = Array.make 32 Reg.dummy in
for i = 0 to 31 do
v.(i) <- Reg.at_location Float (Reg(100 + i))
done;
v
let all_phys_regs =
Array.append hard_int_reg hard_float_reg
let phys_reg n =
if n < 100 then hard_int_reg.(n) else hard_float_reg.(n - 100)
let stack_slot slot ty =
Reg.at_location ty (Stack slot)
let loc_spacetime_node_hole = Reg.dummy (* Spacetime unsupported *)
(* Calling conventions *)
let calling_conventions first_int last_int first_float last_float make_stack
arg =
let loc = Array.make (Array.length arg) [| Reg.dummy |] in
let int = ref first_int in
let float = ref first_float in
let ofs = ref 0 in
for i = 0 to Array.length arg - 1 do
match arg.(i) with
| [| arg |] ->
begin match arg.typ with
| Val | Int | Addr as ty ->
if !int <= last_int then begin
loc.(i) <- [| phys_reg !int |];
incr int
end else begin
loc.(i) <- [| stack_slot (make_stack !ofs) ty |];
ofs := !ofs + size_int
end
| Float ->
assert (abi = EABI_HF);
assert (!fpu >= VFPv2);
if !float <= last_float then begin
loc.(i) <- [| phys_reg !float |];
incr float
end else begin
ofs := Misc.align !ofs size_float;
loc.(i) <- [| stack_slot (make_stack !ofs) Float |];
ofs := !ofs + size_float
end
end
| [| arg1; arg2 |] ->
(* Passing of 64-bit quantities to external functions. *)
begin match arg1.typ, arg2.typ with
| Int, Int ->
(* 64-bit quantities split across two registers must either be in a
consecutive pair of registers where the lowest numbered is an
even-numbered register; or in a stack slot that is 8-byte
aligned. *)
int := Misc.align !int 2;
if !int <= last_int - 1 then begin
let reg_lower = phys_reg !int in
let reg_upper = phys_reg (1 + !int) in
loc.(i) <- [| reg_lower; reg_upper |];
int := !int + 2
end else begin
let size_int64 = size_int * 2 in
ofs := Misc.align !ofs size_int64;
let stack_lower = stack_slot (make_stack !ofs) Int in
let stack_upper = stack_slot (make_stack (size_int + !ofs)) Int in
loc.(i) <- [| stack_lower; stack_upper |];
ofs := !ofs + size_int64
end
| _, _ ->
let f = function Int -> "I" | Addr -> "A" | Val -> "V" | Float -> "F" in
fatal_error (Printf.sprintf "Proc.calling_conventions: bad register \
type(s) for multi-register argument: %s, %s"
(f arg1.typ) (f arg2.typ))
end
| _ ->
fatal_error "Proc.calling_conventions: bad number of registers for \
multi-register argument"
done;
(loc, Misc.align !ofs 8) (* keep stack 8-aligned *)
let incoming ofs = Incoming ofs
let outgoing ofs = Outgoing ofs
let not_supported _ofs = fatal_error "Proc.loc_results: cannot call"
(* OCaml calling convention:
first integer args in r0...r7
first float args in d0...d15 (EABI+VFP)
remaining args on stack.
Return values in r0...r7 or d0...d15. *)
let max_arguments_for_tailcalls = 8
let single_regs arg = Array.map (fun arg -> [| arg |]) arg
let ensure_single_regs res =
Array.map (function
| [| res |] -> res
| _ -> failwith "Proc.ensure_single_regs")
res
let loc_arguments arg =
let (loc, alignment) =
calling_conventions 0 7 100 115 outgoing (single_regs arg)
in
ensure_single_regs loc, alignment
let loc_parameters arg =
let (loc, _) = calling_conventions 0 7 100 115 incoming (single_regs arg) in
ensure_single_regs loc
let loc_results res =
let (loc, _) =
calling_conventions 0 7 100 115 not_supported (single_regs res)
in
ensure_single_regs loc
(* C calling convention:
first integer args in r0...r3
first float args in d0...d7 (EABI+VFP)
remaining args on stack.
Return values in r0...r1 or d0. *)
let loc_external_arguments arg =
calling_conventions 0 3 100 107 outgoing arg
let loc_external_results res =
let (loc, _) =
calling_conventions 0 1 100 100 not_supported (single_regs res)
in
ensure_single_regs loc
let loc_exn_bucket = phys_reg 0
(* See "DWARF for the ARM architecture" available from developer.arm.com. *)
let int_dwarf_reg_numbers =
[| 0; 1; 2; 3; 4; 5; 6; 7; 12 |]
let float_dwarf_reg_numbers_legacy =
[| 64; 65; 66; 67; 68; 69; 70; 71;
72; 73; 74; 75; 76; 77; 78; 79;
80; 81; 82; 83; 84; 85; 86; 87;
88; 89; 90; 91; 92; 93; 94; 95;
|]
let float_dwarf_reg_numbers =
[| 256; 257; 258; 259; 260; 261; 262; 263;
264; 265; 266; 267; 268; 269; 270; 271;
272; 273; 274; 275; 276; 277; 278; 279;
280; 281; 282; 283; 284; 285; 286; 287;
|]
let dwarf_register_numbers ~reg_class =
match reg_class with
| 0 -> int_dwarf_reg_numbers
| 1 ->
(* Section 3.1 note 4 says that the "new" VFPv3 register numberings
(as per [float_dwarf_reg_numbers]) should be used for VFPv2 as well.
However we believe that for <= ARMv6 we should use the legacy VFPv2
numberings. *)
if !arch <= ARMv6 then float_dwarf_reg_numbers_legacy
else float_dwarf_reg_numbers
| 2 -> float_dwarf_reg_numbers
| _ -> Misc.fatal_errorf "Bad register class %d" reg_class
let stack_ptr_dwarf_register_number = 13
(* Volatile registers: none *)
let regs_are_volatile _rs = false
(* Registers destroyed by operations *)
let destroyed_at_alloc = (* r0-r6, d0-d15 preserved *)
Array.of_list (List.map
phys_reg
[7;8;
116;117;118;119;120;121;122;123;
124;125;126;127;128;129;130;131])
let destroyed_at_c_call =
Array.of_list (List.map
phys_reg
(match abi with
EABI -> (* r4-r7 preserved *)
[0;1;2;3;8;
100;101;102;103;104;105;106;107;
108;109;110;111;112;113;114;115;
116;117;118;119;120;121;122;123;
124;125;126;127;128;129;130;131]
| EABI_HF -> (* r4-r7, d8-d15 preserved *)
[0;1;2;3;8;
100;101;102;103;104;105;106;107;
116;117;118;119;120;121;122;123;
124;125;126;127;128;129;130;131]))
let destroyed_at_oper = function
Iop(Icall_ind _ | Icall_imm _)
| Iop(Iextcall { alloc = true; _ }) ->
all_phys_regs
| Iop(Iextcall { alloc = false; _}) ->
destroyed_at_c_call
| Iop(Ialloc _) ->
destroyed_at_alloc
| Iop(Iconst_symbol _) when !Clflags.pic_code ->
[| phys_reg 3; phys_reg 8 |] (* r3 and r12 destroyed *)
| Iop(Iintop Imulh) when !arch < ARMv6 ->
[| phys_reg 8 |] (* r12 destroyed *)
| Iop(Iintop (Icomp _) | Iintop_imm(Icomp _, _))
when !arch >= ARMv8 && !thumb ->
[| phys_reg 3 |] (* r3 destroyed *)
| Iop(Iintoffloat | Ifloatofint | Iload(Single, _) | Istore(Single, _, _)) ->
[| phys_reg 107 |] (* d7 (s14-s15) destroyed *)
| _ -> [||]
let destroyed_at_raise = all_phys_regs
(* lr is destroyed at [Lreloadretaddr], but lr is not used for register
allocation, and thus does not need to (and indeed cannot) occur here. *)
let destroyed_at_reloadretaddr = [| |]
(* Maximal register pressure *)
let safe_register_pressure = function
Iextcall _ -> if abi = EABI then 0 else 4
| Ialloc _ -> if abi = EABI then 0 else 7
| Iconst_symbol _ when !Clflags.pic_code -> 7
| Iintop Imulh when !arch < ARMv6 -> 8
| _ -> 9
let max_register_pressure = function
Iextcall _ -> if abi = EABI then [| 4; 0; 0 |] else [| 4; 8; 8 |]
| Ialloc _ -> if abi = EABI then [| 7; 0; 0 |] else [| 7; 8; 8 |]
| Iconst_symbol _ when !Clflags.pic_code -> [| 7; 16; 32 |]
| Iintoffloat | Ifloatofint
| Iload(Single, _) | Istore(Single, _, _) -> [| 9; 15; 31 |]
| Iintop Imulh when !arch < ARMv6 -> [| 8; 16; 32 |]
| _ -> [| 9; 16; 32 |]
(* Pure operations (without any side effect besides updating their result
registers). *)
let op_is_pure = function
| Icall_ind _ | Icall_imm _ | Itailcall_ind _ | Itailcall_imm _
| Iextcall _ | Istackoffset _ | Istore _ | Ialloc _
| Iintop(Icheckbound _) | Iintop_imm(Icheckbound _, _)
| Ispecific(Ishiftcheckbound _) -> false
| _ -> true
(* Layout of the stack *)
let num_stack_slots = [| 0; 0; 0 |]
let contains_calls = ref false
(* Calling the assembler *)
let assemble_file infile outfile =
Ccomp.command (Config.asm ^ " " ^
(String.concat " " (Misc.debug_prefix_map_flags ())) ^
" -o " ^ Filename.quote outfile ^ " " ^ Filename.quote infile)
let init () = ()