Skip to content

Commit

Permalink
Merge branch 'working' into him
Browse files Browse the repository at this point in the history
  • Loading branch information
@mtalexander
mtalexander committed Mar 23, 2012
2 parents b4ed246 + 01d1a78 commit bcd7041
Show file tree
Hide file tree
Showing 53 changed files with 21,540 additions and 11,487 deletions.
3 changes: 3 additions & 0 deletions archlvl.c
View file
Expand Up @@ -273,6 +273,9 @@ FACILITY(LOGICAL_PARTITION,S370|ESA390|ZARCH, NONE, S370|ESA390|ZARCH, ALS0|ALS1
#if defined(_FEATURE_EMULATE_VM)
FACILITY(VIRTUAL_MACHINE, NONE, NONE, S370|ESA390|ZARCH, NONE)
#endif
// #if defined(_FEATURE_QDIO_ASSIST)
FACILITY(QDIO_ASSIST, Z390, NONE, Z390, ALS3)
// #endif

{ NULL, 0, 0, 0, 0, 0 }
};
Expand Down
4 changes: 0 additions & 4 deletions channel.c
View file
Expand Up @@ -1343,10 +1343,6 @@ DEVBLK *dev; /* -> Device control block */
int console = 0; /* 1 = console device reset */
int i;

/* Reset channel subsystem back to default initial non-MSS state */
sysblk.mss = FALSE; /* (not enabled by default) */
sysblk.lcssmax = 0; /* (default to single lcss) */

/* reset sclp interface */
sclp_reset();

Expand Down
156 changes: 96 additions & 60 deletions chsc.c
View file
Expand Up @@ -67,6 +67,7 @@ CHSC_RSP4 *chsc_rsp4 = (CHSC_RSP4 *)(chsc_rsp+1);
memset(chsc_rsp4, 0, sizeof(CHSC_RSP4) );
if((dev = find_device_by_subchan((LCSS_TO_SSID(lcss) << 16)|sch)))
{
int n;
chsc_rsp4->sch_val = 1;
if(dev->pmcw.flag5 & PMCW5_V)
chsc_rsp4->dev_val = 1;
Expand All @@ -76,10 +77,11 @@ CHSC_RSP4 *chsc_rsp4 = (CHSC_RSP4 *)(chsc_rsp+1);
chsc_rsp4->path_mask = dev->pmcw.pim;
STORE_HW(chsc_rsp4->sch, sch);
memcpy(chsc_rsp4->chpid, dev->pmcw.chpid, 8);
#if 1 // ZZTEST
chsc_rsp4->fla_valid_mask = 0x80;
STORE_HW(chsc_rsp4->fla[0], ((dev->devnum & 0xff00) >> 8));
#endif
if(dev->fla[0])
chsc_rsp4->fla_valid_mask = dev->pmcw.pim;
for(n = 0; n < 7; n++)
if(dev->pmcw.pim & (0x80 >> n))
STORE_HW(chsc_rsp4->fla[n], dev->fla[n]);
}
}

Expand All @@ -97,7 +99,7 @@ CHSC_RSP4 *chsc_rsp4 = (CHSC_RSP4 *)(chsc_rsp+1);
}


#if 0 // ZZTEST
#if 1 // ZZTEST
static int ARCH_DEP(chsc_get_cu_desc) (CHSC_REQ *chsc_req, CHSC_RSP *chsc_rsp)
{
U16 req_len, sch, f_sch, l_sch, rsp_len, lcss;
Expand Down Expand Up @@ -130,6 +132,25 @@ CHSC_RSP6 *chsc_rsp6 = (CHSC_RSP6 *)(chsc_rsp+1);
{
DEVBLK *dev;
memset(chsc_rsp6, 0, sizeof(CHSC_RSP6) );
if((dev = find_device_by_subchan((LCSS_TO_SSID(lcss) << 16)|sch)))
{
int n;

chsc_rsp6->sch_val = 1;
if(dev->pmcw.flag5 & PMCW5_V)
chsc_rsp6->dev_val = 1;
chsc_rsp6->st = (dev->pmcw.flag25 & PMCW25_TYPE) >> 5;

chsc_rsp6->fla_valid_mask = dev->pmcw.pim;

STORE_HW(chsc_rsp6->devnum,dev->devnum);

STORE_HW(chsc_rsp6->sch, sch);

memcpy(chsc_rsp6->chpid, dev->pmcw.chpid, 8);
for(n = 0; n < 7; n++)
STORE_HW(chsc_rsp6->fla[n], dev->fla[n]);
}
}

/* Store response length */
Expand Down Expand Up @@ -177,40 +198,47 @@ U16 req_len, rsp_len;
memset(chsc_rsp10->chsc_char, 0, sizeof(chsc_rsp10->chsc_char));

#if defined(FEATURE_REGION_RELOCATE)
CHSC_AI(chsc_rsp10->general_char,2) |= CHSC_BI(2);
CHSC_AI(chsc_rsp10->general_char,5) |= CHSC_BI(5);
CHSC_SB(chsc_rsp10->general_char,2);
CHSC_SB(chsc_rsp10->general_char,5);
#endif
#if defined(FEATURE_CANCEL_IO_FACILITY)
CHSC_AI(chsc_rsp10->general_char,6) |= CHSC_BI(6);
CHSC_SB(chsc_rsp10->general_char,6);
#endif
CHSC_AI(chsc_rsp10->general_char,7) |= CHSC_BI(7); /* Concurrent Sense */
CHSC_AI(chsc_rsp10->general_char,12) |= CHSC_BI(12); /* Dynamic IO */
CHSC_SB(chsc_rsp10->general_char,7); /* Concurrent Sense */
CHSC_SB(chsc_rsp10->general_char,12); /* Dynamic IO */
#if defined(FEATURE_QUEUED_DIRECT_IO)
CHSC_AI(chsc_rsp10->general_char,41) |= CHSC_BI(41); /* Adapter Interruption Facility */
CHSC_SB(chsc_rsp10->general_char,41); /* Adapter Interruption Facility */

CHSC_SB(chsc_rsp10->chsc_char,1); // 0x0002 Supported
CHSC_SB(chsc_rsp10->chsc_char,2); // 0x0006 Supported
CHSC_SB(chsc_rsp10->chsc_char,3); // 0x0004 Supported
CHSC_SB(chsc_rsp10->chsc_char,8); // 0x0024 Supported

if(FACILITY_ENABLED(QDIO_ASSIST, regs))
CHSC_SB(chsc_rsp10->general_char,61); /* QDIO Assist */
#endif /*defined(FEATURE_QUEUED_DIRECT_IO)*/
if(sysblk.mss)
CHSC_AI(chsc_rsp10->general_char,45) |= CHSC_BI(45); /* Multiple CSS */
// CHSC_AI(chsc_rsp10->general_char,46) |= CHSC_BI(46); /* FCS */
// CHSC_AI(chsc_rsp10->general_char,48) |= CHSC_BI(48); /* Ext MB */

#if defined(_FEATURE_QDIO_TDD)
if(FACILITY_ENABLED(QDIO_TDD, regs))
CHSC_AI(chsc_rsp10->general_char,56) |= CHSC_BI(56); /* AIF Time Delay Disablement fac*/
CHSC_SB(chsc_rsp10->general_char,56); /* AIF Time Delay Disablement fac*/
#endif /*defined(_FEATURE_QDIO_TDD)*/
#if defined(_FEATURE_QEBSM)
if(FACILITY_ENABLED(QEBSM, regs))
CHSC_AI(chsc_rsp10->general_char,58) |= CHSC_BI(58);
CHSC_SB(chsc_rsp10->general_char,58);
#endif /*defined(_FEATURE_QEBSM)*/
#if defined(_FEATURE_QDIO_THININT)
if(FACILITY_ENABLED(QDIO_THININT, regs))
CHSC_AI(chsc_rsp10->general_char,67) |= CHSC_BI(67); /* OSA/FCP Thin interrupts */
CHSC_SB(chsc_rsp10->general_char,67); /* OSA/FCP Thin interrupts */
#endif /*defined(_FEATURE_QDIO_THININT)*/
// CHSC_AI(chsc_rsp10->general_char,82) |= CHSC_BI(82); /* CIB */
// CHSC_AI(chsc_rsp10->general_char,88) |= CHSC_BI(88); /* FCX */

// CHSC_AI(chsc_rsp10->chsc_char,84) |= CHSC_BI(84); /* SECM */
// CHSC_AI(chsc_rsp10->chsc_char,86) |= CHSC_BI(86); /* SCMC */
// CHSC_AI(chsc_rsp10->chsc_char,107) |= CHSC_BI(107); /* Set Channel Subsystem Char */
// CHSC_AI(chsc_rsp10->chsc_char,108) |= CHSC_BI(108); /* Fast CHSCs */
// CHSC_SB(chsc_rsp10->general_char,82); /* CIB */
// CHSC_SB(chsc_rsp10->general_char,88); /* FCX */

// CHSC_SB(chsc_rsp10->general_char,45); /* Multiple CSS */
// CHSC_SB(chsc_rsp10->chsc_char,84); /* SECM */
// CHSC_SB(chsc_rsp10->chsc_char,86); /* SCMC */
// CHSC_SB(chsc_rsp10->chsc_char,107); /* Set Channel Subsys Char */
// CHSC_SB(chsc_rsp10->chsc_char,108); /* Fast CHSCs */

/* Store request OK */
STORE_HW(chsc_rsp->rsp,CHSC_REQ_OK);
Expand Down Expand Up @@ -274,6 +302,7 @@ CHSC_RSP24 *chsc_rsp24 = (CHSC_RSP24 *)(chsc_rsp+1);
}


#if 0
static int ARCH_DEP(chsc_enable_facility) (CHSC_REQ *chsc_req, CHSC_RSP *chsc_rsp)
{
U16 req_len, rsp_len, facility;
Expand All @@ -284,33 +313,33 @@ CHSC_RSP31* chsc_rsp31 = (CHSC_RSP31*) (chsc_rsp+1);
/* Fetch length of request field and validate */
FETCH_HW( req_len, chsc_req31->length );

if (0x0400 != req_len) {
STORE_HW( chsc_rsp->length, sizeof(CHSC_RSP) );
STORE_HW( chsc_rsp->rsp, CHSC_REQ_ERRREQ );
STORE_FW( chsc_rsp->info, 0 );
STORE_FW( chsc_rsp31->resv1, 0 );
return 0;
}

/* Calculate response length */
rsp_len = sizeof(CHSC_RSP) + sizeof(CHSC_RSP31);

if (req_len < rsp_len) {
STORE_HW( chsc_rsp->length, sizeof(CHSC_RSP));
STORE_HW( chsc_rsp->rsp, CHSC_REQ_ERRREQ);
STORE_FW( chsc_rsp->info, 0);
return 0;
}

/* Prepare the response */
STORE_HW( chsc_rsp->length, rsp_len );
STORE_FW( chsc_rsp->info, 0 );
STORE_FW( chsc_rsp31->resv1, 0 );
STORE_HW( chsc_rsp->length, rsp_len );
STORE_FW( chsc_rsp->info, 0);
memset(chsc_rsp31, 0, sizeof(CHSC_RSP31) );
// STORE_FW( chsc_rsp31->resv1, 0);

/* Fetch requested facility and enable it */
FETCH_HW( facility, chsc_req31->facility );

switch (facility)
{
case CHSC_REQ31_MSS:
/* Enable Multiple Subchannel-Sets Facility */
sysblk.mss = TRUE;
sysblk.lcssmax = FEATURE_LCSS_MAX - 1;
STORE_HW( chsc_rsp->rsp, CHSC_REQ_OK );
break;
// if(FACILITY_ENABLED_DEV(MCSS))
{
/* Enable Multiple Subchannel-Sets Facility */
STORE_HW( chsc_rsp->rsp, CHSC_REQ_OK );
}

default: /* Unknown Facility */
STORE_HW( chsc_rsp->rsp, CHSC_REQ_FACILITY );
Expand All @@ -319,6 +348,7 @@ CHSC_RSP31* chsc_rsp31 = (CHSC_RSP31*) (chsc_rsp+1);

return 0; /* call success */
}
#endif


#if defined(_FEATURE_QDIO_THININT)
Expand Down Expand Up @@ -463,6 +493,8 @@ CHSC_RSP *chsc_rsp; /* Response structure*/

RRE(inst, regs, r1, r2);

// ARCH_DEP(display_inst) (regs, inst);

PRIV_CHECK(regs);

SIE_INTERCEPT(regs);
Expand Down Expand Up @@ -492,44 +524,48 @@ CHSC_RSP *chsc_rsp; /* Response structure*/

switch(req) {

case CHSC_REQ_SCHDESC:
regs->psw.cc = ARCH_DEP(chsc_get_sch_desc) (chsc_req, chsc_rsp);
break;

case CHSC_REQ_CSSINFO:
regs->psw.cc = ARCH_DEP(chsc_get_css_info) (regs, chsc_req, chsc_rsp);
break;

case CHSC_REQ_GETSSQD:
regs->psw.cc = ARCH_DEP(chsc_get_ssqd) (chsc_req, chsc_rsp);
break;

case CHSC_REQ_ENFACIL:
regs->psw.cc = ARCH_DEP(chsc_enable_facility) (chsc_req, chsc_rsp);
case CHSC_REQ_CHPDESC: // 0x0002
regs->psw.cc = ARCH_DEP(chsc_get_chp_desc) (chsc_req, chsc_rsp);
break;

case CHSC_REQ_CHPDESC:
regs->psw.cc = ARCH_DEP(chsc_get_chp_desc) (chsc_req, chsc_rsp);
case CHSC_REQ_SCHDESC: // 0x0004
regs->psw.cc = ARCH_DEP(chsc_get_sch_desc) (chsc_req, chsc_rsp);
break;

#if 0 // ZZTEST
case CHSC_REQ_CUDESC:
case 0x0026:
#if 1
case CHSC_REQ_CUDESC: // 0x0006
regs->psw.cc = ARCH_DEP(chsc_get_cu_desc) (chsc_req, chsc_rsp);
break;
#endif

case CHSC_REQ_CSSINFO: // 0x0010
regs->psw.cc = ARCH_DEP(chsc_get_css_info) (regs, chsc_req, chsc_rsp);
break;

#if defined(_FEATURE_QDIO_THININT)
case CHSC_REQ_SETSSSI:
case CHSC_REQ_SETSSSI: // 0x0021
if(FACILITY_ENABLED(QDIO_THININT, regs))
{
regs->psw.cc = ARCH_DEP(chsc_set_sci) (chsc_req, chsc_rsp);
break;
}
else
goto chsc_error;
/* Fall through to unkown request if thinint not supported */
#endif /*defined(_FEATURE_QDIO_THININT)*/

case CHSC_REQ_GETSSQD: // 0x0024
regs->psw.cc = ARCH_DEP(chsc_get_ssqd) (chsc_req, chsc_rsp);
break;

#if 0
case CHSC_REQ_ENFACIL: // 0x0031
regs->psw.cc = ARCH_DEP(chsc_enable_facility) (chsc_req, chsc_rsp);
break;
#endif

default:
chsc_error:
PTT(PTT_CL_ERR,"*CHSC",regs->GR_L(r1),regs->GR_L(r2),regs->psw.IA_L);
if( HDC3(debug_chsc_unknown_request, chsc_rsp, chsc_req, regs) )
break;
Expand Down
34 changes: 29 additions & 5 deletions chsc.h
View file
Expand Up @@ -13,8 +13,12 @@
#define _CHSC_H


#define CHSC_AI(_array, _bitno) ((_array)[((_bitno)/32)][(((_bitno)%32)/8)])
#define CHSC_BI(_bitno) (0x80 >> (((_bitno)%32)%8))
#define _CHSC_AI(_array, _bitno) ((_array)[((_bitno)/32)][(((_bitno)%32)/8)])
#define _CHSC_BI(_bitno) (0x80 >> (((_bitno)%32)%8))
#define CHSC_SB(_array, _bitno) \
do { \
_CHSC_AI((_array), (_bitno)) |= _CHSC_BI((_bitno)); \
} while (0)


typedef struct _CHSC_REQ {
Expand Down Expand Up @@ -190,7 +194,25 @@ typedef struct _CHSC_RSP4 {


typedef struct _CHSC_RSP6 {
BYTE cuinfo[128];
BYTE sch_val : 1; /* Subchannel valid */
BYTE dev_val : 1; /* Device number valid */
BYTE st : 3; /* Subchannel type */
#define CHSC_RSP6_ST_IO 0 /* I/O Subchannel; all fields
have a meaning */
#define CHSC_RSP6_ST_CHSC 1 /* CHSC Subchannel only sch_val
st and sch have a meaning */
#define CHSC_RSP6_ST_MSG 2 /* MSG Subchannel; all fields
except unit_addr have a
meaning */
#define CHSC_RPS6_ST_ADM 3 /* ADM Subchannel; Only sch_val
st and sch have a meaning */
BYTE zeros : 3;
BYTE fla_valid_mask; /* Link Address validty mask */
HWORD devnum; /* Control Unit Number */
HWORD resv1; /* Valid link mask */
HWORD sch; /* Subchannel number */
BYTE chpid[8]; /* Channel path array */
HWORD fla[8]; /* Full link address array */
} CHSC_RSP6;


Expand Down Expand Up @@ -234,11 +256,13 @@ typedef struct _CHSC_RSP24 {
HWORD qdioac2;
/* qdio adapter-characteristics-2 flag */
#define QETH_SNIFF_AVAIL 0x0008 /* Promisc mode avail */
#define QETH_AC2_DATA_DIV_AVAILABLE 0x0010
#define QETH_AC2_DATA_DIV_ENABLED 0x0002
DBLWRD sch_token;
BYTE mro;
BYTE mri;
BYTE resv4;
BYTE sbalic;
HWORD qdioac3;
#define QETH_AC3_FORMAT2_CQ_AVAILABLE 0x8000
HWORD resv5;
BYTE resv6;
BYTE mmwc;
Expand Down
34 changes: 26 additions & 8 deletions cmdtab.h
View file
Expand Up @@ -996,24 +996,42 @@
#define resume_cmd_desc "Resume hercules"

#if defined(ENABLE_OBJECT_REXX) || defined(ENABLE_REGINA_REXX)
#if defined(ENABLE_OBJECT_REXX) && defined(ENABLE_REGINA_REXX)
#define rexx_cmd_desc "Enable/Disable/display Rexx interpreter settings"
#define rexx_cmd_help \
\
"Format: 'rexx [option parms]'\n" \
"Format: 'rexx [option parms]'\n" \
"<none> - display rexx status\n" \
"Disa[ble] - stop/disable rexx support\n" \
"Ena[ble] regina - enable regina rexx\n" \
"Ena[ble] oorexx - enable open object rexx\n" \
"Start/Stop can be used instead of Enable/Disable\n" \
"sta[rt]/ena[ble] - enable rexx \n" \
"parms - package name oorexx/regina\n" \
" - <none> will start/enable the default Rexx package\n" \
"stop[p]/disa[ble]- stop/disable rexx support\n" \
"parms - <none>\n" \
"\n" \
"Path[s] - where to find rexx scripts\n" \
"Ext[ensions] - what extensions to use for rexx scripts autodetect \n" \
"Suf[fixes] - same as above\n" \
"Msg[prefix] - set the prefix for normal messages\n" \
"Err[prefix] - set the prefix for error messages\n" \
"Msgl[evel] - 0/1 disable/enable HHC17503I and HHC17504I messages \n" \
"Msgp[refix] - set the prefix for normal messages\n" \
"Errp[refix] - set the prefix for trace/error messages\n" \
"\n" \
"using reset as parameter will reset the above settings to the defaults\n"

#else /* defined(ENABLE_OBJECT_REXX) && defined(ENABLE_REGINA_REXX) */
#define rexx_cmd_desc "display Rexx interpreter settings"
#define rexx_cmd_help \
\
"Format: 'rexx [option parms]'\n" \
"<none> - display rexx status\n" \
"\n" \
"Path[s] - where to find rexx scripts\n" \
"Ext[ensions] - what extensions to use for rexx scripts autodetect \n" \
"Suf[fixes] - same as above\n" \
"Msgl[evel] - 0/1 disable/enable HHC17503I and HHC17504I messages \n" \
"Msgp[refix] - set the prefix for normal messages\n" \
"Errp[refix] - set the prefix for trace/error messages\n" \
"\n" \
"using reset as parameter will reset the above settings to the defaults\n"
#endif /* defined(ENABLE_OBJECT_REXX) && defined(ENABLE_REGINA_REXX) */
#endif /* defined(ENABLE_OBJECT_REXX) || defined(ENABLE_REGINA_REXX) */

#define rmmod_cmd_desc "Delete a module"
Expand Down

0 comments on commit bcd7041

Please sign in to comment.