Appoximate-Multiplier-using-Dual-Stage-4-2-Compressors

Approximate computing is a new approach in digital design that eliminates the need for exact calculation in order to achieve significant performance improvements in terms of power, speed, and space. this technique is becoming increasingly relevant for embedded and mobile systems with strict energy and speed limitations. approximate computing can be useful in a variety of error-tolerant situations. multimedia processing, data mining and recognition, and machine learning are some examples. multipliers are essential subsystems for microprocessors, digital signal processors, and embedded systems, and their applications range from filtering to convolutional neural networks. unfortunately, multipliers are one of the most energy-hungry digital blocks due to their complicated logic architecture. as a result, approximation multiplier design has emerged as a significant study topic in recent years. a multiplier is made up of three basic components: partial product creation, partial product reduction, and carry-propagate addition. any of these blocks can include approximations. for example, truncation of partial products is a well-established approximation approach in which certain partial products are not created and the truncation error is reduced using appropriate correction functions.