mt7628an_tplink_re305-v1.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "mt7628an.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "tplink,re305-v1", "mediatek,mt7628an-soc";
	model = "TP-Link RE305 v1";

	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
		label-mac-device = &ethernet;
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps {
			label = "wps";
			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_power: power {
			label = "blue:power";
			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
		};

		wlan2g {
			label = "blue:wlan2g";
			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};

		wlan5g {
			label = "blue:wlan5g";
			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1tpt";
		};

		rssi1 {
			label = "red:rssi";
			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
		};

		rssi2 {
			label = "blue:rssi";
			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
		};
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <50000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x20000>;
				read-only;
			};

			partition@20000 {
				compatible = "tplink,firmware";
				label = "firmware";
				reg = <0x20000 0x5e0000>;
			};

			config: partition@600000 {
				label = "config";
				reg = <0x600000 0x50000>;
				read-only;
			};

			/*
				The flash space between 0x650000 and 0x7f0000 is blank in the
				stock firmware so it is left out as well.
			*/

			radio: partition@7f0000 {
				label = "radio";
				reg = <0x7f0000 0x10000>;
				read-only;
			};
		};
	};
};

&state_default {
	gpio {
		groups = "refclk", "wdt", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an";
		function = "gpio";
	};
};

&pcie {
	status = "okay";
};

&pcie0 {
	mt76@0,0 {
		compatible = "mediatek,mt76";
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&radio 0x8000>;
		ieee80211-freq-limit = <5000000 6000000>;
		nvmem-cells = <&macaddr_config_10008>;
		nvmem-cell-names = "mac-address";
		mac-address-increment = <2>;
	};
};

&wmac {
	status = "okay";

	mediatek,mtd-eeprom = <&radio 0x0>;
	nvmem-cells = <&macaddr_config_10008>;
	nvmem-cell-names = "mac-address";
	mac-address-increment = <1>;
};

&ethernet {
	nvmem-cells = <&macaddr_config_10008>;
	nvmem-cell-names = "mac-address";
};

&config {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_config_10008: macaddr@10008 {
		reg = <0x10008 0x6>;
	};
};