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950-0416-ARM-dts-Revert-all-changes-to-upstream-dts-files.patch
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950-0416-ARM-dts-Revert-all-changes-to-upstream-dts-files.patch
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From e90536d721612de6a2619ae6727ee12b56bb2660 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Thu, 30 Jan 2020 11:39:39 +0000
Subject: [PATCH] ARM: dts: Revert all changes to upstream dts files
With the possible exception of bcm2711* files where there is a name
clash, we should not be modifying upstream DTS files.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 348 ++------
arch/arm/boot/dts/bcm2711.dtsi | 888 ++++++++++++++++++++-
arch/arm/boot/dts/bcm2835-common.dtsi | 131 +++
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 1 -
arch/arm/boot/dts/bcm2835-rpi-a.dts | 1 -
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 1 -
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 1 -
arch/arm/boot/dts/bcm2835-rpi-b.dts | 1 -
arch/arm/boot/dts/bcm2835-rpi-zero.dts | 1 -
arch/arm/boot/dts/bcm2835-rpi.dtsi | 37 -
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 1 -
arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 -
arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 15 -
arch/arm/boot/dts/bcm283x.dtsi | 152 +---
14 files changed, 1068 insertions(+), 511 deletions(-)
--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
@@ -1,54 +1,57 @@
+// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
-
#include "bcm2711.dtsi"
-#include "bcm2711-rpi.dtsi"
-#include "bcm283x-rpi-csi1-2lane.dtsi"
+#include "bcm2835-rpi.dtsi"
+#include "bcm283x-rpi-usb-peripheral.dtsi"
/ {
compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
model = "Raspberry Pi 4 Model B";
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0>;
+ chosen {
+ /* 8250 auxiliary UART instead of pl011 */
+ stdout-path = "serial1:115200n8";
};
- chosen {
- bootargs = "coherent_pool=1M 8250.nr_uarts=1 cma=64M";
+ /* Will be filled by the bootloader */
+ memory@0 {
+ device_type = "memory";
+ reg = <0 0 0>;
};
aliases {
- serial0 = &uart1;
- serial1 = &uart0;
- mmc0 = &emmc2;
- mmc1 = &mmcnr;
- mmc2 = &sdhost;
- i2c3 = &i2c3;
- i2c4 = &i2c4;
- i2c5 = &i2c5;
- i2c6 = &i2c6;
- /delete-property/ ethernet;
- /delete-property/ intc;
ethernet0 = &genet;
- pcie0 = &pcie_0;
};
-};
-&soc {
- virtgpio: virtgpio {
- compatible = "brcm,bcm2835-virtgpio";
- gpio-controller;
- #gpio-cells = <2>;
- firmware = <&firmware>;
- status = "okay";
+ leds {
+ act {
+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
+ };
+
+ pwr {
+ label = "PWR";
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
+ };
};
-};
-&mmcnr {
- pinctrl-names = "default";
- pinctrl-0 = <&sdio_pins>;
- bus-width = <4>;
- status = "okay";
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ sd_io_1v8_reg: sd_io_1v8_reg {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-sd-io";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-settling-time-us = <5000>;
+ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
+ states = <1800000 0x1
+ 3300000 0x0>;
+ status = "okay";
+ };
};
&firmware {
@@ -68,81 +71,34 @@
};
};
-&uart0 {
+&pwm1 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins &bt_pins>;
+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
status = "okay";
};
-&uart1 {
+/* SDHCI is used to control the SDIO for wireless */
+&sdhci {
+ #address-cells = <1>;
+ #size-cells = <0>;
pinctrl-names = "default";
- pinctrl-0 = <&uart1_pins>;
+ pinctrl-0 = <&emmc_gpio34>;
+ bus-width = <4>;
+ non-removable;
+ mmc-pwrseq = <&wifi_pwrseq>;
status = "okay";
-};
-&spi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
- cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
-
- spidev0: spidev@0{
- compatible = "spidev";
- reg = <0>; /* CE0 */
- #address-cells = <1>;
- #size-cells = <0>;
- spi-max-frequency = <125000000>;
- };
-
- spidev1: spidev@1{
- compatible = "spidev";
- reg = <1>; /* CE1 */
- #address-cells = <1>;
- #size-cells = <0>;
- spi-max-frequency = <125000000>;
- };
-};
-
-// =============================================
-// Board specific stuff here
-
-/ {
-
- sd_io_1v8_reg: sd_io_1v8_reg {
- status = "okay";
- compatible = "regulator-gpio";
- vin-supply = <&vdd_5v0_reg>;
- regulator-name = "vdd-sd-io";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-settling-time-us = <5000>;
-
- gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
- states = <1800000 0x1
- 3300000 0x0>;
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
};
-
- sd_vcc_reg: sd_vcc_reg {
- compatible = "regulator-fixed";
- regulator-name = "vcc-sd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- enable-active-high;
- gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&sdhost {
- status = "disabled";
};
+/* EMMC2 is used to drive the SD card */
&emmc2 {
- status = "okay";
- broken-cd;
vqmmc-supply = <&sd_io_1v8_reg>;
- vmmc-supply = <&sd_vcc_reg>;
+ broken-cd;
+ status = "okay";
};
&genet {
@@ -155,200 +111,32 @@
phy1: ethernet-phy@1 {
/* No PHY interrupt */
reg = <0x1>;
- led-modes = <0x00 0x08>; /* link/activity link */
};
};
-&leds {
- act_led: act {
- label = "led0";
- linux,default-trigger = "mmc0";
- gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
- };
-
- pwr_led: pwr {
- label = "led1";
- linux,default-trigger = "default-on";
- gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
- };
-};
-
-&audio {
+/* uart0 communicates with the BT module */
+&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&audio_pins>;
-};
-
-&sdhost_gpio48 {
- brcm,pins = <22 23 24 25 26 27>;
- brcm,function = <BCM2835_FSEL_ALT0>;
-};
-
-&gpio {
- spi0_pins: spi0_pins {
- brcm,pins = <9 10 11>;
- brcm,function = <BCM2835_FSEL_ALT0>;
- };
-
- spi0_cs_pins: spi0_cs_pins {
- brcm,pins = <8 7>;
- brcm,function = <BCM2835_FSEL_GPIO_OUT>;
- };
-
- spi3_pins: spi3_pins {
- brcm,pins = <1 2 3>;
- brcm,function = <BCM2835_FSEL_ALT3>;
- };
-
- spi3_cs_pins: spi3_cs_pins {
- brcm,pins = <0 24>;
- brcm,function = <BCM2835_FSEL_GPIO_OUT>;
- };
-
- spi4_pins: spi4_pins {
- brcm,pins = <5 6 7>;
- brcm,function = <BCM2835_FSEL_ALT3>;
- };
-
- spi4_cs_pins: spi4_cs_pins {
- brcm,pins = <4 25>;
- brcm,function = <BCM2835_FSEL_GPIO_OUT>;
- };
-
- spi5_pins: spi5_pins {
- brcm,pins = <13 14 15>;
- brcm,function = <BCM2835_FSEL_ALT3>;
- };
-
- spi5_cs_pins: spi5_cs_pins {
- brcm,pins = <12 26>;
- brcm,function = <BCM2835_FSEL_GPIO_OUT>;
- };
-
- spi6_pins: spi6_pins {
- brcm,pins = <19 20 21>;
- brcm,function = <BCM2835_FSEL_ALT3>;
- };
-
- spi6_cs_pins: spi6_cs_pins {
- brcm,pins = <18 27>;
- brcm,function = <BCM2835_FSEL_GPIO_OUT>;
- };
-
- i2c0_pins: i2c0 {
- brcm,pins = <0 1>;
- brcm,function = <BCM2835_FSEL_ALT0>;
- brcm,pull = <BCM2835_PUD_UP>;
- };
-
- i2c1_pins: i2c1 {
- brcm,pins = <2 3>;
- brcm,function = <BCM2835_FSEL_ALT0>;
- brcm,pull = <BCM2835_PUD_UP>;
- };
-
- i2c3_pins: i2c3 {
- brcm,pins = <4 5>;
- brcm,function = <BCM2835_FSEL_ALT5>;
- brcm,pull = <BCM2835_PUD_UP>;
- };
-
- i2c4_pins: i2c4 {
- brcm,pins = <8 9>;
- brcm,function = <BCM2835_FSEL_ALT5>;
- brcm,pull = <BCM2835_PUD_UP>;
- };
-
- i2c5_pins: i2c5 {
- brcm,pins = <12 13>;
- brcm,function = <BCM2835_FSEL_ALT5>;
- brcm,pull = <BCM2835_PUD_UP>;
- };
-
- i2c6_pins: i2c6 {
- brcm,pins = <22 23>;
- brcm,function = <BCM2835_FSEL_ALT5>;
- brcm,pull = <BCM2835_PUD_UP>;
- };
-
- i2s_pins: i2s {
- brcm,pins = <18 19 20 21>;
- brcm,function = <BCM2835_FSEL_ALT0>;
- };
-
- sdio_pins: sdio_pins {
- brcm,pins = <34 35 36 37 38 39>;
- brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
- brcm,pull = <0 2 2 2 2 2>;
- };
-
- bt_pins: bt_pins {
- brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
- // to fool pinctrl
- brcm,function = <0>;
- brcm,pull = <2>;
- };
-
- uart0_pins: uart0_pins {
- brcm,pins = <32 33>;
- brcm,function = <BCM2835_FSEL_ALT3>;
- brcm,pull = <0 2>;
- };
-
- uart1_pins: uart1_pins {
- brcm,pins;
- brcm,function;
- brcm,pull;
- };
-
- uart2_pins: uart2_pins {
- brcm,pins = <0 1>;
- brcm,function = <BCM2835_FSEL_ALT4>;
- brcm,pull = <0 2>;
- };
-
- uart3_pins: uart3_pins {
- brcm,pins = <4 5>;
- brcm,function = <BCM2835_FSEL_ALT4>;
- brcm,pull = <0 2>;
- };
-
- uart4_pins: uart4_pins {
- brcm,pins = <8 9>;
- brcm,function = <BCM2835_FSEL_ALT4>;
- brcm,pull = <0 2>;
- };
-
- uart5_pins: uart5_pins {
- brcm,pins = <12 13>;
- brcm,function = <BCM2835_FSEL_ALT4>;
- brcm,pull = <0 2>;
- };
+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
+ uart-has-rtscts;
+ status = "okay";
- audio_pins: audio_pins {
- brcm,pins = <40 41>;
- brcm,function = <4>;
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <2000000>;
+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
};
};
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins>;
- clock-frequency = <100000>;
-};
-
-&i2c1 {
+/* uart1 is mapped to the pin header */
+&uart1 {
pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins>;
- clock-frequency = <100000>;
-};
-
-&i2c2 {
- clock-frequency = <100000>;
+ pinctrl-0 = <&uart1_gpio14>;
+ status = "okay";
};
-&i2s {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s_pins>;
+&vchiq {
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};
/ {
--- a/arch/arm/boot/dts/bcm2711.dtsi
+++ b/arch/arm/boot/dts/bcm2711.dtsi
@@ -1,44 +1,890 @@
-#include "bcm2838.dtsi"
-#include "bcm270x.dtsi"
+// SPDX-License-Identifier: GPL-2.0
+#include "bcm283x.dtsi"
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/bcm2835-pm.h>
/ {
+ compatible = "brcm,bcm2711";
+
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&gicv2>;
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+
+ /*
+ * arm64 reserves the CMA by default somewhere in ZONE_DMA32,
+ * that's not good enough for the BCM2711 as some devices can
+ * only address the lower 1G of memory (ZONE_DMA).
+ */
+ linux,cma {
+ compatible = "shared-dma-pool";
+ size = <0x2000000>; /* 32MB */
+ alloc-ranges = <0x0 0x00000000 0x40000000>;
+ reusable;
+ linux,cma-default;
+ };
+ };
+
+
soc {
- /delete-node/ v3d@7ec00000;
+ /*
+ * Defined ranges:
+ * Common BCM283x peripherals
+ * BCM2711-specific peripherals
+ * ARM-local peripherals
+ */
+ ranges = <0x7e000000 0x0 0xfe000000 0x01800000>,
+ <0x7c000000 0x0 0xfc000000 0x02000000>,
+ <0x40000000 0x0 0xff800000 0x00800000>;
+ /* Emulate a contiguous 30-bit address range for DMA */
+ dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>;
+
+ /*
+ * This node is the provider for the enable-method for
+ * bringing up secondary cores.
+ */
+ local_intc: local_intc@40000000 {
+ compatible = "brcm,bcm2836-l1-intc";
+ reg = <0x40000000 0x100>;
+ };
+
+ gicv2: interrupt-controller@40041000 {
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ compatible = "arm,gic-400";
+ reg = <0x40041000 0x1000>,
+ <0x40042000 0x2000>,
+ <0x40044000 0x2000>,
+ <0x40046000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ dma: dma@7e007000 {
+ compatible = "brcm,bcm2835-dma";
+ reg = <0x7e007000 0xb00>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+ /* DMA lite 7 - 10 */
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma0",
+ "dma1",
+ "dma2",
+ "dma3",
+ "dma4",
+ "dma5",
+ "dma6",
+ "dma7",
+ "dma8",
+ "dma9",
+ "dma10";
+ #dma-cells = <1>;
+ brcm,dma-channel-mask = <0x07f5>;
+ };
+
+ pm: watchdog@7e100000 {
+ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
+ #power-domain-cells = <1>;
+ #reset-cells = <1>;
+ reg = <0x7e100000 0x114>,
+ <0x7e00a000 0x24>,
+ <0x7ec11000 0x20>;
+ clocks = <&clocks BCM2835_CLOCK_V3D>,
+ <&clocks BCM2835_CLOCK_PERI_IMAGE>,
+ <&clocks BCM2835_CLOCK_H264>,
+ <&clocks BCM2835_CLOCK_ISP>;
+ clock-names = "v3d", "peri_image", "h264", "isp";
+ system-power-controller;
+ };
+
+ rng@7e104000 {
+ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+
+ /* RNG is incompatible with brcm,bcm2835-rng */
+ status = "disabled";
+ };
+
+ uart2: serial@7e201400 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x7e201400 0x200>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_UART>,
+ <&clocks BCM2835_CLOCK_VPU>;
+ clock-names = "uartclk", "apb_pclk";
+ arm,primecell-periphid = <0x00241011>;
+ status = "disabled";
+ };
+
+ uart3: serial@7e201600 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x7e201600 0x200>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_UART>,
+ <&clocks BCM2835_CLOCK_VPU>;
+ clock-names = "uartclk", "apb_pclk";
+ arm,primecell-periphid = <0x00241011>;
+ status = "disabled";
+ };
+
+ uart4: serial@7e201800 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x7e201800 0x200>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_UART>,
+ <&clocks BCM2835_CLOCK_VPU>;
+ clock-names = "uartclk", "apb_pclk";
+ arm,primecell-periphid = <0x00241011>;
+ status = "disabled";
+ };
+
+ uart5: serial@7e201a00 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x7e201a00 0x200>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_UART>,
+ <&clocks BCM2835_CLOCK_VPU>;
+ clock-names = "uartclk", "apb_pclk";
+ arm,primecell-periphid = <0x00241011>;
+ status = "disabled";
+ };
+
+ spi3: spi@7e204600 {
+ compatible = "brcm,bcm2835-spi";
+ reg = <0x7e204600 0x0200>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi4: spi@7e204800 {
+ compatible = "brcm,bcm2835-spi";
+ reg = <0x7e204800 0x0200>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi5: spi@7e204a00 {
+ compatible = "brcm,bcm2835-spi";
+ reg = <0x7e204a00 0x0200>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi6: spi@7e204c00 {
+ compatible = "brcm,bcm2835-spi";
+ reg = <0x7e204c00 0x0200>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@7e205600 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ reg = <0x7e205600 0x200>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@7e205800 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ reg = <0x7e205800 0x200>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@7e205a00 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ reg = <0x7e205a00 0x200>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c6: i2c@7e205c00 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ reg = <0x7e205c00 0x200>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ pwm1: pwm@7e20c800 {
+ compatible = "brcm,bcm2835-pwm";
+ reg = <0x7e20c800 0x28>;
+ clocks = <&clocks BCM2835_CLOCK_PWM>;
+ assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
+ assigned-clock-rates = <10000000>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ emmc2: emmc2@7e340000 {
+ compatible = "brcm,bcm2711-emmc2";
+ reg = <0x7e340000 0x100>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clocks BCM2711_CLOCK_EMMC2>;
+ status = "disabled";
+ };
+
+ hvs@7e400000 {
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>;
+ /* This only applies to the ARMv7 stub */
+ arm,cpu-registers-not-fw-configured;
+ };
+
+ cpus: cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x000000d8>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <1>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x000000e0>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <2>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x000000e8>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <3>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x000000f0>;
+ };
};
- __overrides__ {
- arm_freq;
+ scb {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>;
+
+ genet: ethernet@7d580000 {
+ compatible = "brcm,bcm2711-genet-v5";
+ reg = <0x0 0x7d580000 0x10000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+
+ genet_mdio: mdio@e14 {
+ compatible = "brcm,genet-mdio-v5";
+ reg = <0xe14 0x8>;
+ reg-names = "mdio";
+ #address-cells = <0x0>;
+ #size-cells = <0x1>;
+ };
+ };
};
};
-&v3d {
- status = "disabled";
+&clk_osc {
+ clock-frequency = <54000000>;
};
-&firmwarekms {
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+&clocks {
+ compatible = "brcm,bcm2711-cprman";
};
-&smi {
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+&cpu_thermal {
+ coefficients = <(-487) 410040>;
};
-&mmc {
- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+&dsi0 {
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&dsi1 {
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&gpio {
+ compatible = "brcm,bcm2711-gpio";
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+
+ gpclk0_gpio49: gpclk0_gpio49 {
+ pin-gpclk {
+ pins = "gpio49";
+ function = "alt1";
+ bias-disable;
+ };
+ };
+ gpclk1_gpio50: gpclk1_gpio50 {
+ pin-gpclk {
+ pins = "gpio50";
+ function = "alt1";
+ bias-disable;
+ };
+ };
+ gpclk2_gpio51: gpclk2_gpio51 {
+ pin-gpclk {
+ pins = "gpio51";
+ function = "alt1";
+ bias-disable;
+ };
+ };
+
+ i2c0_gpio46: i2c0_gpio46 {
+ pin-sda {
+ function = "alt0";
+ pins = "gpio46";
+ bias-pull-up;
+ };
+ pin-scl {
+ function = "alt0";
+ pins = "gpio47";
+ bias-disable;
+ };
+ };
+ i2c1_gpio46: i2c1_gpio46 {
+ pin-sda {
+ function = "alt1";
+ pins = "gpio46";
+ bias-pull-up;
+ };
+ pin-scl {
+ function = "alt1";
+ pins = "gpio47";
+ bias-disable;
+ };
+ };
+ i2c3_gpio2: i2c3_gpio2 {
+ pin-sda {
+ function = "alt5";
+ pins = "gpio2";
+ bias-pull-up;
+ };
+ pin-scl {
+ function = "alt5";
+ pins = "gpio3";
+ bias-disable;
+ };
+ };
+ i2c3_gpio4: i2c3_gpio4 {
+ pin-sda {
+ function = "alt5";
+ pins = "gpio4";
+ bias-pull-up;
+ };
+ pin-scl {
+ function = "alt5";
+ pins = "gpio5";
+ bias-disable;
+ };
+ };
+ i2c4_gpio6: i2c4_gpio6 {
+ pin-sda {
+ function = "alt5";
+ pins = "gpio6";
+ bias-pull-up;
+ };
+ pin-scl {
+ function = "alt5";
+ pins = "gpio7";
+ bias-disable;
+ };
+ };
+ i2c4_gpio8: i2c4_gpio8 {
+ pin-sda {
+ function = "alt5";
+ pins = "gpio8";
+ bias-pull-up;
+ };
+ pin-scl {
+ function = "alt5";
+ pins = "gpio9";
+ bias-disable;
+ };
+ };
+ i2c5_gpio10: i2c5_gpio10 {
+ pin-sda {
+ function = "alt5";
+ pins = "gpio10";
+ bias-pull-up;
+ };
+ pin-scl {
+ function = "alt5";
+ pins = "gpio11";
+ bias-disable;
+ };
+ };
+ i2c5_gpio12: i2c5_gpio12 {
+ pin-sda {
+ function = "alt5";
+ pins = "gpio12";
+ bias-pull-up;
+ };
+ pin-scl {
+ function = "alt5";
+ pins = "gpio13";
+ bias-disable;
+ };
+ };
+ i2c6_gpio0: i2c6_gpio0 {
+ pin-sda {
+ function = "alt5";
+ pins = "gpio0";
+ bias-pull-up;
+ };
+ pin-scl {
+ function = "alt5";
+ pins = "gpio1";
+ bias-disable;
+ };
+ };
+ i2c6_gpio22: i2c6_gpio22 {
+ pin-sda {
+ function = "alt5";
+ pins = "gpio22";
+ bias-pull-up;
+ };
+ pin-scl {
+ function = "alt5";
+ pins = "gpio23";
+ bias-disable;
+ };
+ };
+ i2c_slave_gpio8: i2c_slave_gpio8 {
+ pins-i2c-slave {
+ pins = "gpio8",
+ "gpio9",
+ "gpio10",
+ "gpio11";
+ function = "alt3";
+ };
+ };
+
+ jtag_gpio48: jtag_gpio48 {
+ pins-jtag {
+ pins = "gpio48",
+ "gpio49",
+ "gpio50",
+ "gpio51",
+ "gpio52",
+ "gpio53";
+ function = "alt4";
+ };
+ };
+
+ mii_gpio28: mii_gpio28 {
+ pins-mii {
+ pins = "gpio28",
+ "gpio29",