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950-0050-Add-SMI-driver.patch
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950-0050-Add-SMI-driver.patch
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From 5d41827cef0a52089040b6edd311e5c0fdae1fc9 Mon Sep 17 00:00:00 2001
From: Luke Wren <wren6991@gmail.com>
Date: Sat, 5 Sep 2015 01:14:45 +0100
Subject: [PATCH] Add SMI driver
Signed-off-by: Luke Wren <wren6991@gmail.com>
MISC: bcm2835: smi: use clock manager and fix reload issues
Use clock manager instead of self-made clockmanager.
Also fix some error paths that showd up during development
(especially missing release of dma resources on rmmod)
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
bcm2835_smi: re-add dereference to fix DMA transfers
---
.../bindings/misc/brcm,bcm2835-smi-dev.txt | 17 +
.../bindings/misc/brcm,bcm2835-smi.txt | 48 +
drivers/char/broadcom/Kconfig | 9 +
drivers/char/broadcom/Makefile | 1 +
drivers/char/broadcom/bcm2835_smi_dev.c | 402 ++++++++
drivers/misc/Kconfig | 8 +
drivers/misc/Makefile | 1 +
drivers/misc/bcm2835_smi.c | 955 ++++++++++++++++++
include/linux/broadcom/bcm2835_smi.h | 391 +++++++
9 files changed, 1832 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/brcm,bcm2835-smi-dev.txt
create mode 100644 Documentation/devicetree/bindings/misc/brcm,bcm2835-smi.txt
create mode 100644 drivers/char/broadcom/bcm2835_smi_dev.c
create mode 100644 drivers/misc/bcm2835_smi.c
create mode 100644 include/linux/broadcom/bcm2835_smi.h
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/brcm,bcm2835-smi-dev.txt
@@ -0,0 +1,17 @@
+* Broadcom BCM2835 SMI character device driver.
+
+SMI or secondary memory interface is a peripheral specific to certain Broadcom
+SOCs, and is helpful for talking to things like parallel-interface displays
+and NAND flashes (in fact, most things with a parallel register interface).
+
+This driver adds a character device which provides a user-space interface to
+an instance of the SMI driver.
+
+Required properties:
+- compatible: "brcm,bcm2835-smi-dev"
+- smi_handle: a phandle to the smi node.
+
+Optional properties:
+- None.
+
+
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/brcm,bcm2835-smi.txt
@@ -0,0 +1,48 @@
+* Broadcom BCM2835 SMI driver.
+
+SMI or secondary memory interface is a peripheral specific to certain Broadcom
+SOCs, and is helpful for talking to things like parallel-interface displays
+and NAND flashes (in fact, most things with a parallel register interface).
+
+Required properties:
+- compatible: "brcm,bcm2835-smi"
+- reg: Should contain location and length of SMI registers and SMI clkman regs
+- interrupts: *the* SMI interrupt.
+- pinctrl-names: should be "default".
+- pinctrl-0: the phandle of the gpio pin node.
+- brcm,smi-clock-source: the clock source for clkman
+- brcm,smi-clock-divisor: the integer clock divisor for clkman
+- dmas: the dma controller phandle and the DREQ number (4 on a 2835)
+- dma-names: the name used by the driver to request its channel.
+ Should be "rx-tx".
+
+Optional properties:
+- None.
+
+Examples:
+
+8 data pin configuration:
+
+smi: smi@7e600000 {
+ compatible = "brcm,bcm2835-smi";
+ reg = <0x7e600000 0x44>, <0x7e1010b0 0x8>;
+ interrupts = <2 16>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smi_pins>;
+ brcm,smi-clock-source = <6>;
+ brcm,smi-clock-divisor = <4>;
+ dmas = <&dma 4>;
+ dma-names = "rx-tx";
+
+ status = "okay";
+};
+
+smi_pins: smi_pins {
+ brcm,pins = <2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
+ /* Alt 1: SMI */
+ brcm,function = <5 5 5 5 5 5 5 5 5 5 5 5 5 5>;
+ /* /CS, /WE and /OE are pulled high, as they are
+ generally active low signals */
+ brcm,pull = <2 2 2 2 2 2 0 0 0 0 0 0 0 0>;
+};
+
--- a/drivers/char/broadcom/Kconfig
+++ b/drivers/char/broadcom/Kconfig
@@ -24,3 +24,12 @@ config BCM2835_DEVGPIOMEM
Provides users with root-free access to the GPIO registers
on the 2835. Calling mmap(/dev/gpiomem) will map the GPIO
register page to the user's pointer.
+
+config BCM2835_SMI_DEV
+ tristate "Character device driver for BCM2835 Secondary Memory Interface"
+ depends on BCM2835_SMI
+ default m
+ help
+ This driver provides a character device interface (ioctl + read/write) to
+ Broadcom's Secondary Memory interface. The low-level functionality is provided
+ by the SMI driver itself.
--- a/drivers/char/broadcom/Makefile
+++ b/drivers/char/broadcom/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_BCM2708_VCMEM) += vc_mem.o
obj-$(CONFIG_BCM2835_DEVGPIOMEM)+= bcm2835-gpiomem.o
+obj-$(CONFIG_BCM2835_SMI_DEV) += bcm2835_smi_dev.o
--- /dev/null
+++ b/drivers/char/broadcom/bcm2835_smi_dev.c
@@ -0,0 +1,402 @@
+/**
+ * Character device driver for Broadcom Secondary Memory Interface
+ *
+ * Written by Luke Wren <luke@raspberrypi.org>
+ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/mm.h>
+#include <linux/pagemap.h>
+#include <linux/fs.h>
+#include <linux/cdev.h>
+#include <linux/fs.h>
+
+#include <linux/broadcom/bcm2835_smi.h>
+
+#define DEVICE_NAME "bcm2835-smi-dev"
+#define DRIVER_NAME "smi-dev-bcm2835"
+#define DEVICE_MINOR 0
+
+static struct cdev bcm2835_smi_cdev;
+static dev_t bcm2835_smi_devid;
+static struct class *bcm2835_smi_class;
+static struct device *bcm2835_smi_dev;
+
+struct bcm2835_smi_dev_instance {
+ struct device *dev;
+};
+
+static struct bcm2835_smi_instance *smi_inst;
+static struct bcm2835_smi_dev_instance *inst;
+
+static const char *const ioctl_names[] = {
+ "READ_SETTINGS",
+ "WRITE_SETTINGS",
+ "ADDRESS"
+};
+
+/****************************************************************************
+*
+* SMI chardev file ops
+*
+***************************************************************************/
+static long
+bcm2835_smi_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+ long ret = 0;
+
+ dev_info(inst->dev, "serving ioctl...");
+
+ switch (cmd) {
+ case BCM2835_SMI_IOC_GET_SETTINGS:{
+ struct smi_settings *settings;
+
+ dev_info(inst->dev, "Reading SMI settings to user.");
+ settings = bcm2835_smi_get_settings_from_regs(smi_inst);
+ if (copy_to_user((void *)arg, settings,
+ sizeof(struct smi_settings)))
+ dev_err(inst->dev, "settings copy failed.");
+ break;
+ }
+ case BCM2835_SMI_IOC_WRITE_SETTINGS:{
+ struct smi_settings *settings;
+
+ dev_info(inst->dev, "Setting user's SMI settings.");
+ settings = bcm2835_smi_get_settings_from_regs(smi_inst);
+ if (copy_from_user(settings, (void *)arg,
+ sizeof(struct smi_settings)))
+ dev_err(inst->dev, "settings copy failed.");
+ else
+ bcm2835_smi_set_regs_from_settings(smi_inst);
+ break;
+ }
+ case BCM2835_SMI_IOC_ADDRESS:
+ dev_info(inst->dev, "SMI address set: 0x%02x", (int)arg);
+ bcm2835_smi_set_address(smi_inst, arg);
+ break;
+ default:
+ dev_err(inst->dev, "invalid ioctl cmd: %d", cmd);
+ ret = -ENOTTY;
+ break;
+ }
+
+ return ret;
+}
+
+static int bcm2835_smi_open(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+
+ dev_dbg(inst->dev, "SMI device opened.");
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev,
+ "bcm2835_smi_release: Unknown minor device: %d",
+ dev);
+ return -ENXIO;
+ }
+
+ return 0;
+}
+
+static int bcm2835_smi_release(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev,
+ "bcm2835_smi_release: Unknown minor device %d", dev);
+ return -ENXIO;
+ }
+
+ return 0;
+}
+
+static ssize_t dma_bounce_user(
+ enum dma_transfer_direction dma_dir,
+ char __user *user_ptr,
+ size_t count,
+ struct bcm2835_smi_bounce_info *bounce)
+{
+ int chunk_size;
+ int chunk_no = 0;
+ int count_left = count;
+
+ while (count_left) {
+ int rv;
+ void *buf;
+
+ /* Wait for current chunk to complete: */
+ if (down_timeout(&bounce->callback_sem,
+ msecs_to_jiffies(1000))) {
+ dev_err(inst->dev, "DMA bounce timed out");
+ count -= (count_left);
+ break;
+ }
+
+ if (bounce->callback_sem.count >= DMA_BOUNCE_BUFFER_COUNT - 1)
+ dev_err(inst->dev, "WARNING: Ring buffer overflow");
+ chunk_size = count_left > DMA_BOUNCE_BUFFER_SIZE ?
+ DMA_BOUNCE_BUFFER_SIZE : count_left;
+ buf = bounce->buffer[chunk_no % DMA_BOUNCE_BUFFER_COUNT];
+ if (dma_dir == DMA_DEV_TO_MEM)
+ rv = copy_to_user(user_ptr, buf, chunk_size);
+ else
+ rv = copy_from_user(buf, user_ptr, chunk_size);
+ if (rv)
+ dev_err(inst->dev, "copy_*_user() failed!: %d", rv);
+ user_ptr += chunk_size;
+ count_left -= chunk_size;
+ chunk_no++;
+ }
+ return count;
+}
+
+static ssize_t
+bcm2835_read_file(struct file *f, char __user *user_ptr,
+ size_t count, loff_t *offs)
+{
+ int odd_bytes;
+
+ dev_dbg(inst->dev, "User reading %zu bytes from SMI.", count);
+ /* We don't want to DMA a number of bytes % 4 != 0 (32 bit FIFO) */
+ if (count > DMA_THRESHOLD_BYTES)
+ odd_bytes = count & 0x3;
+ else
+ odd_bytes = count;
+ count -= odd_bytes;
+ if (count) {
+ struct bcm2835_smi_bounce_info *bounce;
+
+ count = bcm2835_smi_user_dma(smi_inst,
+ DMA_DEV_TO_MEM, user_ptr, count,
+ &bounce);
+ if (count)
+ count = dma_bounce_user(DMA_DEV_TO_MEM, user_ptr,
+ count, bounce);
+ }
+ if (odd_bytes) {
+ /* Read from FIFO directly if not using DMA */
+ uint8_t buf[DMA_THRESHOLD_BYTES];
+
+ bcm2835_smi_read_buf(smi_inst, buf, odd_bytes);
+ if (copy_to_user(user_ptr, buf, odd_bytes))
+ dev_err(inst->dev, "copy_to_user() failed.");
+ count += odd_bytes;
+
+ }
+ return count;
+}
+
+static ssize_t
+bcm2835_write_file(struct file *f, const char __user *user_ptr,
+ size_t count, loff_t *offs)
+{
+ int odd_bytes;
+
+ dev_dbg(inst->dev, "User writing %zu bytes to SMI.", count);
+ if (count > DMA_THRESHOLD_BYTES)
+ odd_bytes = count & 0x3;
+ else
+ odd_bytes = count;
+ count -= odd_bytes;
+ if (count) {
+ struct bcm2835_smi_bounce_info *bounce;
+
+ count = bcm2835_smi_user_dma(smi_inst,
+ DMA_MEM_TO_DEV, (char __user *)user_ptr, count,
+ &bounce);
+ if (count)
+ count = dma_bounce_user(DMA_MEM_TO_DEV,
+ (char __user *)user_ptr,
+ count, bounce);
+ }
+ if (odd_bytes) {
+ uint8_t buf[DMA_THRESHOLD_BYTES];
+
+ if (copy_from_user(buf, user_ptr, odd_bytes))
+ dev_err(inst->dev, "copy_from_user() failed.");
+ else
+ bcm2835_smi_write_buf(smi_inst, buf, odd_bytes);
+ count += odd_bytes;
+ }
+ return count;
+}
+
+static const struct file_operations
+bcm2835_smi_fops = {
+ .owner = THIS_MODULE,
+ .unlocked_ioctl = bcm2835_smi_ioctl,
+ .open = bcm2835_smi_open,
+ .release = bcm2835_smi_release,
+ .read = bcm2835_read_file,
+ .write = bcm2835_write_file,
+};
+
+
+/****************************************************************************
+*
+* bcm2835_smi_probe - called when the driver is loaded.
+*
+***************************************************************************/
+
+static int bcm2835_smi_dev_probe(struct platform_device *pdev)
+{
+ int err;
+ void *ptr_err;
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->of_node, *smi_node;
+
+ if (!node) {
+ dev_err(dev, "No device tree node supplied!");
+ return -EINVAL;
+ }
+
+ smi_node = of_parse_phandle(node, "smi_handle", 0);
+
+ if (!smi_node) {
+ dev_err(dev, "No such property: smi_handle");
+ return -ENXIO;
+ }
+
+ smi_inst = bcm2835_smi_get(smi_node);
+
+ if (!smi_inst)
+ return -EPROBE_DEFER;
+
+ /* Allocate buffers and instance data */
+
+ inst = devm_kzalloc(dev, sizeof(*inst), GFP_KERNEL);
+
+ if (!inst)
+ return -ENOMEM;
+
+ inst->dev = dev;
+
+ /* Create character device entries */
+
+ err = alloc_chrdev_region(&bcm2835_smi_devid,
+ DEVICE_MINOR, 1, DEVICE_NAME);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to allocate device number");
+ return -ENOMEM;
+ }
+ cdev_init(&bcm2835_smi_cdev, &bcm2835_smi_fops);
+ bcm2835_smi_cdev.owner = THIS_MODULE;
+ err = cdev_add(&bcm2835_smi_cdev, bcm2835_smi_devid, 1);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to register device");
+ err = -ENOMEM;
+ goto failed_cdev_add;
+ }
+
+ /* Create sysfs entries */
+
+ bcm2835_smi_class = class_create(THIS_MODULE, DEVICE_NAME);
+ ptr_err = bcm2835_smi_class;
+ if (IS_ERR(ptr_err))
+ goto failed_class_create;
+
+ bcm2835_smi_dev = device_create(bcm2835_smi_class, NULL,
+ bcm2835_smi_devid, NULL,
+ "smi");
+ ptr_err = bcm2835_smi_dev;
+ if (IS_ERR(ptr_err))
+ goto failed_device_create;
+
+ dev_info(inst->dev, "initialised");
+
+ return 0;
+
+failed_device_create:
+ class_destroy(bcm2835_smi_class);
+failed_class_create:
+ cdev_del(&bcm2835_smi_cdev);
+ err = PTR_ERR(ptr_err);
+failed_cdev_add:
+ unregister_chrdev_region(bcm2835_smi_devid, 1);
+ dev_err(dev, "could not load bcm2835_smi_dev");
+ return err;
+}
+
+/****************************************************************************
+*
+* bcm2835_smi_remove - called when the driver is unloaded.
+*
+***************************************************************************/
+
+static int bcm2835_smi_dev_remove(struct platform_device *pdev)
+{
+ device_destroy(bcm2835_smi_class, bcm2835_smi_devid);
+ class_destroy(bcm2835_smi_class);
+ cdev_del(&bcm2835_smi_cdev);
+ unregister_chrdev_region(bcm2835_smi_devid, 1);
+
+ dev_info(inst->dev, "SMI character dev removed - OK");
+ return 0;
+}
+
+/****************************************************************************
+*
+* Register the driver with device tree
+*
+***************************************************************************/
+
+static const struct of_device_id bcm2835_smi_dev_of_match[] = {
+ {.compatible = "brcm,bcm2835-smi-dev",},
+ { /* sentinel */ },
+};
+
+MODULE_DEVICE_TABLE(of, bcm2835_smi_dev_of_match);
+
+static struct platform_driver bcm2835_smi_dev_driver = {
+ .probe = bcm2835_smi_dev_probe,
+ .remove = bcm2835_smi_dev_remove,
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = bcm2835_smi_dev_of_match,
+ },
+};
+
+module_platform_driver(bcm2835_smi_dev_driver);
+
+MODULE_ALIAS("platform:smi-dev-bcm2835");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION(
+ "Character device driver for BCM2835's secondary memory interface");
+MODULE_AUTHOR("Luke Wren <luke@raspberrypi.org>");
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -9,6 +9,14 @@ config SENSORS_LIS3LV02D
tristate
depends on INPUT
+config BCM2835_SMI
+ tristate "Broadcom 283x Secondary Memory Interface driver"
+ depends on ARCH_BCM2835
+ default m
+ help
+ Driver for enabling and using Broadcom's Secondary/Slow Memory Interface.
+ Appears as /dev/bcm2835_smi. For ioctl interface see drivers/misc/bcm2835_smi.h
+
config AD525X_DPOT
tristate "Analog Devices Digital Potentiometers"
depends on (I2C || SPI) && SYSFS
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_AD525X_DPOT_SPI) += ad525x_
obj-$(CONFIG_INTEL_MID_PTI) += pti.o
obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o
obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o
+obj-$(CONFIG_BCM2835_SMI) += bcm2835_smi.o
obj-$(CONFIG_DUMMY_IRQ) += dummy-irq.o
obj-$(CONFIG_ICS932S401) += ics932s401.o
obj-$(CONFIG_LKDTM) += lkdtm/
--- /dev/null
+++ b/drivers/misc/bcm2835_smi.c
@@ -0,0 +1,955 @@
+/**
+ * Broadcom Secondary Memory Interface driver
+ *
+ * Written by Luke Wren <luke@raspberrypi.org>
+ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/clk.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/pagemap.h>
+#include <linux/dma-mapping.h>
+#include <linux/dmaengine.h>
+#include <linux/semaphore.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+
+#define BCM2835_SMI_IMPLEMENTATION
+#include <linux/broadcom/bcm2835_smi.h>
+
+#define DRIVER_NAME "smi-bcm2835"
+
+#define N_PAGES_FROM_BYTES(n) ((n + PAGE_SIZE-1) / PAGE_SIZE)
+
+#define DMA_WRITE_TO_MEM true
+#define DMA_READ_FROM_MEM false
+
+struct bcm2835_smi_instance {
+ struct device *dev;
+ struct smi_settings settings;
+ __iomem void *smi_regs_ptr;
+ dma_addr_t smi_regs_busaddr;
+
+ struct dma_chan *dma_chan;
+ struct dma_slave_config dma_config;
+
+ struct bcm2835_smi_bounce_info bounce;
+
+ struct scatterlist buffer_sgl;
+
+ struct clk *clk;
+
+ /* Sometimes we are called into in an atomic context (e.g. by
+ JFFS2 + MTD) so we can't use a mutex */
+ spinlock_t transaction_lock;
+};
+
+/****************************************************************************
+*
+* SMI peripheral setup
+*
+***************************************************************************/
+
+static inline void write_smi_reg(struct bcm2835_smi_instance *inst,
+ u32 val, unsigned reg)
+{
+ writel(val, inst->smi_regs_ptr + reg);
+}
+
+static inline u32 read_smi_reg(struct bcm2835_smi_instance *inst, unsigned reg)
+{
+ return readl(inst->smi_regs_ptr + reg);
+}
+
+/* Token-paste macro for e.g SMIDSR_RSTROBE -> value of SMIDSR_RSTROBE_MASK */
+#define _CONCAT(x, y) x##y
+#define CONCAT(x, y) _CONCAT(x, y)
+
+#define SET_BIT_FIELD(dest, field, bits) ((dest) = \
+ ((dest) & ~CONCAT(field, _MASK)) | (((bits) << CONCAT(field, _OFFS))& \
+ CONCAT(field, _MASK)))
+#define GET_BIT_FIELD(src, field) (((src) & \
+ CONCAT(field, _MASK)) >> CONCAT(field, _OFFS))
+
+static void smi_dump_context_labelled(struct bcm2835_smi_instance *inst,
+ const char *label)
+{
+ dev_err(inst->dev, "SMI context dump: %s", label);
+ dev_err(inst->dev, "SMICS: 0x%08x", read_smi_reg(inst, SMICS));
+ dev_err(inst->dev, "SMIL: 0x%08x", read_smi_reg(inst, SMIL));
+ dev_err(inst->dev, "SMIDSR: 0x%08x", read_smi_reg(inst, SMIDSR0));
+ dev_err(inst->dev, "SMIDSW: 0x%08x", read_smi_reg(inst, SMIDSW0));
+ dev_err(inst->dev, "SMIDC: 0x%08x", read_smi_reg(inst, SMIDC));
+ dev_err(inst->dev, "SMIFD: 0x%08x", read_smi_reg(inst, SMIFD));
+ dev_err(inst->dev, " ");
+}
+
+static inline void smi_dump_context(struct bcm2835_smi_instance *inst)
+{
+ smi_dump_context_labelled(inst, "");
+}
+
+static void smi_get_default_settings(struct bcm2835_smi_instance *inst)
+{
+ struct smi_settings *settings = &inst->settings;
+
+ settings->data_width = SMI_WIDTH_16BIT;
+ settings->pack_data = true;
+
+ settings->read_setup_time = 1;
+ settings->read_hold_time = 1;
+ settings->read_pace_time = 1;
+ settings->read_strobe_time = 3;
+
+ settings->write_setup_time = settings->read_setup_time;
+ settings->write_hold_time = settings->read_hold_time;
+ settings->write_pace_time = settings->read_pace_time;
+ settings->write_strobe_time = settings->read_strobe_time;
+
+ settings->dma_enable = true;
+ settings->dma_passthrough_enable = false;
+ settings->dma_read_thresh = 0x01;
+ settings->dma_write_thresh = 0x3f;
+ settings->dma_panic_read_thresh = 0x20;
+ settings->dma_panic_write_thresh = 0x20;
+}
+
+void bcm2835_smi_set_regs_from_settings(struct bcm2835_smi_instance *inst)
+{
+ struct smi_settings *settings = &inst->settings;
+ int smidsr_temp = 0, smidsw_temp = 0, smics_temp,
+ smidcs_temp, smidc_temp = 0;
+
+ spin_lock(&inst->transaction_lock);
+
+ /* temporarily disable the peripheral: */
+ smics_temp = read_smi_reg(inst, SMICS);
+ write_smi_reg(inst, 0, SMICS);
+ smidcs_temp = read_smi_reg(inst, SMIDCS);
+ write_smi_reg(inst, 0, SMIDCS);
+
+ if (settings->pack_data)
+ smics_temp |= SMICS_PXLDAT;
+ else
+ smics_temp &= ~SMICS_PXLDAT;
+
+ SET_BIT_FIELD(smidsr_temp, SMIDSR_RWIDTH, settings->data_width);
+ SET_BIT_FIELD(smidsr_temp, SMIDSR_RSETUP, settings->read_setup_time);
+ SET_BIT_FIELD(smidsr_temp, SMIDSR_RHOLD, settings->read_hold_time);
+ SET_BIT_FIELD(smidsr_temp, SMIDSR_RPACE, settings->read_pace_time);
+ SET_BIT_FIELD(smidsr_temp, SMIDSR_RSTROBE, settings->read_strobe_time);
+ write_smi_reg(inst, smidsr_temp, SMIDSR0);
+
+ SET_BIT_FIELD(smidsw_temp, SMIDSW_WWIDTH, settings->data_width);
+ if (settings->data_width == SMI_WIDTH_8BIT)
+ smidsw_temp |= SMIDSW_WSWAP;
+ else
+ smidsw_temp &= ~SMIDSW_WSWAP;
+ SET_BIT_FIELD(smidsw_temp, SMIDSW_WSETUP, settings->write_setup_time);
+ SET_BIT_FIELD(smidsw_temp, SMIDSW_WHOLD, settings->write_hold_time);
+ SET_BIT_FIELD(smidsw_temp, SMIDSW_WPACE, settings->write_pace_time);
+ SET_BIT_FIELD(smidsw_temp, SMIDSW_WSTROBE,
+ settings->write_strobe_time);
+ write_smi_reg(inst, smidsw_temp, SMIDSW0);
+
+ SET_BIT_FIELD(smidc_temp, SMIDC_REQR, settings->dma_read_thresh);
+ SET_BIT_FIELD(smidc_temp, SMIDC_REQW, settings->dma_write_thresh);
+ SET_BIT_FIELD(smidc_temp, SMIDC_PANICR,
+ settings->dma_panic_read_thresh);
+ SET_BIT_FIELD(smidc_temp, SMIDC_PANICW,
+ settings->dma_panic_write_thresh);
+ if (settings->dma_passthrough_enable) {
+ smidc_temp |= SMIDC_DMAP;
+ smidsr_temp |= SMIDSR_RDREQ;
+ write_smi_reg(inst, smidsr_temp, SMIDSR0);
+ smidsw_temp |= SMIDSW_WDREQ;
+ write_smi_reg(inst, smidsw_temp, SMIDSW0);
+ } else
+ smidc_temp &= ~SMIDC_DMAP;
+ if (settings->dma_enable)
+ smidc_temp |= SMIDC_DMAEN;
+ else
+ smidc_temp &= ~SMIDC_DMAEN;
+
+ write_smi_reg(inst, smidc_temp, SMIDC);
+
+ /* re-enable (if was previously enabled) */
+ write_smi_reg(inst, smics_temp, SMICS);
+ write_smi_reg(inst, smidcs_temp, SMIDCS);
+
+ spin_unlock(&inst->transaction_lock);
+}
+EXPORT_SYMBOL(bcm2835_smi_set_regs_from_settings);
+
+struct smi_settings *bcm2835_smi_get_settings_from_regs
+ (struct bcm2835_smi_instance *inst)
+{
+ struct smi_settings *settings = &inst->settings;
+ int smidsr, smidsw, smidc;
+
+ spin_lock(&inst->transaction_lock);
+
+ smidsr = read_smi_reg(inst, SMIDSR0);
+ smidsw = read_smi_reg(inst, SMIDSW0);
+ smidc = read_smi_reg(inst, SMIDC);
+
+ settings->pack_data = (read_smi_reg(inst, SMICS) & SMICS_PXLDAT) ?
+ true : false;
+
+ settings->data_width = GET_BIT_FIELD(smidsr, SMIDSR_RWIDTH);
+ settings->read_setup_time = GET_BIT_FIELD(smidsr, SMIDSR_RSETUP);
+ settings->read_hold_time = GET_BIT_FIELD(smidsr, SMIDSR_RHOLD);
+ settings->read_pace_time = GET_BIT_FIELD(smidsr, SMIDSR_RPACE);
+ settings->read_strobe_time = GET_BIT_FIELD(smidsr, SMIDSR_RSTROBE);
+
+ settings->write_setup_time = GET_BIT_FIELD(smidsw, SMIDSW_WSETUP);
+ settings->write_hold_time = GET_BIT_FIELD(smidsw, SMIDSW_WHOLD);
+ settings->write_pace_time = GET_BIT_FIELD(smidsw, SMIDSW_WPACE);
+ settings->write_strobe_time = GET_BIT_FIELD(smidsw, SMIDSW_WSTROBE);
+
+ settings->dma_read_thresh = GET_BIT_FIELD(smidc, SMIDC_REQR);
+ settings->dma_write_thresh = GET_BIT_FIELD(smidc, SMIDC_REQW);
+ settings->dma_panic_read_thresh = GET_BIT_FIELD(smidc, SMIDC_PANICR);
+ settings->dma_panic_write_thresh = GET_BIT_FIELD(smidc, SMIDC_PANICW);
+ settings->dma_passthrough_enable = (smidc & SMIDC_DMAP) ? true : false;
+ settings->dma_enable = (smidc & SMIDC_DMAEN) ? true : false;
+
+ spin_unlock(&inst->transaction_lock);
+
+ return settings;
+}
+EXPORT_SYMBOL(bcm2835_smi_get_settings_from_regs);
+
+static inline void smi_set_address(struct bcm2835_smi_instance *inst,
+ unsigned int address)
+{
+ int smia_temp = 0, smida_temp = 0;
+
+ SET_BIT_FIELD(smia_temp, SMIA_ADDR, address);
+ SET_BIT_FIELD(smida_temp, SMIDA_ADDR, address);
+
+ /* Write to both address registers - user doesn't care whether we're
+ doing programmed or direct transfers. */
+ write_smi_reg(inst, smia_temp, SMIA);
+ write_smi_reg(inst, smida_temp, SMIDA);
+}
+
+static void smi_setup_regs(struct bcm2835_smi_instance *inst)
+{
+
+ dev_dbg(inst->dev, "Initialising SMI registers...");
+ /* Disable the peripheral if already enabled */
+ write_smi_reg(inst, 0, SMICS);
+ write_smi_reg(inst, 0, SMIDCS);
+
+ smi_get_default_settings(inst);
+ bcm2835_smi_set_regs_from_settings(inst);
+ smi_set_address(inst, 0);
+
+ write_smi_reg(inst, read_smi_reg(inst, SMICS) | SMICS_ENABLE, SMICS);
+ write_smi_reg(inst, read_smi_reg(inst, SMIDCS) | SMIDCS_ENABLE,
+ SMIDCS);
+}
+
+/****************************************************************************
+*
+* Low-level SMI access functions
+* Other modules should use the exported higher-level functions e.g.
+* bcm2835_smi_write_buf() unless they have a good reason to use these
+*
+***************************************************************************/
+
+static inline uint32_t smi_read_single_word(struct bcm2835_smi_instance *inst)
+{
+ int timeout = 0;
+
+ write_smi_reg(inst, SMIDCS_ENABLE, SMIDCS);
+ write_smi_reg(inst, SMIDCS_ENABLE | SMIDCS_START, SMIDCS);
+ /* Make sure things happen in the right order...*/
+ mb();
+ while (!(read_smi_reg(inst, SMIDCS) & SMIDCS_DONE) &&
+ ++timeout < 10000)
+ ;
+ if (timeout < 10000)
+ return read_smi_reg(inst, SMIDD);
+
+ dev_err(inst->dev,
+ "SMI direct read timed out (is the clock set up correctly?)");
+ return 0;
+}
+
+static inline void smi_write_single_word(struct bcm2835_smi_instance *inst,
+ uint32_t data)
+{
+ int timeout = 0;
+
+ write_smi_reg(inst, SMIDCS_ENABLE | SMIDCS_WRITE, SMIDCS);
+ write_smi_reg(inst, data, SMIDD);
+ write_smi_reg(inst, SMIDCS_ENABLE | SMIDCS_WRITE | SMIDCS_START,
+ SMIDCS);
+
+ while (!(read_smi_reg(inst, SMIDCS) & SMIDCS_DONE) &&
+ ++timeout < 10000)
+ ;
+ if (timeout >= 10000)
+ dev_err(inst->dev,
+ "SMI direct write timed out (is the clock set up correctly?)");
+}
+
+/* Initiates a programmed read into the read FIFO. It is up to the caller to
+ * read data from the FIFO - either via paced DMA transfer,
+ * or polling SMICS_RXD to check whether data is available.
+ * SMICS_ACTIVE will go low upon completion. */
+static void smi_init_programmed_read(struct bcm2835_smi_instance *inst,
+ int num_transfers)
+{
+ int smics_temp;
+
+ /* Disable the peripheral: */
+ smics_temp = read_smi_reg(inst, SMICS) & ~(SMICS_ENABLE | SMICS_WRITE);
+ write_smi_reg(inst, smics_temp, SMICS);
+ while (read_smi_reg(inst, SMICS) & SMICS_ENABLE)
+ ;
+
+ /* Program the transfer count: */
+ write_smi_reg(inst, num_transfers, SMIL);
+
+ /* re-enable and start: */
+ smics_temp |= SMICS_ENABLE;
+ write_smi_reg(inst, smics_temp, SMICS);
+ smics_temp |= SMICS_CLEAR;
+ /* Just to be certain: */
+ mb();
+ while (read_smi_reg(inst, SMICS) & SMICS_ACTIVE)
+ ;
+ write_smi_reg(inst, smics_temp, SMICS);
+ smics_temp |= SMICS_START;
+ write_smi_reg(inst, smics_temp, SMICS);
+}
+
+/* Initiates a programmed write sequence, using data from the write FIFO.
+ * It is up to the caller to initiate a DMA transfer before calling,
+ * or use another method to keep the write FIFO topped up.
+ * SMICS_ACTIVE will go low upon completion.
+ */
+static void smi_init_programmed_write(struct bcm2835_smi_instance *inst,
+ int num_transfers)
+{
+ int smics_temp;
+
+ /* Disable the peripheral: */
+ smics_temp = read_smi_reg(inst, SMICS) & ~SMICS_ENABLE;
+ write_smi_reg(inst, smics_temp, SMICS);
+ while (read_smi_reg(inst, SMICS) & SMICS_ENABLE)
+ ;
+
+ /* Program the transfer count: */
+ write_smi_reg(inst, num_transfers, SMIL);
+
+ /* setup, re-enable and start: */
+ smics_temp |= SMICS_WRITE | SMICS_ENABLE;
+ write_smi_reg(inst, smics_temp, SMICS);
+ smics_temp |= SMICS_START;
+ write_smi_reg(inst, smics_temp, SMICS);
+}
+
+/* Initiate a read and then poll FIFO for data, reading out as it appears. */
+static void smi_read_fifo(struct bcm2835_smi_instance *inst,
+ uint32_t *dest, int n_bytes)
+{
+ if (read_smi_reg(inst, SMICS) & SMICS_RXD) {
+ smi_dump_context_labelled(inst,
+ "WARNING: read FIFO not empty at start of read call.");
+ while (read_smi_reg(inst, SMICS))
+ ;
+ }
+
+ /* Dispatch the read: */
+ if (inst->settings.data_width == SMI_WIDTH_8BIT)
+ smi_init_programmed_read(inst, n_bytes);
+ else if (inst->settings.data_width == SMI_WIDTH_16BIT)
+ smi_init_programmed_read(inst, n_bytes / 2);
+ else {
+ dev_err(inst->dev, "Unsupported data width for read.");
+ return;
+ }
+
+ /* Poll FIFO to keep it empty */
+ while (!(read_smi_reg(inst, SMICS) & SMICS_DONE))
+ if (read_smi_reg(inst, SMICS) & SMICS_RXD)
+ *dest++ = read_smi_reg(inst, SMID);
+
+ /* Ensure that the FIFO is emptied */
+ if (read_smi_reg(inst, SMICS) & SMICS_RXD) {
+ int fifo_count;
+
+ fifo_count = GET_BIT_FIELD(read_smi_reg(inst, SMIFD),
+ SMIFD_FCNT);
+ while (fifo_count--)
+ *dest++ = read_smi_reg(inst, SMID);
+ }
+
+ if (!(read_smi_reg(inst, SMICS) & SMICS_DONE))
+ smi_dump_context_labelled(inst,
+ "WARNING: transaction finished but done bit not set.");
+
+ if (read_smi_reg(inst, SMICS) & SMICS_RXD)
+ smi_dump_context_labelled(inst,
+ "WARNING: read FIFO not empty at end of read call.");
+
+}
+
+/* Initiate a write, and then keep the FIFO topped up. */
+static void smi_write_fifo(struct bcm2835_smi_instance *inst,