mt7628an_netgear_r6xxx.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "mt7628an.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	leds {
		compatible = "gpio-leds";

		lan {
			label = "green:lan";
			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
		};

		led_power: power {
			label = "green:power";
			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
		};

		wlan2g_green {
			label = "green:wlan2g";
			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};

		wlan2g_orange {
			label = "orange:wlan2g";
			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
		};

		wan_green {
			label = "green:wan";
			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
		};

		wan_orange {
			label = "orange:wan";
			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
		};
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <86000000>;
		m25p,fast-read;

		partitions: partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x40000>;
				read-only;
			};

			factory: partition@40000 {
				label = "factory";
				reg = <0x40000 0x20000>;
				read-only;
			};

			partition@60000 {
				label = "nvram";
				reg = <0x60000 0x30000>;
				read-only;
			};
		};
	};
};

&wmac {
	status = "okay";

	mediatek,mtd-eeprom = <&factory 0x0>;
};

&ethernet {
	nvmem-cells = <&macaddr_factory_4>;
	nvmem-cell-names = "mac-address";
};

&pcie {
	status = "okay";
};

&pcie0 {
	wifi5: wifi@0,0 {
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x8000>;
		ieee80211-freq-limit = <5000000 6000000>;
	};
};

&factory {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_factory_4: macaddr@4 {
		reg = <0x4 0x6>;
	};
};