forked from openwrt/openwrt
/
vr9.dtsi
564 lines (477 loc) · 11.4 KB
/
vr9.dtsi
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,xway", "lantiq,vr9";
aliases {
serial0 = &asc1;
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "mips,mips34Kc";
reg = <0>;
};
};
cputemp {
compatible = "lantiq,cputemp";
};
reboot {
compatible = "syscon-reboot";
regmap = <&rcu0>;
offset = <0x10>;
mask = <0xe0000000>;
};
biu@1f800000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,biu", "simple-bus";
reg = <0x1f800000 0x800000>;
ranges = <0x0 0x1f800000 0x7fffff>;
icu0: icu@80200 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,icu";
reg = <0x80200 0xc8 /* icu0 */
0x80300 0xc8>; /* icu1 */
};
watchdog@803f0 {
compatible = "lantiq,xrx100-wdt", "lantiq,xrx100-wdt";
reg = <0x803f0 0x10>;
regmap = <&rcu0>;
};
};
sram@1f000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,sram", "simple-bus";
reg = <0x1f000000 0x800000>;
ranges = <0x0 0x1f000000 0x7fffff>;
eiu0: eiu@101000 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,eiu-xway";
reg = <0x101000 0x1000>;
interrupt-parent = <&icu0>;
lantiq,eiu-irqs = <166 135 66 40 41 42>;
};
pmu0: pmu@102000 {
compatible = "lantiq,pmu-xway";
reg = <0x102000 0x1000>;
};
cgu0: cgu@103000 {
compatible = "lantiq,cgu-xway";
reg = <0x103000 0x1000>;
};
dcdc@106a00 {
compatible = "lantiq,dcdc-xrx200";
reg = <0x106a00 0x200>;
};
vmmc: vmmc@107000 {
status = "disabled";
compatible = "lantiq,vmmc-xway";
reg = <0x107000 0x300>;
interrupt-parent = <&icu0>;
interrupts = <150 151 152 153 154 155>;
};
pcie0_phy: phy@106800 {
compatible = "lantiq,vrx200-pcie-phy";
reg = <0x106800 0x100>;
lantiq,rcu = <&rcu0>;
lantiq,rcu-endian-offset = <0x4c>;
lantiq,rcu-big-endian-mask = <0x80>; /* bit 7 */
big-endian;
resets = <&reset0 12 24>, <&reset0 22 22>;
reset-names = "phy", "pcie";
#phy-cells = <1>;
};
rcu0: rcu@203000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
reg = <0x203000 0x100>;
ranges = <0x0 0x203000 0x100>;
big-endian;
reset0: reset-controller@10 {
compatible = "lantiq,xrx200-reset";
reg = <0x10 4>, <0x14 4>;
#reset-cells = <2>;
};
reset1: reset-controller@48 {
compatible = "lantiq,xrx200-reset";
reg = <0x48 4>, <0x24 4>;
#reset-cells = <2>;
};
usb_phy0: usb2-phy@18 {
compatible = "lantiq,xrx200-usb2-phy";
reg = <0x18 4>, <0x38 4>;
status = "disabled";
resets = <&reset1 4 4>, <&reset0 4 4>;
reset-names = "phy", "ctrl";
#phy-cells = <0>;
};
usb_phy1: usb2-phy@34 {
compatible = "lantiq,xrx200-usb2-phy";
reg = <0x34 4>, <0x3c 4>;
status = "disabled";
resets = <&reset1 5 5>, <&reset0 4 4>;
reset-names = "phy", "ctrl";
#phy-cells = <0>;
};
};
};
fpi@10000000 {
compatible = "lantiq,xrx200-fpi", "simple-bus";
ranges = <0x0 0x10000000 0xf000000>;
reg = <0x1f400000 0x1000>,
<0x10000000 0xf000000>;
regmap = <&rcu0>;
offset-endianness = <0x4c>;
#address-cells = <1>;
#size-cells = <1>;
localbus: localbus@0 {
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
1 0 0x4000000 0x4000010>; /* addsel1 */
compatible = "lantiq,localbus", "simple-bus";
};
gptu@e100a00 {
compatible = "lantiq,gptu-xway";
reg = <0xe100a00 0x100>;
interrupt-parent = <&icu0>;
interrupts = <126 127 128 129 130 131>;
};
usif: usif@da00000 {
compatible = "lantiq,usif";
reg = <0xda00000 0x1000000>;
interrupt-parent = <&icu0>;
interrupts = <29 125 107 108 109 110>;
status = "disabled";
};
spi: spi@e100800 {
compatible = "lantiq,xrx200-spi", "lantiq,xrx100-spi";
reg = <0xe100800 0x100>;
interrupt-parent = <&icu0>;
interrupts = <22 23 24>;
interrupt-names = "spi_rx", "spi_tx", "spi_err",
"spi_frm";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>, <&spi_cs4_pins>;
status = "disabled";
};
gpio: pinmux@e100b10 {
compatible = "lantiq,xrx200-pinctrl";
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&gpio 0 0 50>;
reg = <0xe100b10 0xa0>;
gphy0_led0_pins: gphy0-led0 {
mux {
lantiq,groups = "gphy0 led0";
lantiq,function = "gphy";
lantiq,open-drain = <0>;
lantiq,pull = <2>;
lantiq,output = <1>;
};
};
gphy0_led1_pins: gphy0-led1 {
mux {
lantiq,groups = "gphy0 led1";
lantiq,function = "gphy";
lantiq,open-drain = <0>;
lantiq,pull = <2>;
lantiq,output = <1>;
};
};
gphy0_led2_pins: gphy0-led2 {
mux {
lantiq,groups = "gphy0 led2";
lantiq,function = "gphy";
lantiq,open-drain = <0>;
lantiq,pull = <2>;
lantiq,output = <1>;
};
};
gphy1_led0_pins: gphy1-led0 {
mux {
lantiq,groups = "gphy1 led0";
lantiq,function = "gphy";
lantiq,open-drain = <0>;
lantiq,pull = <2>;
lantiq,output = <1>;
};
};
gphy1_led1_pins: gphy1-led1 {
mux {
lantiq,groups = "gphy1 led1";
lantiq,function = "gphy";
lantiq,open-drain = <0>;
lantiq,pull = <2>;
lantiq,output = <1>;
};
};
gphy1_led2_pins: gphy1-led2 {
mux {
lantiq,groups = "gphy1 led2";
lantiq,function = "gphy";
lantiq,open-drain = <0>;
lantiq,pull = <2>;
lantiq,output = <1>;
};
};
mdio_pins: mdio {
mux {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
};
nand_pins: nand {
mux-0 {
lantiq,groups = "nand cle", "nand ale",
"nand rd";
lantiq,function = "ebu";
lantiq,output = <1>;
lantiq,open-drain = <0>;
lantiq,pull = <0>;
};
mux-1 {
lantiq,groups = "nand rdy";
lantiq,function = "ebu";
lantiq,output = <0>;
lantiq,pull = <2>;
};
};
nand_cs1_pins: nand-cs1 {
mux {
lantiq,groups = "nand cs1";
lantiq,function = "ebu";
lantiq,open-drain = <0>;
lantiq,pull = <0>;
};
};
pci_gnt1_pins: pci-gnt1 {
mux {
lantiq,groups = "gnt1";
lantiq,function = "pci";
lantiq,output = <1>;
lantiq,open-drain = <0>;
lantiq,pull = <0>;
};
};
pci_req1_pins: pci-req1 {
mux {
lantiq,groups = "req1";
lantiq,function = "pci";
lantiq,output = <0>;
lantiq,open-drain = <1>;
lantiq,pull = <2>;
};
};
spi_pins: spi {
mux-0 {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
mux-1 {
lantiq,groups = "spi_do", "spi_clk";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
spi_cs4_pins: spi-cs4 {
mux {
lantiq,groups = "spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
stp_pins: stp {
mux {
lantiq,groups = "stp";
lantiq,function = "stp";
lantiq,pull = <0>;
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
};
};
stp: stp@e100bb0 {
status = "disabled";
compatible = "lantiq,gpio-stp-xway";
reg = <0xe100bb0 0x40>;
#gpio-cells = <2>;
gpio-controller;
pinctrl-0 = <&stp_pins>;
pinctrl-names = "default";
lantiq,shadow = <0xffffff>;
lantiq,groups = <0x7>;
lantiq,dsl = <0x0>;
lantiq,phy1 = <0x0>;
lantiq,phy2 = <0x0>;
};
asc1: serial@e100c00 {
compatible = "lantiq,asc";
reg = <0xe100c00 0x400>;
interrupt-parent = <&icu0>;
interrupts = <112 113 114>;
};
deu@e103100 {
compatible = "lantiq,deu-xrx200";
reg = <0xe103100 0xf00>;
};
dma0: dma@e104100 {
compatible = "lantiq,dma-xway";
reg = <0xe104100 0x800>;
};
ebu0: ebu@e105300 {
compatible = "lantiq,ebu-xway";
reg = <0xe105300 0x100>;
};
usb0: usb@e101000 {
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
compatible = "lantiq,xrx200-usb";
reg = <0xe101000 0x1000
0xe120000 0x3f000>;
interrupt-parent = <&icu0>;
interrupts = <62 91>;
dr_mode = "host";
phys = <&usb_phy0>;
phy-names = "usb2-phy";
ehci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
usb1: usb@e106000 {
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
compatible = "lantiq,xrx200-usb";
reg = <0xe106000 0x1000>;
interrupt-parent = <&icu0>;
interrupts = <91>;
dr_mode = "host";
phys = <&usb_phy1>;
phy-names = "usb2-phy";
ehci_port2: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
gswip: switch@e108000 {
compatible = "lantiq,xrx200-gswip";
#address-cells = <1>;
#size-cells = <0>;
reg = < 0xe108000 0x3000 /* switch */
0xe10b100 0x70 /* mdio */
0xe10b1d8 0x30 /* mii */
>;
dsa,member = <0 0>;
gswip_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
port@6 {
reg = <0x6>;
label = "cpu";
ethernet = <ð0>;
};
};
gswip_mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-mdio";
};
gphy-fw {
compatible = "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw";
lantiq,rcu = <&rcu0>;
#address-cells = <1>;
#size-cells = <0>;
gphy0: gphy@20 {
reg = <0x20>;
resets = <&reset0 31 30>;
reset-names = "gphy";
};
gphy1: gphy@68 {
reg = <0x68>;
resets = <&reset0 29 28>;
reset-names = "gphy";
};
};
};
eth0: eth@e10b308 {
compatible = "lantiq,xrx200-net";
reg = <0xe10b308 0x30>; /* pmac */
interrupt-parent = <&icu0>;
interrupts = <73>, <72>;
interrupt-names = "tx", "rx";
resets = <&reset0 21 16>, <&reset0 8 8>, <&reset0 3 3>;
reset-names = "switch", "ppe", "ppe_dsp";
#address-cells = <1>;
#size-cells = <0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
mei@e116000 {
compatible = "lantiq,mei-xrx200";
reg = <0xe116000 0x9c>;
interrupt-parent = <&icu0>;
interrupts = <63>;
};
ppe@e234000 {
compatible = "lantiq,ppe-xrx200";
reg = <0xe234000 0x3ffd>;
interrupt-parent = <&icu0>;
interrupts = <96>;
resets = <&reset0 3 3>, <&reset0 11 11>, <&reset0 23 23>;
reset-names = "dsp", "dfe", "tc";
};
pcie0: pcie@d900000 {
compatible = "lantiq,pcie-xrx200";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xd900000 0x1000>;
interrupt-parent = <&icu0>;
interrupts = <161 144>;
phys = <&pcie0_phy LANTIQ_PCIE_PHY_MODE_36MHZ>;
phy-names = "pcie";
resets = <&reset0 22 22>;
lantiq,rcu = <&rcu0>;
device_type = "pci";
gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
};
pci0: pci@e105400 {
status = "disabled";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
compatible = "lantiq,pci-xway";
bus-range = <0x0 0x0>;
ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
reg = <0x7000000 0x8000 /* config space */
0xe105400 0x400>; /* pci bridge */
lantiq,bus-clock = <33333333>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
req-mask = <0x1>; /* GNT1 */
device_type = "pci";
};
};
vdsl {
compatible = "lantiq,vdsl-vrx200";
};
};