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950-0043-MMC-added-alternative-MMC-driver.patch
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950-0043-MMC-added-alternative-MMC-driver.patch
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From 74f3233f6ed4298983348b2ba5a500f955703953 Mon Sep 17 00:00:00 2001
From: gellert <gellert@raspberrypi.org>
Date: Fri, 15 Aug 2014 16:35:06 +0100
Subject: [PATCH] MMC: added alternative MMC driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
mmc: Disable CMD23 transfers on all cards
Pending wire-level investigation of these types of transfers
and associated errors on bcm2835-mmc, disable for now. Fallback of
CMD18/CMD25 transfers will be used automatically by the MMC layer.
Reported/Tested-by: Gellert Weisz <gellert@raspberrypi.org>
mmc: bcm2835-mmc: enable DT support for all architectures
Both ARCH_BCM2835 and ARCH_BCM270x are built with OF now.
Enable Device Tree support for all architectures.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
mmc: bcm2835-mmc: fix probe error handling
Probe error handling is broken in several places.
Simplify error handling by using device managed functions.
Replace pr_{err,info} with dev_{err,info}.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
bcm2835-mmc: Add locks when accessing sdhost registers
bcm2835-mmc: Add range of debug options for slowing things down
bcm2835-mmc: Add option to disable some delays
bcm2835-mmc: Add option to disable MMC_QUIRK_BLK_NO_CMD23
bcm2835-mmc: Default to disabling MMC_QUIRK_BLK_NO_CMD23
bcm2835-mmc: Adding overclocking option
Allow a different clock speed to be substitued for a requested 50MHz.
This option is exposed using the "overclock_50" DT parameter.
Note that the mmc interface is restricted to EVEN integer divisions of
250MHz, and the highest sensible option is 63 (250/4 = 62.5), the
next being 125 (250/2) which is much too high.
Use at your own risk.
bcm2835-mmc: Round up the overclock, so 62 works for 62.5Mhz
Also only warn once for each overclock setting.
mmc: bcm2835-mmc: Make available on ARCH_BCM2835
Make the bcm2835-mmc driver available for use on ARCH_BCM2835.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
BCM270x_DT: add bcm2835-mmc entry
Add Device Tree entry for bcm2835-mmc.
In non-DT mode, don't add the device in the board file.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
bcm2835-mmc: Don't overwrite MMC capabilities from DT
bcm2835-mmc: Don't override bus width capabilities from devicetree
Take out the force setting of the MMC_CAP_4_BIT_DATA host capability
so that the result read from devicetree via mmc_of_parse() is
preserved.
bcm2835-mmc: Only claim one DMA channel
With both MMC controllers enabled there are few DMA channels left. The
bcm2835-mmc driver only uses DMA in one direction at a time, so it
doesn't need to claim two channels.
See: https://github.com/raspberrypi/linux/issues/1327
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
bcm2835-mmc: New timer API
mmc: bcm2835-mmc: Support underclocking
Support underclocking of the SD bus using the max-frequency DT property
(which currently has no DT parameter). The sd_overclock parameter
already provides another way to achieve the same thing which should be
equivalent in end result, but it is a bug not to support max-frequency
as well.
See: https://github.com/raspberrypi/linux/issues/2350
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/mmc/core/block.c | 28 +-
drivers/mmc/core/core.c | 3 +-
drivers/mmc/core/host.c | 17 +-
drivers/mmc/core/quirks.h | 8 +
drivers/mmc/host/Kconfig | 29 +
drivers/mmc/host/Makefile | 1 +
drivers/mmc/host/bcm2835-mmc.c | 1582 ++++++++++++++++++++++++++++++++
include/linux/mmc/card.h | 2 +
8 files changed, 1665 insertions(+), 5 deletions(-)
create mode 100644 drivers/mmc/host/bcm2835-mmc.c
--- a/drivers/mmc/core/block.c
+++ b/drivers/mmc/core/block.c
@@ -167,6 +167,13 @@ static DEFINE_MUTEX(open_lock);
module_param(perdev_minors, int, 0444);
MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device");
+/*
+ * Allow quirks to be overridden for the current card
+ */
+static char *card_quirks;
+module_param(card_quirks, charp, 0644);
+MODULE_PARM_DESC(card_quirks, "Force the use of the indicated quirks (a bitfield)");
+
static inline int mmc_blk_part_switch(struct mmc_card *card,
unsigned int part_type);
@@ -2876,6 +2883,7 @@ static int mmc_blk_probe(struct mmc_card
{
struct mmc_blk_data *md, *part_md;
char cap_str[10];
+ char quirk_str[24];
/*
* Check that the card supports the command class(es) we need.
@@ -2883,7 +2891,16 @@ static int mmc_blk_probe(struct mmc_card
if (!(card->csd.cmdclass & CCC_BLOCK_READ))
return -ENODEV;
- mmc_fixup_device(card, mmc_blk_fixups);
+ if (card_quirks) {
+ unsigned long quirks;
+ if (kstrtoul(card_quirks, 0, &quirks) == 0)
+ card->quirks = (unsigned int)quirks;
+ else
+ pr_err("mmc_block: Invalid card_quirks parameter '%s'\n",
+ card_quirks);
+ }
+ else
+ mmc_fixup_device(card, mmc_blk_fixups);
card->complete_wq = alloc_workqueue("mmc_complete",
WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
@@ -2898,9 +2915,14 @@ static int mmc_blk_probe(struct mmc_card
string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2,
cap_str, sizeof(cap_str));
- pr_info("%s: %s %s %s %s\n",
+ if (card->quirks)
+ snprintf(quirk_str, sizeof(quirk_str),
+ " (quirks 0x%08x)", card->quirks);
+ else
+ quirk_str[0] = '\0';
+ pr_info("%s: %s %s %s%s%s\n",
md->disk->disk_name, mmc_card_id(card), mmc_card_name(card),
- cap_str, md->read_only ? "(ro)" : "");
+ cap_str, md->read_only ? " (ro)" : "", quirk_str);
if (mmc_blk_alloc_parts(card, md))
goto out;
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -2230,7 +2230,8 @@ EXPORT_SYMBOL(mmc_erase);
int mmc_can_erase(struct mmc_card *card)
{
if ((card->host->caps & MMC_CAP_ERASE) &&
- (card->csd.cmdclass & CCC_ERASE) && card->erase_size)
+ (card->csd.cmdclass & CCC_ERASE) && card->erase_size &&
+ !(card->quirks & MMC_QUIRK_ERASE_BROKEN))
return 1;
return 0;
}
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -359,15 +359,30 @@ struct mmc_host *mmc_alloc_host(int extr
{
int err;
struct mmc_host *host;
+ int id;
host = kzalloc(sizeof(struct mmc_host) + extra, GFP_KERNEL);
if (!host)
return NULL;
+ /* If OF aliases exist, start dynamic assignment after highest */
+ id = of_alias_get_highest_id("mmc");
+ id = (id < 0) ? 0 : id + 1;
+
+ /* If this devices has OF node, maybe it has an alias */
+ if (dev->of_node) {
+ int of_id = of_alias_get_id(dev->of_node, "mmc");
+
+ if (of_id < 0)
+ dev_warn(dev, "/aliases ID not available\n");
+ else
+ id = of_id;
+ }
+
/* scanning will be enabled when we're ready */
host->rescan_disable = 1;
- err = ida_simple_get(&mmc_host_ida, 0, 0, GFP_KERNEL);
+ err = ida_simple_get(&mmc_host_ida, id, 0, GFP_KERNEL);
if (err < 0) {
kfree(host);
return NULL;
--- a/drivers/mmc/core/quirks.h
+++ b/drivers/mmc/core/quirks.h
@@ -99,6 +99,14 @@ static const struct mmc_fixup mmc_blk_fi
MMC_FIXUP("V10016", CID_MANFID_KINGSTON, CID_OEMID_ANY, add_quirk_mmc,
MMC_QUIRK_TRIM_BROKEN),
+ /*
+ * On some Kingston SD cards, multiple erases of less than 64
+ * sectors can cause corruption.
+ */
+ MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
+ MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
+ MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
+
END_FIXUP
};
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -4,6 +4,35 @@
comment "MMC/SD/SDIO Host Controller Drivers"
+config MMC_BCM2835_MMC
+ tristate "MMC support on BCM2835"
+ depends on MACH_BCM2708 || MACH_BCM2709 || ARCH_BCM2835
+ help
+ This selects the MMC Interface on BCM2835.
+
+ If you have a controller with this interface, say Y or M here.
+
+ If unsure, say N.
+
+config MMC_BCM2835_DMA
+ bool "DMA support on BCM2835 Arasan controller"
+ depends on MMC_BCM2835_MMC
+ help
+ Enable DMA support on the Arasan SDHCI controller in Broadcom 2708
+ based chips.
+
+ If unsure, say N.
+
+config MMC_BCM2835_PIO_DMA_BARRIER
+ int "Block count limit for PIO transfers"
+ depends on MMC_BCM2835_MMC && MMC_BCM2835_DMA
+ range 0 256
+ default 2
+ help
+ The inclusive limit in bytes under which PIO will be used instead of DMA
+
+ If unsure, say 2 here.
+
config MMC_DEBUG
bool "MMC host drivers debugging"
depends on MMC != n
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c
obj-$(CONFIG_MMC_SDHCI_SIRF) += sdhci-sirf.o
obj-$(CONFIG_MMC_SDHCI_F_SDH30) += sdhci_f_sdh30.o
obj-$(CONFIG_MMC_SDHCI_SPEAR) += sdhci-spear.o
+obj-$(CONFIG_MMC_BCM2835_MMC) += bcm2835-mmc.o
obj-$(CONFIG_MMC_WBSD) += wbsd.o
obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
obj-$(CONFIG_MMC_MTK) += mtk-sd.o
--- /dev/null
+++ b/drivers/mmc/host/bcm2835-mmc.c
@@ -0,0 +1,1582 @@
+/*
+ * BCM2835 MMC host driver.
+ *
+ * Author: Gellert Weisz <gellert@raspberrypi.org>
+ * Copyright 2014
+ *
+ * Based on
+ * sdhci-bcm2708.c by Broadcom
+ * sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko
+ * sdhci.c and sdhci-pci.c by Pierre Ossman
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/mmc/mmc.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sd.h>
+#include <linux/scatterlist.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/blkdev.h>
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
+#include <linux/of_dma.h>
+
+#include "sdhci.h"
+
+
+#define DRIVER_NAME "mmc-bcm2835"
+
+#define DBG(f, x...) \
+pr_debug(DRIVER_NAME " [%s()]: " f, __func__, ## x)
+
+#ifndef CONFIG_MMC_BCM2835_DMA
+ #define FORCE_PIO
+#endif
+
+
+/* the inclusive limit in bytes under which PIO will be used instead of DMA */
+#ifdef CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
+#define PIO_DMA_BARRIER CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
+#else
+#define PIO_DMA_BARRIER 00
+#endif
+
+#define MIN_FREQ 400000
+#define TIMEOUT_VAL 0xE
+#define BCM2835_SDHCI_WRITE_DELAY(f) (((2 * 1000000) / f) + 1)
+
+
+unsigned mmc_debug;
+unsigned mmc_debug2;
+
+struct bcm2835_host {
+ spinlock_t lock;
+
+ void __iomem *ioaddr;
+ u32 bus_addr;
+
+ struct mmc_host *mmc;
+
+ u32 timeout;
+
+ int clock; /* Current clock speed */
+ u8 pwr; /* Current voltage */
+
+ unsigned int max_clk; /* Max possible freq */
+ unsigned int timeout_clk; /* Timeout freq (KHz) */
+ unsigned int clk_mul; /* Clock Muliplier value */
+
+ struct tasklet_struct finish_tasklet; /* Tasklet structures */
+
+ struct timer_list timer; /* Timer for timeouts */
+
+ struct sg_mapping_iter sg_miter; /* SG state for PIO */
+ unsigned int blocks; /* remaining PIO blocks */
+
+ int irq; /* Device IRQ */
+
+
+ u32 ier; /* cached registers */
+
+ struct mmc_request *mrq; /* Current request */
+ struct mmc_command *cmd; /* Current command */
+ struct mmc_data *data; /* Current data request */
+ unsigned int data_early:1; /* Data finished before cmd */
+
+ wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
+
+ u32 thread_isr;
+
+ u32 shadow;
+
+ /*DMA part*/
+ struct dma_chan *dma_chan_rxtx; /* DMA channel for reads and writes */
+ struct dma_slave_config dma_cfg_rx;
+ struct dma_slave_config dma_cfg_tx;
+ struct dma_async_tx_descriptor *tx_desc; /* descriptor */
+
+ bool have_dma;
+ bool use_dma;
+ bool wait_for_dma;
+ /*end of DMA part*/
+
+ int max_delay; /* maximum length of time spent waiting */
+
+ int flags; /* Host attributes */
+#define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */
+#define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */
+#define SDHCI_AUTO_CMD12 (1<<6) /* Auto CMD12 support */
+#define SDHCI_AUTO_CMD23 (1<<7) /* Auto CMD23 support */
+#define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */
+
+ u32 overclock_50; /* frequency to use when 50MHz is requested (in MHz) */
+ u32 max_overclock; /* Highest reported */
+};
+
+
+static inline void bcm2835_mmc_writel(struct bcm2835_host *host, u32 val, int reg, int from)
+{
+ unsigned delay;
+ lockdep_assert_held_once(&host->lock);
+ writel(val, host->ioaddr + reg);
+ udelay(BCM2835_SDHCI_WRITE_DELAY(max(host->clock, MIN_FREQ)));
+
+ delay = ((mmc_debug >> 16) & 0xf) << ((mmc_debug >> 20) & 0xf);
+ if (delay && !((1<<from) & mmc_debug2))
+ udelay(delay);
+}
+
+static inline void mmc_raw_writel(struct bcm2835_host *host, u32 val, int reg)
+{
+ unsigned delay;
+ lockdep_assert_held_once(&host->lock);
+ writel(val, host->ioaddr + reg);
+
+ delay = ((mmc_debug >> 24) & 0xf) << ((mmc_debug >> 28) & 0xf);
+ if (delay)
+ udelay(delay);
+}
+
+static inline u32 bcm2835_mmc_readl(struct bcm2835_host *host, int reg)
+{
+ lockdep_assert_held_once(&host->lock);
+ return readl(host->ioaddr + reg);
+}
+
+static inline void bcm2835_mmc_writew(struct bcm2835_host *host, u16 val, int reg)
+{
+ u32 oldval = (reg == SDHCI_COMMAND) ? host->shadow :
+ bcm2835_mmc_readl(host, reg & ~3);
+ u32 word_num = (reg >> 1) & 1;
+ u32 word_shift = word_num * 16;
+ u32 mask = 0xffff << word_shift;
+ u32 newval = (oldval & ~mask) | (val << word_shift);
+
+ if (reg == SDHCI_TRANSFER_MODE)
+ host->shadow = newval;
+ else
+ bcm2835_mmc_writel(host, newval, reg & ~3, 0);
+
+}
+
+static inline void bcm2835_mmc_writeb(struct bcm2835_host *host, u8 val, int reg)
+{
+ u32 oldval = bcm2835_mmc_readl(host, reg & ~3);
+ u32 byte_num = reg & 3;
+ u32 byte_shift = byte_num * 8;
+ u32 mask = 0xff << byte_shift;
+ u32 newval = (oldval & ~mask) | (val << byte_shift);
+
+ bcm2835_mmc_writel(host, newval, reg & ~3, 1);
+}
+
+
+static inline u16 bcm2835_mmc_readw(struct bcm2835_host *host, int reg)
+{
+ u32 val = bcm2835_mmc_readl(host, (reg & ~3));
+ u32 word_num = (reg >> 1) & 1;
+ u32 word_shift = word_num * 16;
+ u32 word = (val >> word_shift) & 0xffff;
+
+ return word;
+}
+
+static inline u8 bcm2835_mmc_readb(struct bcm2835_host *host, int reg)
+{
+ u32 val = bcm2835_mmc_readl(host, (reg & ~3));
+ u32 byte_num = reg & 3;
+ u32 byte_shift = byte_num * 8;
+ u32 byte = (val >> byte_shift) & 0xff;
+
+ return byte;
+}
+
+static void bcm2835_mmc_unsignal_irqs(struct bcm2835_host *host, u32 clear)
+{
+ u32 ier;
+
+ ier = bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE);
+ ier &= ~clear;
+ /* change which requests generate IRQs - makes no difference to
+ the content of SDHCI_INT_STATUS, or the need to acknowledge IRQs */
+ bcm2835_mmc_writel(host, ier, SDHCI_SIGNAL_ENABLE, 2);
+}
+
+
+static void bcm2835_mmc_dumpregs(struct bcm2835_host *host)
+{
+ pr_debug(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n",
+ mmc_hostname(host->mmc));
+
+ pr_debug(DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
+ bcm2835_mmc_readl(host, SDHCI_DMA_ADDRESS),
+ bcm2835_mmc_readw(host, SDHCI_HOST_VERSION));
+ pr_debug(DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
+ bcm2835_mmc_readw(host, SDHCI_BLOCK_SIZE),
+ bcm2835_mmc_readw(host, SDHCI_BLOCK_COUNT));
+ pr_debug(DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
+ bcm2835_mmc_readl(host, SDHCI_ARGUMENT),
+ bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE));
+ pr_debug(DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
+ bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE),
+ bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL));
+ pr_debug(DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
+ bcm2835_mmc_readb(host, SDHCI_POWER_CONTROL),
+ bcm2835_mmc_readb(host, SDHCI_BLOCK_GAP_CONTROL));
+ pr_debug(DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
+ bcm2835_mmc_readb(host, SDHCI_WAKE_UP_CONTROL),
+ bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL));
+ pr_debug(DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
+ bcm2835_mmc_readb(host, SDHCI_TIMEOUT_CONTROL),
+ bcm2835_mmc_readl(host, SDHCI_INT_STATUS));
+ pr_debug(DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
+ bcm2835_mmc_readl(host, SDHCI_INT_ENABLE),
+ bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE));
+ pr_debug(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
+ bcm2835_mmc_readw(host, SDHCI_AUTO_CMD_STATUS),
+ bcm2835_mmc_readw(host, SDHCI_SLOT_INT_STATUS));
+ pr_debug(DRIVER_NAME ": Caps: 0x%08x | Caps_1: 0x%08x\n",
+ bcm2835_mmc_readl(host, SDHCI_CAPABILITIES),
+ bcm2835_mmc_readl(host, SDHCI_CAPABILITIES_1));
+ pr_debug(DRIVER_NAME ": Cmd: 0x%08x | Max curr: 0x%08x\n",
+ bcm2835_mmc_readw(host, SDHCI_COMMAND),
+ bcm2835_mmc_readl(host, SDHCI_MAX_CURRENT));
+ pr_debug(DRIVER_NAME ": Host ctl2: 0x%08x\n",
+ bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2));
+
+ pr_debug(DRIVER_NAME ": ===========================================\n");
+}
+
+
+static void bcm2835_mmc_reset(struct bcm2835_host *host, u8 mask)
+{
+ unsigned long timeout;
+ unsigned long flags;
+
+ spin_lock_irqsave(&host->lock, flags);
+ bcm2835_mmc_writeb(host, mask, SDHCI_SOFTWARE_RESET);
+
+ if (mask & SDHCI_RESET_ALL)
+ host->clock = 0;
+
+ /* Wait max 100 ms */
+ timeout = 100;
+
+ /* hw clears the bit when it's done */
+ while (bcm2835_mmc_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
+ if (timeout == 0) {
+ pr_err("%s: Reset 0x%x never completed.\n",
+ mmc_hostname(host->mmc), (int)mask);
+ bcm2835_mmc_dumpregs(host);
+ return;
+ }
+ timeout--;
+ spin_unlock_irqrestore(&host->lock, flags);
+ mdelay(1);
+ spin_lock_irqsave(&host->lock, flags);
+ }
+
+ if (100-timeout > 10 && 100-timeout > host->max_delay) {
+ host->max_delay = 100-timeout;
+ pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
+ }
+ spin_unlock_irqrestore(&host->lock, flags);
+}
+
+static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
+
+static void bcm2835_mmc_init(struct bcm2835_host *host, int soft)
+{
+ unsigned long flags;
+ if (soft)
+ bcm2835_mmc_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA);
+ else
+ bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
+
+ host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
+ SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT |
+ SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC |
+ SDHCI_INT_TIMEOUT | SDHCI_INT_DATA_END |
+ SDHCI_INT_RESPONSE;
+
+ spin_lock_irqsave(&host->lock, flags);
+ bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE, 3);
+ bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE, 3);
+ spin_unlock_irqrestore(&host->lock, flags);
+
+ if (soft) {
+ /* force clock reconfiguration */
+ host->clock = 0;
+ bcm2835_mmc_set_ios(host->mmc, &host->mmc->ios);
+ }
+}
+
+
+
+static void bcm2835_mmc_finish_data(struct bcm2835_host *host);
+
+static void bcm2835_mmc_dma_complete(void *param)
+{
+ struct bcm2835_host *host = param;
+ struct dma_chan *dma_chan;
+ unsigned long flags;
+ u32 dir_data;
+
+ spin_lock_irqsave(&host->lock, flags);
+
+ host->use_dma = false;
+
+ if (host->data && !(host->data->flags & MMC_DATA_WRITE)) {
+ /* otherwise handled in SDHCI IRQ */
+ dma_chan = host->dma_chan_rxtx;
+ dir_data = DMA_FROM_DEVICE;
+
+ dma_unmap_sg(dma_chan->device->dev,
+ host->data->sg, host->data->sg_len,
+ dir_data);
+
+ bcm2835_mmc_finish_data(host);
+ } else if (host->wait_for_dma) {
+ host->wait_for_dma = false;
+ tasklet_schedule(&host->finish_tasklet);
+ }
+
+ spin_unlock_irqrestore(&host->lock, flags);
+}
+
+static void bcm2835_bcm2835_mmc_read_block_pio(struct bcm2835_host *host)
+{
+ unsigned long flags;
+ size_t blksize, len, chunk;
+
+ u32 uninitialized_var(scratch);
+ u8 *buf;
+
+ blksize = host->data->blksz;
+ chunk = 0;
+
+ local_irq_save(flags);
+
+ while (blksize) {
+ if (!sg_miter_next(&host->sg_miter))
+ BUG();
+
+ len = min(host->sg_miter.length, blksize);
+
+ blksize -= len;
+ host->sg_miter.consumed = len;
+
+ buf = host->sg_miter.addr;
+
+ while (len) {
+ if (chunk == 0) {
+ scratch = bcm2835_mmc_readl(host, SDHCI_BUFFER);
+ chunk = 4;
+ }
+
+ *buf = scratch & 0xFF;
+
+ buf++;
+ scratch >>= 8;
+ chunk--;
+ len--;
+ }
+ }
+
+ sg_miter_stop(&host->sg_miter);
+
+ local_irq_restore(flags);
+}
+
+static void bcm2835_bcm2835_mmc_write_block_pio(struct bcm2835_host *host)
+{
+ unsigned long flags;
+ size_t blksize, len, chunk;
+ u32 scratch;
+ u8 *buf;
+
+ blksize = host->data->blksz;
+ chunk = 0;
+ chunk = 0;
+ scratch = 0;
+
+ local_irq_save(flags);
+
+ while (blksize) {
+ if (!sg_miter_next(&host->sg_miter))
+ BUG();
+
+ len = min(host->sg_miter.length, blksize);
+
+ blksize -= len;
+ host->sg_miter.consumed = len;
+
+ buf = host->sg_miter.addr;
+
+ while (len) {
+ scratch |= (u32)*buf << (chunk * 8);
+
+ buf++;
+ chunk++;
+ len--;
+
+ if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
+ mmc_raw_writel(host, scratch, SDHCI_BUFFER);
+ chunk = 0;
+ scratch = 0;
+ }
+ }
+ }
+
+ sg_miter_stop(&host->sg_miter);
+
+ local_irq_restore(flags);
+}
+
+
+static void bcm2835_mmc_transfer_pio(struct bcm2835_host *host)
+{
+ u32 mask;
+
+ BUG_ON(!host->data);
+
+ if (host->blocks == 0)
+ return;
+
+ if (host->data->flags & MMC_DATA_READ)
+ mask = SDHCI_DATA_AVAILABLE;
+ else
+ mask = SDHCI_SPACE_AVAILABLE;
+
+ while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
+
+ if (host->data->flags & MMC_DATA_READ)
+ bcm2835_bcm2835_mmc_read_block_pio(host);
+ else
+ bcm2835_bcm2835_mmc_write_block_pio(host);
+
+ host->blocks--;
+
+ /* QUIRK used in sdhci.c removes the 'if' */
+ /* but it seems this is unnecessary */
+ if (host->blocks == 0)
+ break;
+
+
+ }
+}
+
+
+static void bcm2835_mmc_transfer_dma(struct bcm2835_host *host)
+{
+ u32 len, dir_data, dir_slave;
+ struct dma_async_tx_descriptor *desc = NULL;
+ struct dma_chan *dma_chan;
+
+
+ WARN_ON(!host->data);
+
+ if (!host->data)
+ return;
+
+ if (host->blocks == 0)
+ return;
+
+ dma_chan = host->dma_chan_rxtx;
+ if (host->data->flags & MMC_DATA_READ) {
+ dir_data = DMA_FROM_DEVICE;
+ dir_slave = DMA_DEV_TO_MEM;
+ } else {
+ dir_data = DMA_TO_DEVICE;
+ dir_slave = DMA_MEM_TO_DEV;
+ }
+
+ /* The parameters have already been validated, so this will not fail */
+ (void)dmaengine_slave_config(dma_chan,
+ (dir_data == DMA_FROM_DEVICE) ?
+ &host->dma_cfg_rx :
+ &host->dma_cfg_tx);
+
+ BUG_ON(!dma_chan->device);
+ BUG_ON(!dma_chan->device->dev);
+ BUG_ON(!host->data->sg);
+
+ len = dma_map_sg(dma_chan->device->dev, host->data->sg,
+ host->data->sg_len, dir_data);
+ if (len > 0) {
+ desc = dmaengine_prep_slave_sg(dma_chan, host->data->sg,
+ len, dir_slave,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+ } else {
+ dev_err(mmc_dev(host->mmc), "dma_map_sg returned zero length\n");
+ }
+ if (desc) {
+ unsigned long flags;
+ spin_lock_irqsave(&host->lock, flags);
+ bcm2835_mmc_unsignal_irqs(host, SDHCI_INT_DATA_AVAIL |
+ SDHCI_INT_SPACE_AVAIL);
+ host->tx_desc = desc;
+ desc->callback = bcm2835_mmc_dma_complete;
+ desc->callback_param = host;
+ spin_unlock_irqrestore(&host->lock, flags);
+ dmaengine_submit(desc);
+ dma_async_issue_pending(dma_chan);
+ }
+
+}
+
+
+
+static void bcm2835_mmc_set_transfer_irqs(struct bcm2835_host *host)
+{
+ u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
+ u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
+
+ if (host->use_dma)
+ host->ier = (host->ier & ~pio_irqs) | dma_irqs;
+ else
+ host->ier = (host->ier & ~dma_irqs) | pio_irqs;
+
+ bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE, 4);
+ bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE, 4);
+}
+
+
+static void bcm2835_mmc_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd)
+{
+ u8 count;
+ struct mmc_data *data = cmd->data;
+
+ WARN_ON(host->data);
+
+ if (data || (cmd->flags & MMC_RSP_BUSY)) {
+ count = TIMEOUT_VAL;
+ bcm2835_mmc_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
+ }
+
+ if (!data)
+ return;
+
+ /* Sanity checks */
+ BUG_ON(data->blksz * data->blocks > 524288);
+ BUG_ON(data->blksz > host->mmc->max_blk_size);
+ BUG_ON(data->blocks > 65535);
+
+ host->data = data;
+ host->data_early = 0;
+ host->data->bytes_xfered = 0;
+
+
+ if (!(host->flags & SDHCI_REQ_USE_DMA)) {
+ int flags;
+
+ flags = SG_MITER_ATOMIC;
+ if (host->data->flags & MMC_DATA_READ)
+ flags |= SG_MITER_TO_SG;
+ else
+ flags |= SG_MITER_FROM_SG;
+ sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
+ host->blocks = data->blocks;
+ }
+
+ host->use_dma = host->have_dma && data->blocks > PIO_DMA_BARRIER;
+
+ bcm2835_mmc_set_transfer_irqs(host);
+
+ /* Set the DMA boundary value and block size */
+ bcm2835_mmc_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
+ data->blksz), SDHCI_BLOCK_SIZE);
+ bcm2835_mmc_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
+
+ BUG_ON(!host->data);
+}
+
+static void bcm2835_mmc_set_transfer_mode(struct bcm2835_host *host,
+ struct mmc_command *cmd)
+{
+ u16 mode;
+ struct mmc_data *data = cmd->data;
+
+ if (data == NULL) {
+ /* clear Auto CMD settings for no data CMDs */
+ mode = bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE);
+ bcm2835_mmc_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
+ SDHCI_TRNS_AUTO_CMD23), SDHCI_TRANSFER_MODE);
+ return;
+ }
+
+ WARN_ON(!host->data);
+
+ mode = SDHCI_TRNS_BLK_CNT_EN;
+
+ if ((mmc_op_multi(cmd->opcode) || data->blocks > 1)) {
+ mode |= SDHCI_TRNS_MULTI;
+
+ /*
+ * If we are sending CMD23, CMD12 never gets sent
+ * on successful completion (so no Auto-CMD12).
+ */
+ if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12))
+ mode |= SDHCI_TRNS_AUTO_CMD12;
+ else if (host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) {
+ mode |= SDHCI_TRNS_AUTO_CMD23;
+ bcm2835_mmc_writel(host, host->mrq->sbc->arg, SDHCI_ARGUMENT2, 5);
+ }
+ }
+
+ if (data->flags & MMC_DATA_READ)
+ mode |= SDHCI_TRNS_READ;
+ if (host->flags & SDHCI_REQ_USE_DMA)
+ mode |= SDHCI_TRNS_DMA;
+
+ bcm2835_mmc_writew(host, mode, SDHCI_TRANSFER_MODE);
+}
+
+void bcm2835_mmc_send_command(struct bcm2835_host *host, struct mmc_command *cmd)
+{
+ int flags;
+ u32 mask;
+ unsigned long timeout;
+
+ WARN_ON(host->cmd);
+
+ /* Wait max 10 ms */
+ timeout = 1000;
+
+ mask = SDHCI_CMD_INHIBIT;
+ if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
+ mask |= SDHCI_DATA_INHIBIT;
+
+ /* We shouldn't wait for data inihibit for stop commands, even
+ though they might use busy signaling */
+ if (host->mrq->data && (cmd == host->mrq->data->stop))
+ mask &= ~SDHCI_DATA_INHIBIT;
+
+ while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
+ if (timeout == 0) {
+ pr_err("%s: Controller never released inhibit bit(s).\n",
+ mmc_hostname(host->mmc));
+ bcm2835_mmc_dumpregs(host);
+ cmd->error = -EIO;
+ tasklet_schedule(&host->finish_tasklet);
+ return;
+ }
+ timeout--;
+ udelay(10);
+ }
+
+ if ((1000-timeout)/100 > 1 && (1000-timeout)/100 > host->max_delay) {
+ host->max_delay = (1000-timeout)/100;
+ pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
+ }
+
+ timeout = jiffies;
+ if (!cmd->data && cmd->busy_timeout > 9000)
+ timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ;
+ else
+ timeout += 10 * HZ;
+ mod_timer(&host->timer, timeout);
+
+ host->cmd = cmd;
+ host->use_dma = false;
+
+ bcm2835_mmc_prepare_data(host, cmd);
+
+ bcm2835_mmc_writel(host, cmd->arg, SDHCI_ARGUMENT, 6);
+
+ bcm2835_mmc_set_transfer_mode(host, cmd);
+
+ if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
+ pr_err("%s: Unsupported response type!\n",
+ mmc_hostname(host->mmc));
+ cmd->error = -EINVAL;
+ tasklet_schedule(&host->finish_tasklet);
+ return;
+ }
+
+ if (!(cmd->flags & MMC_RSP_PRESENT))
+ flags = SDHCI_CMD_RESP_NONE;